boards: arm: add support for the Actinius Icarus SoM DK w/ helper lib
This adds support for the nRF9160-based Icarus SoM DK (development kit) from Actinius and a common library for board init code that is common to multiple boards from Actinius. Signed-off-by: Alex Tsamakos <alex@actinius.com>
This commit is contained in:
Alex Tsamakos
Marti Bolivar
parent
b787cc088d
commit
6c25cad55c
22 changed files with 1017 additions and 0 deletions
8
boards/arm/actinius_icarus_som_dk/CMakeLists.txt
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8
boards/arm/actinius_icarus_som_dk/CMakeLists.txt
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#
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# Copyright (c) 2022 Actinius
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#
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# SPDX-License-Identifier: Apache-2.0
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zephyr_library()
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add_subdirectory(${ZEPHYR_BASE}/boards/common/actinius actinius_common)
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14
boards/arm/actinius_icarus_som_dk/Kconfig.board
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14
boards/arm/actinius_icarus_som_dk/Kconfig.board
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# Actinius Icarus SoM DK board configuration
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# Copyright (c) 2022 Actinius
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NRF9160_SICA
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config BOARD_ACTINIUS_ICARUS_SOM_DK
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bool "Actinius Icarus SoM DK"
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config BOARD_ACTINIUS_ICARUS_SOM_DK_NS
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bool "Actinius Icarus SoM DK Non-Secure"
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endif # SOC_NRF9160_SICA
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40
boards/arm/actinius_icarus_som_dk/Kconfig.defconfig
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boards/arm/actinius_icarus_som_dk/Kconfig.defconfig
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# Actinius Icarus SoM DK board configuration
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# Copyright (c) 2022 Actinius
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_ACTINIUS_ICARUS_SOM_DK || BOARD_ACTINIUS_ICARUS_SOM_DK_NS
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config BOARD
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default "actinius_icarus_som_dk"
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source "boards/common/actinius/Kconfig"
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# For the secure version of the board the firmware is linked at the beginning
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# of the flash, or into the code-partition defined in DT if it is intended to
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# be loaded by MCUboot. If the secure firmware is to be combined with a non-
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# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
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# be restricted to the size of its code partition.
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# For the non-secure version of the board, the firmware
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# must be linked into the code-partition (non-secure) defined in DT, regardless.
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# Apply this configuration below by setting the Kconfig symbols used by
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# the linker according to the information extracted from DT partitions.
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# Workaround for not being able to have commas in macro arguments
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DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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depends on BOARD_ACTINIUS_ICARUS_SOM_DK && TRUSTED_EXECUTION_SECURE
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if BOARD_ACTINIUS_ICARUS_SOM_DK_NS
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config FLASH_LOAD_OFFSET
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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endif # BOARD_ACTINIUS_ICARUS_SOM_DK_NS
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endif # BOARD_ACTINIUS_ICARUS_SOM_DK || BOARD_ACTINIUS_ICARUS_SOM_DK_NS
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19
boards/arm/actinius_icarus_som_dk/actinius_icarus_som_dk.dts
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19
boards/arm/actinius_icarus_som_dk/actinius_icarus_som_dk.dts
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/*
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* Copyright (c) 2022 Actinius
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nordic/nrf9160_sica.dtsi>
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#include "actinius_icarus_som_dk_common.dts"
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/ {
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chosen {
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zephyr,sram = &sram0_s;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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zephyr,sram-secure-partition = &sram0_s;
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zephyr,sram-non-secure-partition = &sram0_ns;
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};
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};
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@ -0,0 +1,21 @@
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identifier: actinius_icarus_som_dk
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name: Actinius Icarus SoM DK
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type: mcu
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arch: arm
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toolchain:
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- gnuarmemb
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- xtools
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- zephyr
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ram: 88
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flash: 256
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supported:
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- gpio
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- i2c
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- pwm
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- spi
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- watchdog
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- counter
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- arduino_gpio
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- arduino_i2c
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- arduino_serial
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- arduino_spi
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/*
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* Copyright (c) 2022 Actinius
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 9)>,
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<NRF_PSEL(UART_RX, 0, 6)>;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 9)>,
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<NRF_PSEL(UART_RX, 0, 6)>;
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low-power-enable;
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};
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};
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i2c2_default: i2c2_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 10)>,
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<NRF_PSEL(TWIM_SCL, 0, 11)>;
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};
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};
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i2c2_sleep: i2c2_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 10)>,
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<NRF_PSEL(TWIM_SCL, 0, 11)>;
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low-power-enable;
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};
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};
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spi3_default: spi3_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,
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<NRF_PSEL(SPIM_MOSI, 0, 25)>,
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<NRF_PSEL(SPIM_MISO, 0, 21)>;
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};
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};
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spi3_sleep: spi3_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,
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<NRF_PSEL(SPIM_MOSI, 0, 25)>,
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<NRF_PSEL(SPIM_MISO, 0, 21)>;
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low-power-enable;
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};
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};
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neopixel_spi_default: neopixel_spi_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 0)>,
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<NRF_PSEL(SPIM_MOSI, 0, 8)>,
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<NRF_PSEL(SPIM_MISO, 0, 0)>;
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};
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};
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neopixel_spi_sleep: neopixel_spi_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 0)>,
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<NRF_PSEL(SPIM_MOSI, 0, 8)>,
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<NRF_PSEL(SPIM_MISO, 0, 0)>;
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low-power-enable;
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};
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};
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pwm0_default: pwm0_default {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 3)>;
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nordic,invert;
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};
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};
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pwm0_sleep: pwm0_sleep {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 3)>;
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low-power-enable;
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};
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};
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};
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@ -0,0 +1,227 @@
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/*
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* Copyright (c) 2022 Actinius
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "actinius_icarus_som_dk_common-pinctrl.dtsi"
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#include <dt-bindings/led/led.h>
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/ {
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model = "Actinius Icarus SoM DK";
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compatible = "actinius,icarus_som_dk";
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,uart-mcumgr = &uart0;
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};
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leds {
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compatible = "gpio-leds";
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blue_led: led_0 {
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gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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label = "Blue LED";
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};
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};
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pwmleds {
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compatible = "pwm-leds";
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blue_pwm_led: led_pwm_0 {
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pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
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label = "Blue PWM LED";
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};
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};
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buttons {
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compatible = "gpio-keys";
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button0: button_0 {
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gpios = <&gpio0 23 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push Button 1";
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};
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};
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aliases {
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led0 = &blue_led;
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pwm-led0 = &blue_pwm_led;
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blue-pwm-led = &blue_pwm_led;
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sw0 = &button0;
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bootloader-led0 = &blue_led;
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mcuboot-button0 = &button0;
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mcuboot-led0 = &blue_led;
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watchdog0 = &wdt0;
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accel0 = &lis2dh12_accel;
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spi-flash0 = &w25q64;
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led-strip = &neopixel_led;
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};
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sim_select: sim-select {
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compatible = "actinius-sim-select";
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sim-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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sim = "esim";
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};
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};
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&adc {
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status ="okay";
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};
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&gpiote {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart0_default>;
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pinctrl-1 = <&uart0_sleep>;
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pinctrl-names = "default", "sleep";
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};
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neopixel_spi: &spi1 {
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compatible = "nordic,nrf-spim";
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status = "okay";
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pinctrl-0 = <&neopixel_spi_default>;
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pinctrl-1 = <&neopixel_spi_sleep>;
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pinctrl-names = "default", "sleep";
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neopixel_led: ws2812@0 {
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compatible = "worldsemi,ws2812-spi";
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reg = <0>; /* ignored, but necessary for SPI bindings */
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spi-max-frequency = <4000000>;
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chain-length = <1>;
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color-mapping = <LED_COLOR_ID_GREEN
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LED_COLOR_ID_RED
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LED_COLOR_ID_BLUE>;
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spi-one-frame = <0x70>;
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spi-zero-frame = <0x40>;
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};
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};
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&i2c2 {
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compatible = "nordic,nrf-twim";
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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pinctrl-0 = <&i2c2_default>;
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pinctrl-1 = <&i2c2_sleep>;
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pinctrl-names = "default", "sleep";
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lis2dh12_accel: lis2dh12-accel@19 {
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compatible = "st,lis2dh12", "st,lis2dh";
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reg = <0x19>;
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irq-gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>,
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<&gpio0 28 GPIO_ACTIVE_HIGH>;
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};
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};
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&spi3 {
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compatible = "nordic,nrf-spim";
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status = "okay";
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cs-gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&spi3_default>;
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pinctrl-1 = <&spi3_sleep>;
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pinctrl-names = "default", "sleep";
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w25q64: w25q64jv@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <80000000>;
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jedec-id = [ef 40 17];
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size = <0x4000000>;
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has-dpd;
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t-enter-dpd = <3500>;
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t-exit-dpd = <3500>;
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};
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};
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&pwm0 {
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status = "okay";
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pinctrl-0 = <&pwm0_default>;
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pinctrl-1 = <&pwm0_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&timer0 {
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status = "okay";
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};
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&timer1 {
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status = "okay";
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};
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&timer2 {
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status = "okay";
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};
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 0x10000>;
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};
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slot0_partition: partition@10000 {
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label = "image-0";
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};
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slot0_ns_partition: partition@50000 {
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label = "image-0-nonsecure";
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};
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slot1_partition: partition@80000 {
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label = "image-1";
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};
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slot1_ns_partition: partition@c0000 {
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label = "image-1-nonsecure";
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};
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scratch_partition: partition@f0000 {
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label = "image-scratch";
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reg = <0x000f0000 0xa000>;
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};
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storage_partition: partition@fa000 {
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label = "storage";
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reg = <0x000fa000 0x00006000>;
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};
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};
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};
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/ {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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sram0_s: image_s@20000000 {
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/* Secure image memory */
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};
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sram0_modem: image_modem@20016000 {
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/* Modem (shared) memory */
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};
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sram0_ns: image_ns@20020000 {
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/* Non-Secure image memory */
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};
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};
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};
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/* Include file with mappings and aliases for arduino compatibility */
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#include "arduino_connector.dtsi"
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/* Include partition configuration file */
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#include "actinius_icarus_som_dk_partition_conf.dts"
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@ -0,0 +1,26 @@
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_NRF91X=y
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CONFIG_SOC_NRF9160_SICA=y
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CONFIG_BOARD_ACTINIUS_ICARUS_SOM_DK=y
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable hardware stack protection
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CONFIG_HW_STACK_PROTECTION=y
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# Enable TrustZone-M
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CONFIG_ARM_TRUSTZONE_M=y
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# enable GPIO
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CONFIG_GPIO=y
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# Enable uart driver
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CONFIG_SERIAL=y
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# enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_PINCTRL=y
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@ -0,0 +1,17 @@
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/*
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* Copyright (c) 2022 Actinius
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nordic/nrf9160ns_sica.dtsi>
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#include "actinius_icarus_som_dk_common.dts"
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/ {
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chosen {
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zephyr,flash = &flash0;
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zephyr,sram = &sram0_ns;
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zephyr,code-partition = &slot0_ns_partition;
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};
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};
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@ -0,0 +1,21 @@
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identifier: actinius_icarus_som_dk_ns
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name: Actinius Icarus SoM DK Non-Secure
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type: mcu
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arch: arm
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toolchain:
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- gnuarmemb
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- xtools
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- zephyr
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ram: 128
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flash: 192
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supported:
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- gpio
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- i2c
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- pwm
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- spi
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- watchdog
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- counter
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- arduino_gpio
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- arduino_i2c
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- arduino_serial
|
||||
- arduino_spi
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SOC_SERIES_NRF91X=y
|
||||
CONFIG_SOC_NRF9160_SICA=y
|
||||
CONFIG_BOARD_ACTINIUS_ICARUS_SOM_DK_NS=y
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
||||
|
||||
# Enable hardware stack protection
|
||||
CONFIG_HW_STACK_PROTECTION=y
|
||||
|
||||
# Enable TrustZone-M
|
||||
CONFIG_ARM_TRUSTZONE_M=y
|
||||
|
||||
# This Board implies building Non-Secure firmware
|
||||
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
|
||||
|
||||
# enable GPIO
|
||||
CONFIG_GPIO=y
|
||||
|
||||
# Enable uart driver
|
||||
CONFIG_SERIAL=y
|
||||
|
||||
# enable console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
CONFIG_PINCTRL=y
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
/*
|
||||
* Copyright (c) 2022 Actinius
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/*
|
||||
* Default Flash planning for actinius_icarus_som_dk.
|
||||
*
|
||||
* Zephyr build for nRF9160 with ARM TrustZone-M support,
|
||||
* implies building Secure and Non-Secure Zephyr images.
|
||||
*
|
||||
* Secure image will be placed, by default, in flash0
|
||||
* (or in slot0, if MCUboot is present).
|
||||
* Secure image will use sram0 for system memory.
|
||||
*
|
||||
* Non-Secure image will be placed in slot0_ns, and use
|
||||
* sram0_ns for system memory.
|
||||
*
|
||||
* Note that the Secure image only requires knowledge of
|
||||
* the beginning of the Non-Secure image (not its size).
|
||||
*/
|
||||
|
||||
&slot0_partition {
|
||||
reg = <0x00010000 0x40000>;
|
||||
};
|
||||
|
||||
&slot0_ns_partition {
|
||||
reg = <0x00050000 0x30000>;
|
||||
};
|
||||
|
||||
&slot1_partition {
|
||||
reg = <0x00080000 0x40000>;
|
||||
};
|
||||
|
||||
&slot1_ns_partition {
|
||||
reg = <0x000c0000 0x30000>;
|
||||
};
|
||||
|
||||
/* Default SRAM planning when building for nRF9160 with
|
||||
* ARM TrustZone-M support
|
||||
* - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
|
||||
* - 40 kB SRAM reserved for and used by the modem library
|
||||
* (sram0_modem). This memory is Non-Secure.
|
||||
* - Upper 128 kB allocated to Non-Secure image (sram0_ns).
|
||||
*/
|
||||
|
||||
&sram0_s {
|
||||
reg = <0x20000000 DT_SIZE_K(88)>;
|
||||
};
|
||||
|
||||
&sram0_modem {
|
||||
reg = <0x20016000 DT_SIZE_K(40)>;
|
||||
};
|
||||
|
||||
&sram0_ns {
|
||||
reg = <0x20020000 DT_SIZE_K(128)>;
|
||||
};
|
||||
51
boards/arm/actinius_icarus_som_dk/arduino_connector.dtsi
Normal file
51
boards/arm/actinius_icarus_som_dk/arduino_connector.dtsi
Normal file
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* Copyright (c) 2020 Actinius
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/ {
|
||||
arduino_header: arduino_connector {
|
||||
compatible = "arduino-header-r3";
|
||||
#gpio-cells = <2>;
|
||||
gpio-map-mask = <0xffffffff 0xffffffc0>;
|
||||
gpio-map-pass-thru = <0 0x3f>;
|
||||
gpio-map = <0 0 &gpio0 15 0>, /* A0 */
|
||||
<1 0 &gpio0 16 0>, /* A1 */
|
||||
<2 0 &gpio0 17 0>, /* A2 */
|
||||
<3 0 &gpio0 18 0>, /* A3 */
|
||||
<4 0 &gpio0 19 0>, /* A4 */
|
||||
<5 0 &gpio0 20 0>, /* A5 */
|
||||
<6 0 &gpio0 4 0>, /* D0 */
|
||||
<7 0 &gpio0 5 0>, /* D1 */
|
||||
<8 0 &gpio0 2 0>, /* D2 */
|
||||
<9 0 &gpio0 1 0>, /* D3 */
|
||||
<10 0 &gpio0 23 0>, /* D4 */
|
||||
<11 0 &gpio0 0 0>, /* D5 */
|
||||
<12 0 &gpio0 26 0>, /* D6 */
|
||||
<13 0 &gpio0 27 0>, /* D7 */
|
||||
<14 0 &gpio0 30 0>, /* D8 */
|
||||
<15 0 &gpio0 31 0>, /* D9 */
|
||||
<16 0 &gpio0 7 0>, /* D10 */
|
||||
<17 0 &gpio0 13 0>, /* D11 */
|
||||
<18 0 &gpio0 14 0>, /* D12 */
|
||||
<19 0 &gpio0 3 0>, /* D13 */
|
||||
<20 0 &gpio0 10 0>, /* SDA */
|
||||
<21 0 &gpio0 11 0>; /* SCL */
|
||||
};
|
||||
|
||||
arduino_adc: analog_connector {
|
||||
compatible = "arduino,uno-adc";
|
||||
#io-channel-cells = <1>;
|
||||
io-channel-map = <0 &adc 2>, /* A0 = P0.15 = AIN2 */
|
||||
<1 &adc 3>, /* A1 = P0.16 = AIN3 */
|
||||
<2 &adc 4>, /* A2 = P0.17 = AIN4 */
|
||||
<3 &adc 5>, /* A3 = P0.18 = AIN5 */
|
||||
<4 &adc 6>, /* A4 = P0.19 = AIN6 */
|
||||
<5 &adc 7>; /* A5 = P0.20 = AIN7 */
|
||||
};
|
||||
};
|
||||
|
||||
arduino_serial: &uart0 { };
|
||||
arduino_i2c: &i2c2 { };
|
||||
arduino_spi: &spi3 { };
|
||||
5
boards/arm/actinius_icarus_som_dk/board.cmake
Normal file
5
boards/arm/actinius_icarus_som_dk/board.cmake
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000")
|
||||
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
|
||||
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 77 KiB |
BIN
boards/arm/actinius_icarus_som_dk/doc/img/icarus-som-dk.jpg
Normal file
BIN
boards/arm/actinius_icarus_som_dk/doc/img/icarus-som-dk.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 84 KiB |
245
boards/arm/actinius_icarus_som_dk/doc/index.rst
Normal file
245
boards/arm/actinius_icarus_som_dk/doc/index.rst
Normal file
|
|
@ -0,0 +1,245 @@
|
|||
.. _actinius_icarus_som_dk:
|
||||
|
||||
Actinius Icarus SoM DK
|
||||
######################
|
||||
|
||||
Overview
|
||||
********
|
||||
|
||||
.. figure:: img/icarus-som-dk.jpg
|
||||
:width: 450px
|
||||
:align: center
|
||||
:alt: Icarus SoM DK
|
||||
|
||||
Icarus SoM Development Kit (nRF9160)
|
||||
|
||||
The Icarus SoM DK is a single board development kit for
|
||||
evaluation and development on the Icarus SoM (`Icarus SoM Docs`_).
|
||||
The Icarus SoM features the nRF9160 SiP from Nordic Semiconductor,
|
||||
a low-power 3-axis accelerometer and an on-board eSIM.
|
||||
The development kit provides interfacing to the SoM through USB-C,
|
||||
a set of user LEDs, a reset and a user button, a battery charging port,
|
||||
and a external nano SIM connector.
|
||||
The board is also Arduino Uno Rev3 compatible which makes
|
||||
using external shields possible.
|
||||
|
||||
The main uController is the Nordic Semiconductor nRF9160, with
|
||||
ARM Cortex-M33F CPU, ARMv8-M Security Extension and the
|
||||
following devices (provided directly by Nordic):
|
||||
|
||||
* :abbr:`ADC (Analog to Digital Converter)`
|
||||
* CLOCK
|
||||
* FLASH
|
||||
* :abbr:`GPIO (General Purpose Input Output)`
|
||||
* :abbr:`I2C (Inter-Integrated Circuit)`
|
||||
* :abbr:`MPU (Memory Protection Unit)`
|
||||
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
|
||||
* :abbr:`PWM (Pulse Width Modulation)`
|
||||
* :abbr:`RTC (nRF RTC System Clock)`
|
||||
* Segger RTT (RTT Console)
|
||||
* :abbr:`SPI (Serial Peripheral Interface)`
|
||||
* :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)`
|
||||
* :abbr:`WDT (Watchdog Timer)`
|
||||
* :abbr:`IDAU (Implementation Defined Attribution Unit)`
|
||||
|
||||
.. figure:: img/icarus-som-dk-block-diagram.jpg
|
||||
:width: 450px
|
||||
:align: center
|
||||
:alt: Icarus SoM DK Block Diagram
|
||||
|
||||
Icarus SoM DK Block Diagram
|
||||
|
||||
Hardware
|
||||
********
|
||||
|
||||
The detailed information about the on-board hardware can be found at the `Icarus SoM Product Website`_
|
||||
and the `Icarus SoM DK Product Website`_.
|
||||
|
||||
Pin description
|
||||
===============
|
||||
|
||||
External Pins available to user:
|
||||
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| # | Label | Description | Device-tree node |
|
||||
+====+=======+====================================+==================+
|
||||
| 1 | NC | Not Connected | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 2 | IOREF | I/O reference, connected to 3.3V | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 3 | RST | Reset of the nRF9160 | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 4 | 3.3V | 3.3V Power output | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 5 | 4.4V | Power output between Vbat and 4.4V | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 6 | GND | Ground pin | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 7 | GND | Ground pin | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 8 | VIN | Power input pin (4.35V to 10.5V) | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 9 | A2 | AIN2 / nRF9160 P0.15 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 10 | A3 | AIN3 / nRF9160 P0.16 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 11 | A4 | AIN4 / nRF9160 P0.17 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 12 | A5 | AIN5 / nRF9160 P0.18 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 13 | A6 | AIN6 / nRF9160 P0.19 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 14 | A7 | AIN7 / nRF9160 P0.20 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 15 | P4 | nRF9160 P0.04 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 16 | P5 | nRF9160 P0.05 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 17 | P2 | nRF9160 P0.02 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 18 | P1 | nRF9160 P0.01 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 19 | P23 | nRF9160 P0.23 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 20 | P0 | nRF9160 P0.00 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 21 | P26 | nRF9160 P0.26 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 22 | P27 | nRF9160 P0.27 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 23 | P30 | nRF9160 P0.30 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 24 | P31 | nRF9160 P0.31 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 25 | P7 | nRF9160 P0.07 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 26 | P13 | nRF9160 P0.13 or NC (Jumper-dependent) | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 27 | P14 | nRF9160 P0.14 or NC (Jumper-dependent) | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 28 | P3 | nRF9160 P0.03 | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 29 | GND | Ground pin | - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 30 | AREF | NC or AIN1 (Jumper-dependent) | gpio0 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 31 | SDA | I2C SDA pin | i2c2 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| 32 | SCL | I2C SCL pin | i2c2 |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| - | TS | Pin for optional battery thermistor| - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| - | CHG | Pin for battery charging indication| - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
| - | CE | Pin for enabling/disabling charging| - |
|
||||
+----+-------+------------------------------------+------------------+
|
||||
|
||||
|
||||
nRF9160 pins connected internally:
|
||||
|
||||
+--------------+------------------------------+---------------------+
|
||||
| nRF9160 pin | Function | Device-tree node |
|
||||
+==============+==============================+=====================+
|
||||
| P0.03 | Blue LED | led0 / pwm-led0 |
|
||||
+--------------+------------------------------+---------------------+
|
||||
| P0.08 | NeoPixel RGB LED | spi1 |
|
||||
+--------------+------------------------------+---------------------+
|
||||
| P0.12 | SIM select pin | gpio0 |
|
||||
+--------------+------------------------------+---------------------+
|
||||
| P0.23 | Connected to the user button | gpio0 / button0 |
|
||||
+--------------+------------------------------+---------------------+
|
||||
| P0.24 | SPI NOR Flash chip select | gpio0 / spi3 |
|
||||
+--------------+------------------------------+---------------------+
|
||||
| P0.28 | Accelerometer Interrupt 2 | lis2dh12-accel |
|
||||
+--------------+------------------------------+---------------------+
|
||||
| P0.29 | Accelerometer Interrupt 1 | lis2dh12-accel |
|
||||
+--------------+------------------------------+---------------------+
|
||||
|
||||
Supported Features
|
||||
==================
|
||||
|
||||
The actinius_icarus_som_dk board configuration supports the following
|
||||
hardware features:
|
||||
|
||||
+-----------+------------+----------------------+
|
||||
| Interface | Controller | Driver/Component |
|
||||
+===========+============+======================+
|
||||
| ADC | on-chip | adc |
|
||||
+-----------+------------+----------------------+
|
||||
| CLOCK | on-chip | clock_control |
|
||||
+-----------+------------+----------------------+
|
||||
| FLASH | on-chip | flash |
|
||||
+-----------+------------+----------------------+
|
||||
| GPIO | on-chip | gpio |
|
||||
+-----------+------------+----------------------+
|
||||
| I2C(M) | on-chip | i2c |
|
||||
+-----------+------------+----------------------+
|
||||
| MPU | on-chip | arch/arm |
|
||||
+-----------+------------+----------------------+
|
||||
| NVIC | on-chip | arch/arm |
|
||||
+-----------+------------+----------------------+
|
||||
| PWM | on-chip | pwm |
|
||||
+-----------+------------+----------------------+
|
||||
| SPI(M/S) | on-chip | spi |
|
||||
+-----------+------------+----------------------+
|
||||
| SPU | on-chip | system protection |
|
||||
+-----------+------------+----------------------+
|
||||
| UARTE | on-chip | serial |
|
||||
+-----------+------------+----------------------+
|
||||
| ACCEL | st | lis2dh |
|
||||
+-----------+------------+----------------------+
|
||||
|
||||
SIM selection
|
||||
*************
|
||||
|
||||
The sim choice (eSIM or nano-SIM) can be configured in Devicetree by adjusting
|
||||
the ``sim`` property in the ``sim_select`` node.
|
||||
|
||||
Security components
|
||||
===================
|
||||
|
||||
- Implementation Defined Attribution Unit (`IDAU`_). The IDAU is implemented
|
||||
with the System Protection Unit and is used to define secure and non-secure
|
||||
memory maps. By default, all of the memory space (Flash, SRAM, and
|
||||
peripheral address space) is defined to be secure accessible only.
|
||||
- Secure boot.
|
||||
|
||||
Building Secure/Non-Secure Zephyr applications
|
||||
==============================================
|
||||
|
||||
The process requires the following steps:
|
||||
|
||||
1. Build the Secure Zephyr application using ``-DBOARD=actinius_icarus_som_dk``.
|
||||
2. Build the Non-Secure Zephyr application using ``-DBOARD=actinius_icarus_som_dk_ns``.
|
||||
3. Merge the two binaries together.
|
||||
|
||||
If you are using Segger Embedded Studio v4.18 or later, the two binaries are built, merged, and
|
||||
burned automatically, unless you have disabled the feature.
|
||||
|
||||
When building a Secure/Non-Secure application, the Secure application will
|
||||
have to set the IDAU (SPU) configuration to allow Non-Secure access to all
|
||||
CPU resources utilized by the Non-Secure application firmware. SPU
|
||||
configuration shall take place before jumping to the Non-Secure application.
|
||||
|
||||
More information can be found in the `Icarus SoM Product Website`_,
|
||||
the `Icarus SoM DK Product Website`_ or the `Actinius Documentation Portal`_.
|
||||
|
||||
References
|
||||
**********
|
||||
|
||||
.. target-notes::
|
||||
|
||||
.. _IDAU:
|
||||
https://developer.arm.com/docs/100690/latest/attribution-units-sau-and-idau
|
||||
|
||||
.. _Icarus SoM Product Website:
|
||||
https://www.actinius.com/icarus-som
|
||||
|
||||
.. _Icarus SoM DK Product Website:
|
||||
https://www.actinius.com/icarus-som-dk
|
||||
|
||||
.. _Icarus SoM Docs:
|
||||
https://docs.actinius.com/icarus-som/introduction
|
||||
|
||||
.. _Actinius Documentation Portal:
|
||||
https://docs.actinius.com
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
# Copyright (c) 2022 Nordic Semiconductor ASA
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
description: |
|
||||
The Icarus boards provide the user with 2 options regarding SIM usage for
|
||||
LTE-M/NB-IoT communication. Either using the on-board eSIM or using an
|
||||
external nano-SIM. The SIM can be selected by changing the `sim` property
|
||||
of the `sim_select` dt node to `esim` or `external`.
|
||||
|
||||
compatible: "actinius-sim-select"
|
||||
|
||||
include: base.yaml
|
||||
|
||||
properties:
|
||||
sim-gpios:
|
||||
type: phandle-array
|
||||
required: true
|
||||
description: Pin used to select the SIM
|
||||
|
||||
sim:
|
||||
type: string
|
||||
required: true
|
||||
enum:
|
||||
- "esim"
|
||||
- "external"
|
||||
description: SIM choice (eSIM or external nano-SIM)
|
||||
7
boards/arm/actinius_icarus_som_dk/pre_dt_board.cmake
Normal file
7
boards/arm/actinius_icarus_som_dk/pre_dt_board.cmake
Normal file
|
|
@ -0,0 +1,7 @@
|
|||
# Copyright (c) 2021 Linaro Limited
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
|
||||
# - flash-controller@39000 & kmu@39000
|
||||
# - power@5000 & clock@5000
|
||||
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
|
||||
8
boards/common/actinius/CMakeLists.txt
Normal file
8
boards/common/actinius/CMakeLists.txt
Normal file
|
|
@ -0,0 +1,8 @@
|
|||
#
|
||||
# Copyright (c) 2021-2022 Actinius
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
zephyr_library()
|
||||
|
||||
zephyr_library_sources(actinius_board_common.c)
|
||||
12
boards/common/actinius/Kconfig
Normal file
12
boards/common/actinius/Kconfig
Normal file
|
|
@ -0,0 +1,12 @@
|
|||
# Copyright (c) 2022 Actinius
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config ACTINIUS_BOARD_CONTROL_INIT_PRIORITY
|
||||
int "Init priority"
|
||||
default 99
|
||||
help
|
||||
Sets the init priority for the Board Control module.
|
||||
|
||||
module = ACTINIUS_BOARD_CONTROL
|
||||
module-str = Board Control
|
||||
source "subsys/logging/Kconfig.template.log_config"
|
||||
98
boards/common/actinius/actinius_board_common.c
Normal file
98
boards/common/actinius/actinius_board_common.c
Normal file
|
|
@ -0,0 +1,98 @@
|
|||
/*
|
||||
* Copyright (c) 2021-2022 Actinius
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/init.h>
|
||||
#include <zephyr/devicetree.h>
|
||||
#include <zephyr/drivers/gpio.h>
|
||||
#include <zephyr/logging/log.h>
|
||||
|
||||
#if DT_HAS_COMPAT_STATUS_OKAY(actinius_sim_select) \
|
||||
|| DT_HAS_COMPAT_STATUS_OKAY(actinius_charger_enable)
|
||||
|
||||
LOG_MODULE_REGISTER(actinius_board_control,
|
||||
CONFIG_ACTINIUS_BOARD_CONTROL_LOG_LEVEL);
|
||||
|
||||
#define SIM_SELECT_NODE DT_NODELABEL(sim_select)
|
||||
#define CHARGER_ENABLE_NODE DT_NODELABEL(charger_enable)
|
||||
|
||||
#if DT_HAS_COMPAT_STATUS_OKAY(actinius_sim_select)
|
||||
static int actinius_board_set_sim_select(void)
|
||||
{
|
||||
const struct gpio_dt_spec sim =
|
||||
GPIO_DT_SPEC_GET(SIM_SELECT_NODE, sim_gpios);
|
||||
|
||||
if (!device_is_ready(sim.port)) {
|
||||
LOG_ERR("The SIM Select Pin port is not ready");
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (DT_ENUM_IDX(SIM_SELECT_NODE, sim) == 0) {
|
||||
(void)gpio_pin_configure_dt(&sim, GPIO_OUTPUT_HIGH);
|
||||
LOG_INF("eSIM is selected");
|
||||
} else {
|
||||
(void)gpio_pin_configure_dt(&sim, GPIO_OUTPUT_LOW);
|
||||
LOG_INF("External SIM is selected");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* SIM_SELECT */
|
||||
|
||||
#if DT_HAS_COMPAT_STATUS_OKAY(actinius_charger_enable)
|
||||
static int actinius_board_set_charger_enable(void)
|
||||
{
|
||||
const struct gpio_dt_spec charger_en =
|
||||
GPIO_DT_SPEC_GET(CHARGER_ENABLE_NODE, gpios);
|
||||
|
||||
if (!device_is_ready(charger_en.port)) {
|
||||
LOG_ERR("The Charger Enable Pin port is not ready");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (DT_ENUM_IDX(CHARGER_ENABLE_NODE, charger) == 0) {
|
||||
(void)gpio_pin_configure_dt(&charger_en, GPIO_OUTPUT_LOW);
|
||||
LOG_INF("Charger is set to auto");
|
||||
} else {
|
||||
(void)gpio_pin_configure_dt(&charger_en, GPIO_OUTPUT_HIGH);
|
||||
LOG_INF("Charger is disabled");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CHARGER_ENABLE */
|
||||
|
||||
static int actinius_board_init(const struct device *dev)
|
||||
{
|
||||
ARG_UNUSED(dev);
|
||||
|
||||
int result = 0;
|
||||
|
||||
#if DT_HAS_COMPAT_STATUS_OKAY(actinius_sim_select)
|
||||
result = actinius_board_set_sim_select();
|
||||
if (result < 0) {
|
||||
LOG_ERR("Failed to set the SIM Select Pin (error: %d)", result);
|
||||
/* do not return so that the rest of the init process is attempted */
|
||||
}
|
||||
#endif
|
||||
|
||||
#if DT_HAS_COMPAT_STATUS_OKAY(actinius_charger_enable)
|
||||
result = actinius_board_set_charger_enable();
|
||||
if (result < 0) {
|
||||
LOG_ERR("Failed to set the Charger Enable Pin (error: %d)", result);
|
||||
/* do not return so that the rest of the init process is attempted */
|
||||
}
|
||||
#endif
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/* Needs to happen after GPIO driver init */
|
||||
SYS_INIT(actinius_board_init,
|
||||
POST_KERNEL,
|
||||
CONFIG_ACTINIUS_BOARD_CONTROL_INIT_PRIORITY);
|
||||
|
||||
#endif /* SIM_SELECT || CHARGER_ENABLE */
|
||||
Loading…
Add table
Add a link
Reference in a new issue