Commit graph

84511 commits

Author SHA1 Message Date
Pavel Vasilyev
6267259f91 Bluetooth: Mesh: Use decimals instead of hex nums in DFD shell cmds
JSON doesn't support hexdecimals as numbers.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2023-09-22 09:30:07 +02:00
Brunon Blok
bac9b73442 boards: arm: enable stmpe811 on stm32f429i_disc1
Enable STMPE811 driver on stm32f429i_disc1 board.

Signed-off-by: Brunon Blok <bblok@internships.antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-09-22 09:29:56 +02:00
Brunon Blok
bf830ba780 drivers: input: add driver for stmpe811 i2c touch controller
This commit adds STMPE811 I2C touch controller driver.

Signed-off-by: Brunon Blok <bblok@internships.antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-09-22 09:29:56 +02:00
Anas Nashif
2857f781b4 boards: atmel atsamr34: fix vendor in compatible
Fix vendor in compatible and match vendor database.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-22 09:29:36 +02:00
Anas Nashif
9a0e8325f9 boards: cypress cy8xx: fix vendor in compatible
Fix vendor in compatible and match vendor database.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-22 09:29:36 +02:00
Anas Nashif
08cf158926 boards: laird BLXX: fix vendor in compatible
Fix vendor in compatible and match vendor database.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-22 09:29:36 +02:00
Anas Nashif
7d2c91aa7e boards: lpcxpresso11u68: add vendor to compatible
Add nxp as the vendor in the compatible.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-22 09:29:36 +02:00
Anas Nashif
e560bd6b8c boards: intel_adsp: fix board compatible
compatible was missing the hardware information.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-22 09:29:36 +02:00
Anas Nashif
c3827ec48e boards: add vendor to board yaml
This is coming from devicetree and corrosponds to what we have in the
dts/bindings/vendor-prefixes.txt file.

This will allow for static filtering, especially with twister, i.e. no
need to build anything to know the vendor of a board

All of the vendor data was extracted automatically from the devicetree,
so some platforms might not have the right vendor or no vendor at all
right now, we need to fix some of the DTS information or do this
manually to get this 100% correct. But we are close.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-22 09:29:36 +02:00
Anas Nashif
3966d30a4f twister: support filtering by vendor
Add a new option --vendor which allows filtering by vendors tracked in
the board/platform yaml file. The vendor string is compatible with DTS
and is what we have in dts/bindings/vendor-prefixes.txt.

Providing multiple vendors is also supported.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-22 09:29:36 +02:00
Carlo Caione
85c4111002 memory-attr: Rationalize _MASK and _GET(x) macros
Let's make this official: we use the suffix `_MASK` for the define
carrying the GENMASK for the attributes, and the suffix `_GET(x)` for
the actual macro extracting the attributes.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-09-22 09:27:57 +02:00
Petr Hlineny
b2fb3d49bf drivers: i2c: stm32: Fix for i2c PM
Remove unwanted "pm_device_runtime_get" lock which makes i2c power
management working incorrectly.

Fixes: #62790
Signed-off-by: Petr Hlineny <development@hlineny.cz>
2023-09-22 09:27:46 +02:00
Robert Lubos
05e974cab0 net: openthread: Fix TX time inconsistency in multi-CCA TX mode docs
Align with other delayed TX modes, by specifying the transmit time as
the start of the frame PHR, not SHR.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2023-09-22 09:27:35 +02:00
Fabian Blatz
b94641697f samples/modules: Add LVGL demo sample
Adds a sample which allows to build the LVGL upstream demo applications
(music, benchmark, stress).

Resolves issue #62744.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2023-09-22 09:26:29 +02:00
Jaxson Han
2a8548b036 tests: Kernel: semaphore: semaphore: Set test case to 1cpu
The test_sem_take_timeout_isr depends on the thread's priority. But for
SMP platforms, the priority is different with no-SMP. High-priority
threads and low-priority threads might run simultaneously at different
cores. Set the test case run at 1cpu to fix such an issue.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
5b8df16ef6 samples: arch: smp: pi: fix the stack overflow issue
The stack guard report this testcase has the stack overflow issue. To
fix the issue, slightly increse the stack size.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
64086d04d5 tests: kernel: threads: dynamic_thread: increase the heap size
The heap size is not enough so that it will cause the testcase fail.
Increase to 32k to make sure it works for a long time in the future.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
eeaf3bdb2d tests: posix: eventfd: Move thread from stack to data section
The test case allocate struct k_thread thread in the stack. This will
lead the random initial value of thread and thus cause the test cases
randomly hang. To fix such issue, move the declartion of struct k_thread
thread outside the function as a stacic variable.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
0928830409 arch: arm64: Enable stack guard for v8R
Enable stack guard for v8R which is backed by MPU.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
5878898328 arch: arm64: Add stack guard support for MPU
To make the stack guard works well, clean and refine the MPU code. To
save the MPU regions (the number of MPU regions are limited), we choose
to remove the guard region. Comparing to add an individual region to
guard the stack, removing the guard region can at least save 2 regions
per core.

Similarly with userspace, the stack guard will leverage the dynamic
regions switching mechanism which means we need a region switch during
the context switch. Otherwise, the other option is using stack guard
region, but this is very limited since the number of MPU regions is
limited.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
d3ec98806d arch: arm64: Refactor the stack relevant macros
Refactor the stack relevant macros to prepare to introduce the stack
guard. Also add comments about the changes related to stack layout.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
d4dd47b9c5 arch: arm64: Add stack check at z_arm64_fatal_error
Add the stack check function z_arm64_stack_corruption_check at
z_arm64_fatal_error to handle the stack overflow triggered by the
hardware region.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
1fe9a06d8b arch: arm64: Kconfig: Introduce ARM64_STACK_PROTECTION
Introduce the ARM64_STACK_PROTECTION config. This option leverages the
MMU or MPU to cause a system fatal error if the bounds of the current
process stack are overflowed. This is done by preceding all stack areas
with a fixed guard region. The config depends on MPU for now since MMU
stack protection is not ready.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
1ac3d1cc5e arch: arm64: thread: Clean thread arch when creating thread
Clean the thread->arch during the arch_new_thread to avoid unexpected
behavior. If the thread struct is allocated from heap or in stack, the
data in thread->arch might be dirty.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Jaxson Han
c57fa2c231 arch: arm64: Fix the cache coherence issue
Accessing mem before mmu or mpu init will cause a cache coherence issue.
To avoid such a problem, move the safe exception stack init function
after the mmu or mpu is initiated.

Also change the data section attribute from INNER_SHAREABLE to
OUTER_SHAREABLE. Otherwise there will be a cache coherence issue during
the memory regions switch. Because we are using background region to do
the regions switch, and the default background region is
OUTER_SHAREABLE, if we use INNER_SHAREABLE as the foreground region,
then we have to flush all cache regions to make sure the cached values
are right. However, flushing all regions is too heavy, so we set
OUTER_SHAREABLE to fix this issue.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-09-22 09:25:12 +02:00
Manuel Argüelles
cdcba384bc spi: nxp_s32: use clock control APIs
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:24:40 +02:00
Manuel Argüelles
be08ce18d0 wdt: nxp_s32: use clock control APIs
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:24:32 +02:00
Daniel Baluta
b4998c357e mm_drv: tlb: Fix compile time warning
This fixes the following compile time warning;

drivers/mm/mm_drv_intel_adsp_mtl_tlb.c: In function 'sys_mm_drv_mm_init':
include/zephyr/sys/__assert.h:44:52: error: format '%p' expects argument
of type 'void *', but argument 2 has type
'long unsigned int' [-Werror=format=]
__ASSERT_PRINT("\t" fmt "\n", ##__VA_ARGS__)

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-09-22 09:24:02 +02:00
Pavel Vasilyev
ac050455c5 Bluetooth: Mesh: Fix printing device UUID
IS_ENABLED was incorrectly used here.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2023-09-22 09:23:44 +02:00
Manuel Argüelles
45c8cb2343 counter: nxp_pit: use clock control to obtain module's clock rate
Use standard clock control API to retrieve the PIT clock rate instead of
using the HAL.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:23:30 +02:00
Manuel Argüelles
ddaacd9ee8 counter: nxp_pit: allow to specify max load value
The PIT maximum load value may not be always 32-bit. Allow the SoC to
define this value from devicetree.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:23:30 +02:00
Manuel Argüelles
f8e16ae81a counter: nxp_pit: support flexible number of interrupts
Depending on the SoC design, the PIT channel interrupts can be
individual or OR'ed together to a single interrupt line.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:23:30 +02:00
Manuel Argüelles
d590fb2f78 counter: nxp_pit: support only top callback
This periodic timer (PIT) has a single load value register for each
channel, which is currently used for both alarm and top callback APIs.
If using both APIs together (which is a valid use-case) it will write
to the same register causing unexpected behavior of the timer.

The nature of the PIT is to trigger an event (like interrupts) at a
certain rate, and not to produce single-shot events. Hence keep only top
callback functionality.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:23:30 +02:00
Manuel Argüelles
e22f634f33 counter: nxp_pit: support multiple instances
Add support for multiple device instances.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:23:30 +02:00
Tomasz Bursztyka
ba02d85c74 doc/nvme: NVMe mandates dword-aligned buffer addresses
In Zephyr, this is let to the disk access API user. There is nothing the
driver can do about it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2023-09-22 09:23:18 +02:00
Tomasz Bursztyka
95b8493857 drivers/nvme: Return an error in case of non dword-aligned data buffer
This is a specific case for NVMe where given data buffer pointers must
be dword (4 bytes) aligned.

There is no virtual memory management between the user thread and NVMe
driver (which one could detect such wrong alignement on physical memory
and thus reallocate the memory properly, so it would be fully
transparent for the user thread), thus the need to push that check to
the user.

This has been going under the radar so far as Qemu does not seem to
follow NVMe specifications where PRP1 (in DPTR) must always be
dword-aligned. It really does not follow the rule: specifications
details that if bits 1:0 of PRP1 are set, the controller may generate
an error or treat the address as if these bits were unset. Seems like
a bug in Qemu, I did not check the code there however.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2023-09-22 09:23:18 +02:00
Tomasz Bursztyka
2caced752a drivers/nvme: Rewrite how data pointer is filled
Former way was difficult to read, so let's have a better way which
easily follows the specifications.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2023-09-22 09:23:18 +02:00
Tomasz Bursztyka
f21760252a drivers/nvme: Make sure PRP2 value is encoded in little endian.
To avoid issue in address translation when CPU is running in big endian.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2023-09-22 09:23:18 +02:00
Tomasz Bursztyka
0b45688335 drivers/nvme: Rely on CONFIG_MMU_PAGE_SIZE for PRP
Getting rid of 4Kib page size hardcoded value on PRP handling.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2023-09-22 09:23:18 +02:00
Tomasz Bursztyka
eeea64a19c drivers/nvme: Add debug information in case of request error
This will provide a detailed error status report.

As for most of the original code of the driver, this is a backport of
the work done by Jim Harris in FreeBSD.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2023-09-22 09:23:18 +02:00
Mulin Chao
68dd26574c boards: arm: npcx: add support for npcx4m8f_evb
Add support for npcx4m8f_evb board that is a development platform to
evaluate the Nuvoton NPCX4 embedded controller.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-09-22 09:23:06 +02:00
Fabio Baltieri
794893315a intc: loapic: convert DEVICE_DEFINE to DEVICE_DT_INST_DEFINE
Convert DEVICE_DEFINE to DEVICE_DT_INST_DEFINE, this allows the build
system to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
ceb02b3f31 intc: intc_nxp_pint: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Adjust some DT_INST macro as well while at it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
e9a67aabf7 intc: swerv_pic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
aea618ebc0 intc: nuclei_eclic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
a7e0cb0c80 intc: vexriscv_litex: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Fix an incorrectly declared compatible and adjust some DT macros as
well.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
6fbe62bdb5 intc: arcv2: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
17ae9a7680 intc: gic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
1539ca906e intc: irqmp: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00
Fabio Baltieri
843f66f52d intc: plic: convert SYS_INIT to DEVICE_DT_INST_DEFINE
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-22 09:22:55 +02:00