- Fixes mcxw71 CI errors caused by wrong place
of the 'flash' node in DTS.
- Fixes mcxw71 build errors for storage, flash
and mcuboot examples.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Rename rpi_pico_common.dtsi to rp2040_reset.h . This is more consistent
with the wider Zephyr source tree, and is foundation work ahead of
introducing the RP2350 SoC.
Add missing include guard. This shouldn't be required, but it is
consistent with other header files in the same directory.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Follow the wider directory convention of dts/<arch>/<vendor>/<family>.
This is foundation work ahead of introducing support for the RP2350.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
This commit is to enable Ethernet drivers support on Renesas RA
MCU, first target support is the Renesas RA8 series
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Added dppic0 node label, alongside the dppic to maintain backward
compatibility. The use of dppic0 is preferred.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Rename "nxp,kinetis-adc12" compatible to "nxp,adc12" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Rename "nxp,kinetis-wdog32" compatible to "nxp,wdog32" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The DPPI and PPIB peripheral nodes must be enabled to allow the
CONFIG_HAS_HW_NRF_DPPIC to be set. This change is consistent with what
was done on nRF5340 and does not introduce any additional memory
overhead, because there is no Zephyr driver behind the nrf-dppic and
nrf-ppib bindings.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Allow configuring the clock prescaler divider for the NXP Kinetis
Timer/PWM Module (TPM). Setting the prescaler to a lower value
allows for higher resolution for the generated PWM waveforms.
This change is inspired from the pwm_mcux_ftm driver:
Link: https://github.com/zephyrproject-rtos/zephyr/pull/25396
Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
Add DT definitions for the RAK3172 LoRaWAN module, based on
STM32WLE5.
Ref. https://docs.rakwireless.com/product-categories/wisduo/
rak3172-module/low-level-development/
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The GECKO_PIN() macro does not do anything except pass the
argument through unaltered. It only serves to make DeviceTree
files more verbose. It was inconsistently used, make the .dts
files consistent by never using it.
The DBUS pinctrl driver doesn't use the port or location macros
from the gpio_gecko.h header. The pin number macro is the only
other thing defined in this header. Stop including the header on
Series 2 based boards.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Swap from silabs,gecko-pinctrl to silabs,dbus-pinctrl for all boards
with Series 2 SoCs. Explicitly declare pin properties as part of
pinctrl pinout configuration.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Flash node should not be under the peripheral bus, it is not a
peripheral. The base address of the flash was getting set correctly by
accident due to the fmu node mapping it out of the range of the
peripheral node by coincidence.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Convert the eDMA compat to prop version for NXP S32Z2 SoC
that was missed in commit b070da7c33.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add devicetree node for code RAM, code RAM can be accessed
over AIXM bus or AXIF bus. Code access via AXIF interface
provides the best optimal performance
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
The NXP PORT pinmuxing peripheral is reused across the MCX, S32, and
Kinetis lines. Rename the compatible from the family-specific
nxp,kinetis-pinctrl to a more generic nxp,port-pinctrl to reflect the
actual name for the IP block used within reference manuals.
Update the NXP HAL revision to include a change to use the new Kconfig
name for the PORT pinctrl driver
Update the MAINTAINERS.yml path, as there are no longer any NXP drivers
matching the string "drivers/*/*kinetis*
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Split and fix the total SRAM size for STM32L4Px/L4Qx/L4Rx/L4Sx
device. Those MCUs with up to 640 Kbytes SRAM:
This is 640KB for the STM32L4Rxxx and STM32L4Sxxx devices :
• 192 Kbytes SRAM1 + 64 Kbytes SRAM2 + 384 Kbytes SRAM3
This is 320KB for the STM32L4P5xx and STM32L4Q5xx devices :
• 128 Kbytes SRAM1 + 64 Kbytes SRAM2 + 128 Kbytes SRAM3
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Split and fix the total SRAM size for STM32L47x/L48x/L49x/L4Ax
device. Those MCUs with up to 320 Kbytes SRAM:
• 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x.
• 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax
The sram0 node at address 0x20000000 and sram1 at address 0x10000000
Signed-off-by: Francois Ramu <francois.ramu@st.com>
These two new ICs are variants of the nRF54L15 with different memory
sizes:
- nRF54L05: 500KB RRAM, 96KB RAM
- nRF54L10: 1022KB RRAM, 192KB RAM
- nRF54L15: 1524KB RRAM, 256KB RAM
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Removing direct #define usage in the DTSI file and converting these
definitions to use a dt-bindings header instead.
Relocates the RPI_PICO_DEFAULT_IRQ_PRIORITY definition to a DTSI file and
introduces an override.dtsi file. The override file is used when no other
override file is present, allowing for better flexibility and compliance
with Zephyr’s DTS structure.
Fixes: #79719
Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io>
Convert the numerous revision compatibles to a DT property for the
revision called nxp,version (inspired from a linux DT property from
st called st,version on their DMA).
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This moves the SRAM definitions for STM32H56/7x chips up to the top
level since they are common to all of them.
Signed-off-by: Djordje Nedic <nedic.djordje2@gmail.com>
- stm32cO11/31 share the same spi peripheral
- include stm32_dma header to be able to configure
spi with dma config macros (STM32_DMA_PERIPH_TX,...)
in dts
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Add USB node to apollo4p and apollo4p_blue qualifier, and apollo4p_evb
and apollo4p_blue_kxr_evb board to enableUSB support on the MCU and
its EVB.
Signed-off-by: Chew Zeh Yang <zeon.chew@ambiq.com>
Add npcm miscellaneous device control and power and clock control
instances.
Add device tree bindings for npcm power and clock control.
Signed-off-by: Alan Yang <tyang1@nuvoton.com>
