In the change to DTS driven clock divider values wrong values
were used in the dts file.
Fixes: #33559
Signed-off-by: David Leach <david.leach@nxp.com>
The AN547 is a Soft Macro Model implementation of the SSE-300 subsystem
with Ethos-U55 and Cortex-M55 components targeting the MPS3 board.
The SoC support is based on the AN521 MPS2+ support that already exists
in Zephyr.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add initial support for the Cortex-M55 Core which is an implementation
of the Armv8.1-M mainline architecture and includes support for the
M‑profile Vector Extension (MVE).
The support is based on the Cortex-M33 support that already exists in
Zephyr.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
UARTs in Nordic devices only support a specified list of baud rates.
Choosing a different baud rate without this patch will cause a runtime
error, whereas with the constraint, this mistake is already found in
dts construction with a useful error message.
Signed-off-by: Peter Niebert <peter.niebert@univ-amu.fr>
This patch includes initial support for FT800 display driver.
It includes basic features. It can be easily extended with more
FT800 display list and co-processor features.
Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
Add support to control DE/nRE RS-485 transceiver signals
over GPIO pins. Useful if the UART controller does not
support RS-485 mode.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add MODBUS RTU (over serial line) subsystem.
MODBUS RTU implementation supports booth server and
client roles. Some components of the implementation are based
on the uC/Modbus stack, which was published under Apache license,
(https://github.com/SiliconLabs/uC-Modbus
fdd1218a28e313c1212fed5ed42e5c65d3056a2c).
Resolves: #2854
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
In NPCX chips, System Configuration module can configure not only
pinctrl but also misc. functionality such as glue and flash write
protection. This change moves the scfg driver from the pinctrl folder
to soc/arm/nuvoton_npcx/common and renames it to avoid confusion.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Adds support for the Texas Instruments FDC2X1X Capacitance-to-Digital
Converter for Proximity and Level Sensing Applications.
Signed-off-by: Igor Knippenberg <igor.knippenberg@gmail.com>
Restructures dts files(value line definitions are no longer included by
others), and adds additional devices(g05x and g0bx).
All newly added timer pwm prescalers are set to 0.
lpuart1 is moved from stm32g0.dtsi to stm32g031.dtsi, as it is not
available on stm32g0x0 soc.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
"interrupt-names: combined" propterty is only used for stm32 i2c driver,
remove all other existing occurences for stm32g0(adc, lpuart, usart).
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add optional maximum-speed parameter to USB nodes. This affects all
defined stm32l4xx, except stm32l4rx and stm32l4sx
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
This parameter is defined for stm32f405 which and is included into
stm32f469. The include order is as follows:
st/f4/stm32f4.dtsi
st/f4/stm32f401.dtsi
st/f4/stm32f405.dtsi <-- ram_size defined here
st/f4/stm32f407.dtsi
st/f4/stm32f427.dtsi
st/f4/stm32f429.dtsi
st/f4/stm32f469.dtsi
Refer to Application Note AN4879 from ST to view ram size for each MCU.
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
Introduce PSoC-6 pinctrl infraestructure and definitions. This add
files to handle devicetree entries and following modifications:
- add pinctrl bindings
- update gpio bindings with pin-cells
- add pinctrl node and move gpio nodes inside
- declare pinctrl for current uart entries
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Added file with common properties for cortex-m cores.
Added optional swo-ref-frequency property.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add GPIO definitions to QuickLogic EOS S3 devicetree.
Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>
Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
In some stm32 series systick was disabled in order to
allow alternate use of lptim timer as kernel low power ticker.
Doing this, dts based definition of CORTEX_M_SYSTICK Kconfig symbol
is disabled and CORTEX_M_SYSTICK was redefined with 'default y'
in stm32 soc files which makes things more complex to handle to
alternate with LPTIM activation.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To keep the generic DMA device name as defined
in the dma framework config, renamed paxdma device
label to "DMA_1".
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Use kinetis SIM clock divider options set in device tree
instead of hardcoded values.
The kl25z device tree did not previously define a MCG node.
This has now been added with the general "nxp,kinetis-mcg"
binding.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Use kinetis SIM clock divider options set in device tree
instead of kconfig.
The kv5x device tree originally used the undefined
"nxp,kv58-mcg" binding for the MCG node. This has been
replaced by the general "nxp,kinetis-mcg" binding.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Use kinetis SIM clock divider options set in device tree
instead of kconfig.
Both the kw40z and kw41z device tree originally used an
undefined "nxp,kw41z-mcg" binding for the MCG node.
This has been replaced with the general "nxp,kinetis-mcg"
binding instead.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
add CAN_1 and CAN_2 hw modules support
Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
Co-authored-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update register addresses and NVIC/GIC interrupt numbers
according to the latest viper RTL version.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
AArch64 has support for PSCI. This is especially useful for SMP because
PSCI is used to power on the secordary cores.
When the PSCI driver was introduced in Zephyr it was designed to rely on
a very PSCI-centric subsystem / interface.
There are two kinds of problems with this choice:
1. PSCI is only defined for the non-secure world and it is designed to
boot CPU cores into non-secure state (that means that PSCI is only
supposed to work if Zephyr is running in non-secure state)
2. There can be other ways or standards used to start / stop a core
different from PSCI
This patch is trying to fix the original wrong assumption by making the
interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI
only as an actual driver that is a user of this new interface /
subsystem.
For now the new subsystem is only exposing two methods: cpu_on and
cpu_off, others will probably follow according to the needs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The DMA bindings had duplicate description: keys. Merge the two
descriptions into one to fix the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Many data items that are represented in a pin configuration node are
common and generic. Pin control bindings should use the properties
defined on a standard way when are applicable; not all of these
properties are relevant or useful for all hardware or binding
structures. Each individual binding document should state which of
these generic properties, if any, are used, and the structure of the
DT nodes that contain these properties.
This is based on Linux, documentation:
https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add device tree nodes for the Digital-to-Analog (DAC) modules present
in the NXP Kinetis K2x series.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Conver the NIOS-II mSGDMA driver to be devicetree based. Add node for
dma controller into nios2f.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
