Cache was not enabled when s2ram did not completed which
lead to system malfunction. Always power up cache when
returning from s2ram function.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Make the compilation of vpr_launcher dependent on sysbuild Kconfig
that can be set by SoC.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Code responsible for internal capacitor values containted
leftover workarounds in the calculations after PS update.
Removed redundant conversions and cleaned up both code
and comments to align both LFXO and HFXO calculation.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
MDK 8.69.1 included in nrfx 3.10 already applies the workaround,
so there is no need to do it again.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Port the nordicsemi_nrf53_init to use soc_early_init_hook instead of
SYS_INIT as SYS_INIT is legacy.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Disable GPD for MCUBoot build, as it cannot be
reinitialized later in application (SDFW does not
support reinitialization).
Also, remove the GPD disabling from the mcumgr sample
for nRF54H20 iron board app - it was the reinitialization
that caused problems.
Signed-off-by: Michal Kozikowski <michal.kozikowski@nordicsemi.no>
Provide proper adaptions as bootloader ROM offset, flash load
offset and dts definitions for the nRF54H20 iron board to make it
ready for the MCUBoot bootloader.
Signed-off-by: Michal Kozikowski <michal.kozikowski@nordicsemi.no>
Add nrf_cache_power_up and nrf_cache_power_down functions. In case of
s2ram power up cache as early as possible, before restoring ARM core
registers. It improves restore time from 180 us to 33 us.
As a minor optimization nrf_memconf_ramblock_control_mask_enable_set is
used which allows to control ram blocks for icache and dcache in a
single register write.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add an entry for the RAM region assigned to soft peripherals that will
disable caching for that region. Without this, communication with the
FLPR coprocessor cannot be performed correctly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
nrf54h20 device requires device runtime PM to be enabled when
device PM is in use.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
RAM power configuration is preserved through soft reset,
meaning that there is a risk of accessing powered off RAM blocks
when booting in different application (i.e. bootloader).
Add option to force all RAM blocks to be powered on
before triggering soft reset to prevent this from happening.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
It is defined as spis120 rather than spi120,
because spi120 is already used for SPIM120 hardware instance,
but their base address is different.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Add calls to sys_trace_idle and sys_trace_idle_exit in nrf54h specific
idle states to allow measuring CPU load on nrf54h20 when power
management is enabled.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Added configuration for new audio PLL service.
Pull in new service implementation in new hal nordic.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
Enabled west flash and west erase for nRF54L20 PDK FLPR core.
Added missing reset qualifier for nRF54L20 and nRF54L09.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Added Kconfig options to allow use of TWIM frequency
workaround in NRFX for nRF52 and nRF53.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
A few option defaults that were so far defined in the board _defconfig
files are actually entirely SoC family (nRF54L) dependant, so it makes
much more sense to have them defined at the SoC family level in order
for all boards based on these SoCs to automatically inherit them.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Protection circuit must be disabled to use NFCT antenna pins
as GPIOs. It can be done by adding nfct-pins-as-gpios to nfct
node in the devicetree in cpuapp. Node must be disabled as
NFCT is not used. In legacy platforms same property was added
to uicr node because that information was stored in UICR. In
nrf54h20 it is not part of UICR so property is part of nfct
node.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
VPR (FLPR) on nRF54L series has fixed issue with sleeping so
custom CPU idle function does not need to be used there.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Move macro from nrf_clock_control.h to soc_nrf_common.h. Clock control
header fetches many dependencies (e.g. onoff.h) so move macro to more
low level header.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Include configuration file for cases when this file is complied
in special builds (e.g. TFM).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Instead of forwarding pins to the network core during the
initialization, do it just before reseting the network core. With
this approach pins can be used by the application core as long as
network core is not started.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The main thread, if configured with coop priority (don't do that :D)
breaks gpd since it has a non yielding while loop (also don't do that)
Add an explicit yield() to allow other threads to run if main or other
threads use gpd with coop prio.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Code is now incorporated into SystemInit() function of MDK 8.69.1,
which is integrated within nrfx 3.10.0.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
This hides the deprecation warning when UART_NRFX_UARTE_LEGACY_SHIM is
false because UART is not used.
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
When RISCV_SOC_HAS_ISR_STACKING is used, it may
be needed to initialize custom hw stacked esf members.
Some initial values may need to be aligned with
hw stacking mechanism to avoid any side effects.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
The tp register has been remove from the common RISC-V stack frame so
remove it from the VPR specific variant declared via
SOC_ISR_STACKING_ESF_DECLARE. This saves 4 bytes and allows removing a
lot of padding to get the 16B aligned size.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Some time ago a new shim for nRF UARTE was added (uart_nrfx_uarte2.c)
which used nrfx_uarte.c driver underneath. It was supposed to support
nrf54x platforms. However, later on legacy driver (uart_nrfx_uarte.c)
was extended to support nrf54x platforms and it takes less code size,
has better performance and more features. Shim uart_nrfx_uarte2 will
no longer be supported. As new shim is the default and there is a
Kconfig to pick the legacy shim (CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y)
it cannot be deprecated in the normal way. Additional Kconfig option
is created (DEPRECATED_UART_NRFX_UARTE_LEGACY_SHIM) which is enabled
if CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n and it selects DEPRECATED.
A warning was also added to the CMakeLists.txt.
Patch removes use CONFIG_UART_NRFX_UARTE_LEGACY_SHIM in tests.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
