soc: nordic: add support for SPIS120 instance
It is defined as spis120 rather than spi120, because spi120 is already used for SPIM120 hardware instance, but their base address is different. Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
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4 changed files with 19 additions and 6 deletions
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@ -649,6 +649,20 @@
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#pwm-cells = <3>;
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};
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spis120: spi@8e5000 {
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compatible = "nordic,nrf-spis";
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reg = <0x8e5000 0x1000>;
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status = "disabled";
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power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
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easydma-maxcnt-bits = <15>;
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interrupts = <229 NRF_DEFAULT_IRQ_PRIORITY>;
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clocks = <&hsfll120>;
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max-frequency = <DT_FREQ_M(32)>;
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#address-cells = <1>;
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#size-cells = <0>;
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nordic,clockpin-enable = <NRF_FUN_SPIS_SCK>;
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};
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spi120: spi@8e6000 {
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compatible = "nordic,nrf-spim";
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reg = <0x8e6000 0x1000>;
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@ -662,8 +676,7 @@
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#size-cells = <0>;
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rx-delay-supported;
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rx-delay = <1>;
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nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
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<NRF_FUN_SPIS_SCK>;
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nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>;
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};
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uart120: uart@8e6000 {
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@ -690,8 +703,7 @@
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#size-cells = <0>;
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rx-delay-supported;
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rx-delay = <1>;
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nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
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<NRF_FUN_SPIS_SCK>;
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nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>;
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};
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cpuppr_vpr: vpr@908000 {
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@ -643,7 +643,7 @@ config NRFX_SPIS30
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config NRFX_SPIS120
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bool "SPIS120 driver instance"
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depends on $(dt_nodelabel_exists,spi120)
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depends on $(dt_nodelabel_exists,spis120)
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select NRFX_SPIS
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config NRFX_SPIS130
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@ -340,7 +340,7 @@ config HAS_HW_NRF_SPIS30
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def_bool $(dt_nodelabel_enabled_with_compat,spi30,$(DT_COMPAT_NORDIC_NRF_SPIS))
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config HAS_HW_NRF_SPIS120
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def_bool $(dt_nodelabel_enabled_with_compat,spi120,$(DT_COMPAT_NORDIC_NRF_SPIS))
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def_bool $(dt_nodelabel_enabled_with_compat,spis120,$(DT_COMPAT_NORDIC_NRF_SPIS))
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config HAS_HW_NRF_SPIS130
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def_bool $(dt_nodelabel_enabled_with_compat,spi130,$(DT_COMPAT_NORDIC_NRF_SPIS))
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@ -277,6 +277,7 @@ CHECK_DT_REG(spi134, NRF_SPIM134);
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CHECK_DT_REG(spi135, NRF_SPIM135);
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CHECK_DT_REG(spi136, NRF_SPIM136);
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CHECK_DT_REG(spi137, NRF_SPIM137);
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CHECK_DT_REG(spis120, NRF_SPIS120);
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CHECK_DT_REG(spu, NRF_SPU);
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CHECK_DT_REG(swi0, NRF_SWI0);
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CHECK_DT_REG(swi1, NRF_SWI1);
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