soc: nordic: add support for SPIS120 instance

It is defined as spis120 rather than spi120,
because spi120 is already used for SPIM120 hardware instance,
but their base address is different.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
This commit is contained in:
Nikodem Kastelik 2025-02-28 13:01:05 +01:00 committed by Benjamin Cabé
commit d8506af12a
4 changed files with 19 additions and 6 deletions

View file

@ -649,6 +649,20 @@
#pwm-cells = <3>;
};
spis120: spi@8e5000 {
compatible = "nordic,nrf-spis";
reg = <0x8e5000 0x1000>;
status = "disabled";
power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
easydma-maxcnt-bits = <15>;
interrupts = <229 NRF_DEFAULT_IRQ_PRIORITY>;
clocks = <&hsfll120>;
max-frequency = <DT_FREQ_M(32)>;
#address-cells = <1>;
#size-cells = <0>;
nordic,clockpin-enable = <NRF_FUN_SPIS_SCK>;
};
spi120: spi@8e6000 {
compatible = "nordic,nrf-spim";
reg = <0x8e6000 0x1000>;
@ -662,8 +676,7 @@
#size-cells = <0>;
rx-delay-supported;
rx-delay = <1>;
nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
<NRF_FUN_SPIS_SCK>;
nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>;
};
uart120: uart@8e6000 {
@ -690,8 +703,7 @@
#size-cells = <0>;
rx-delay-supported;
rx-delay = <1>;
nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
<NRF_FUN_SPIS_SCK>;
nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>;
};
cpuppr_vpr: vpr@908000 {

View file

@ -643,7 +643,7 @@ config NRFX_SPIS30
config NRFX_SPIS120
bool "SPIS120 driver instance"
depends on $(dt_nodelabel_exists,spi120)
depends on $(dt_nodelabel_exists,spis120)
select NRFX_SPIS
config NRFX_SPIS130

View file

@ -340,7 +340,7 @@ config HAS_HW_NRF_SPIS30
def_bool $(dt_nodelabel_enabled_with_compat,spi30,$(DT_COMPAT_NORDIC_NRF_SPIS))
config HAS_HW_NRF_SPIS120
def_bool $(dt_nodelabel_enabled_with_compat,spi120,$(DT_COMPAT_NORDIC_NRF_SPIS))
def_bool $(dt_nodelabel_enabled_with_compat,spis120,$(DT_COMPAT_NORDIC_NRF_SPIS))
config HAS_HW_NRF_SPIS130
def_bool $(dt_nodelabel_enabled_with_compat,spi130,$(DT_COMPAT_NORDIC_NRF_SPIS))

View file

@ -277,6 +277,7 @@ CHECK_DT_REG(spi134, NRF_SPIM134);
CHECK_DT_REG(spi135, NRF_SPIM135);
CHECK_DT_REG(spi136, NRF_SPIM136);
CHECK_DT_REG(spi137, NRF_SPIM137);
CHECK_DT_REG(spis120, NRF_SPIS120);
CHECK_DT_REG(spu, NRF_SPU);
CHECK_DT_REG(swi0, NRF_SWI0);
CHECK_DT_REG(swi1, NRF_SWI1);