soc: nordic: nrf54l: Setup power and clock only on secure build
Setup regulators and oscillators only on cpuapp secure target. Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
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1 changed files with 33 additions and 25 deletions
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@ -13,45 +13,38 @@
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*/
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#include <zephyr/devicetree.h>
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#include <zephyr/dt-bindings/regulator/nrf5x.h>
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#include <zephyr/kernel.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/init.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/cache.h>
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#include <zephyr/dt-bindings/regulator/nrf5x.h>
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#include <soc/nrfx_coredep.h>
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#include <system_nrf54l.h>
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#include <soc.h>
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LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
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#if defined(NRF_APPLICATION)
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#include <cmsis_core.h>
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#if (defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)) || \
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!defined(__ZEPHYR__)
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#include <nrf_erratas.h>
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#include <hal/nrf_glitchdet.h>
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#include <hal/nrf_oscillators.h>
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#include <hal/nrf_power.h>
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#include <hal/nrf_regulators.h>
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#endif
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#include <soc/nrfx_coredep.h>
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#include <zephyr/dt-bindings/regulator/nrf5x.h>
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#include <nrf_erratas.h>
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#include <system_nrf54l.h>
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#include <zephyr/drivers/clock_control/nrf_clock_control.h>
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LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
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#if defined(NRF_APPLICATION)
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#define LFXO_NODE DT_NODELABEL(lfxo)
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#define HFXO_NODE DT_NODELABEL(hfxo)
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#endif
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static int nordicsemi_nrf54l_init(void)
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static inline void power_and_clock_configuration(void)
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{
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/* Update the SystemCoreClock global variable with current core clock
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* retrieved from the DT.
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*/
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SystemCoreClock = NRF_PERIPH_GET_FREQUENCY(DT_NODELABEL(cpu));
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#if defined(NRF_APPLICATION)
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/* Enable ICACHE */
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sys_cache_instr_enable();
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/* NRF_REGULATORS and NRF_OSCILLATORS are configured to be secure
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* as NRF_REGULATORS.POFCON is needed by the secure image to
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* prevent glitches when the power supply is attacked.
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*
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* NRF_OSCILLATORS is also configured as secure because of a HW limitation
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* that requires them to be configured with the same security property.
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*/
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#if DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, internal)
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uint32_t xosc32ktrim = NRF_FICR->XOSC32KTRIM;
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@ -165,7 +158,22 @@ static int nordicsemi_nrf54l_init(void)
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nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_MAIN, true);
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#endif
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#endif /* NRF_APPLICATION */
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}
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#endif /* NRF_APPLICATION && !CONFIG_TRUSTED_EXECUTION_NONSECURE */
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int nordicsemi_nrf54l_init(void)
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{
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/* Update the SystemCoreClock global variable with current core clock
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* retrieved from the DT.
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*/
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SystemCoreClock = NRF_PERIPH_GET_FREQUENCY(DT_NODELABEL(cpu));
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sys_cache_instr_enable();
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#if (defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)) || \
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!defined(__ZEPHYR__)
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power_and_clock_configuration();
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#endif
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return 0;
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}
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