As the nRF5x BLE controller uses TIMER1, TIMER2 and PPI
indices 0-13 (and 14-15, if PA/LNA feature is enabled),
the software based PWM driver needing 6 PPI channels has
to use PPI indices outside the BLE controller used range.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
- Renaming NET_L2_RAW_CHANNEL to NET_RAW_MODE
- Create a generic IEEE 802.15.4 raw mode for drivers
- Modify the IEEE 802.15.4 drivers so it passes the packet unmodified,
up to code using that mode to apply the necessary changes on the
received net_pkt according to their needs
- Modify wpanusb/wpan_serial relevantly
Fixes#5004
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Delete the native UART JTAG driver as we will be reusing
the Altera's HAL driver.
Add the shim driver support for Altera HAL's JTAG UART soft IP.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Delete the native timer soft IP driver as we will be reusing
the Altera's HAL drivers for most of the soft IP's.
Add shim driver support for Altera timer system clock soft IP.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Rename the Atmel SAM I2C driver based on TWIHS module to match the
convention:
<driver class>_<SoC family>_<hardware module used by the driver>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Various minor changes to the Atmel SAM (TWIHS) driver
- clean up variable names, comments
- refactor i2c_clk_set function
- do not save configuration in dev_data
- improve ISR NACK handling
- print "Device initialized" string
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Adds a new gpio driver for the NXP i.MX family of SoCs. Read, write,
configure, and callback API functions are all implemented.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Event ISR checks if the TX/RX interrupts is enabled instead
of the TXIS/RXNE interrupt status flags. Use the TXIS/RXNE
interrupt status flags to check which interrupt event
happened.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
STM32 I2C driver doesn't use the I2C API flags STOP/RESTART,
instead it uses its own RESTART flag. As a result, I2C API's
i2c_burst_write* funtions doesn't work. This patch makes
STM32 I2C driver to use I2C API flags.
Tested on: 96b_carbon, olimexino_stm32 (i2c_ll_stm32_v1)
Tested on: stm32f3_disco, disco_l475_iot1 (i2c_ll_stm32_v2)
Fixes: #4459
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
The interrupt priority on KW41Z is from 0..3. The value of 0x80 is
invalid, so lets set it to 0 for now as all the other interrupt
priorities default to 0 right now.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added conditionally enabled event state tracing support.
Needed for enhanced debug visibility of tight timed events where
normal print debug messages affect the timing of things. This is a
simple buffer that allows post analysis via gdb of what sequencer
events occurred.
Signed-off-by: David Leach <david.leach@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
- Removed some debug output and changed the level of others to reduce
the amount of information logged. The reason is that some of this is
causing false positive distractions.
- Removed enabling of FILTER error IRQ events. It isn't needed and is
only informational.
- Changed frame control AR bit inspection to use native retrieval
routine.
- Addressed some coding style issues.
Signed-off-by: David Leach <david.leach@nxp.com>
Changed the logic to reset the sequencer when a RX filter
failure has been detected. This also disables the RX timer
until the next watermark detection.
Signed-off-by: David Leach <david.leach@nxp.com>
- Reworked the driver logic around TX/RX to correctly handle the
expectations of the underlying 802.15.4 hardware IP.
- Fixed a problem with TX always reporting an error to the stack
which resulted in constant retries.
- Fixed bug in RX to TX transition which would occasionally cause the
driver to error the TX.
- Changed RX logic to ensure that invalid RX frames were not passed up
the stack.
- Simplified hardware timer usage to only use TMR3.
- Added RX watermark and TMR3 support to fix a hardware problem where
the hw IP can get stuck on a receive in noisy environments.
- Modified samples/net/echo_client and echo_server kw41z project config
files to provide enanced debug visibility into stacks and threads.
Signed-off-by: David Leach <david.leach@nxp.com>
Instead of passing net_pkt as is to the receiving side of the
interface, clone the sent packet and drop the sent one.
This is needed mainly in TCP where passing the same packet from
sending to receiving side is causing havoc.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
During large USB transfer it's pretty common to call ep_write whereas
the previous TX transfer is not achieved and so the TX FIFO space is
not available. Sleeping 20ms in this case introduce a relatively high
latency and reduce the throughput.
This can be observed when pinging the board with CDC-ECM net class.
ping reply is split into 2 USB TX transfer, the second one is only
triggered after 20ms, making ping latency > 20ms.
To fix this, just continuously read the FIFO availabilty and fire TX
as soon as possible.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
In the same way as dw driver, check that FIFO is empty before
writing any new data. This patch introduces a boolean semaphore
which is requested before any new TX transfer and released on
transfer completion.
This fixes usb-ecm support on 96b_carbon board.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Besides the fact that we did not have that for the current supported
boards, that makes sense for this new, virtualized mode, that is meant
to be run on top of full-fledged x86 64 CPUs.
By having xAPIC mode access only, Jailhouse has to intercept those MMIO
reads and writes, in order to examine what they do and arbitrate if it's
safe or not (e.g. not all values are accepted to ICR register). This
means that we can't run away from having a VM-exit event for each and
every access to APIC memory region and this impacts the latency the
guest OS observes over bare metal a lot.
When in x2APIC mode, Jailhouse does not require VM-exits for MSR
accesses other that writes to the ICR register, so the latency the guest
observes is reduced to almost zero.
Here are some outputs of the the command line
$ sudo ./tools/jailhouse cell stats tiny-demo
on a Jailhouse's root cell console, for one of the Zephyr demos using
LOAPIC timers, left for a couple of seconds:
Statistics for tiny-demo cell (x2APIC root, x2APIC inmate)
COUNTER SUM PER SEC
vmexits_total 7 0
vmexits_management 3 0
vmexits_cr 2 0
vmexits_cpuid 1 0
vmexits_msr 1 0
vmexits_exception 0 0
vmexits_hypercall 0 0
vmexits_mmio 0 0
vmexits_pio 0 0
vmexits_xapic 0 0
vmexits_xsetbv 0 0
Statistics for tiny-demo cell (xAPIC root, xAPIC inmate)
COUNTER SUM PER SEC
vmexits_total 4087 40
vmexits_xapic 4080 40
vmexits_management 3 0
vmexits_cr 2 0
vmexits_cpuid 1 0
vmexits_msr 1 0
vmexits_exception 0 0
vmexits_hypercall 0 0
vmexits_mmio 0 0
vmexits_pio 0 0
vmexits_xsetbv 0 0
Statistics for tiny-demo cell (xAPIC root, x2APIC inmate)
COUNTER SUM PER SEC
vmexits_total 4087 40
vmexits_msr 4080 40
vmexits_management 3 0
vmexits_cr 2 0
vmexits_cpuid 1 0
vmexits_exception 0 0
vmexits_hypercall 0 0
vmexits_mmio 0 0
vmexits_pio 0 0
vmexits_xapic 0 0
vmexits_xsetbv 0 0
See that under x2APIC mode on both Jailhouse/root-cell and guest, the
interruptions from the hypervisor are minimal. That is not the case when
Jailhouse is on xAPIC mode, though. Note also that, as a plus, x2APIC
accesses on the guest will map to xAPIC MMIO on the hypervisor just
fine.
Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
This is an introductory port for Zephyr to be run as a Jailhouse
hypervisor[1]'s "inmate cell", on x86 64-bit CPUs (running on 32-bit
mode). This was tested with their "tiny-demo" inmate demo cell
configuration, which takes one of the CPUs of the QEMU-VM root cell
config, along with some RAM and serial controller access (it will even
do nice things like reserving some L3 cache for it via Intel CAT) and
Zephyr samples:
- hello_world
- philosophers
- synchronization
The final binary receives an additional boot sequence preamble that
conforms to Jailhouse's expectations (starts at 0x0 in real mode). It
will put the processor in 32-bit protected mode and then proceed to
Zephyr's __start function.
Testing it is just a matter of:
$ mmake -C samples/<sample_dir> BOARD=x86_jailhouse JAILHOUSE_QEMU_IMG_FILE=<path_to_image.qcow2> run
$ sudo insmod <path to jailhouse.ko>
$ sudo jailhouse enable <path to configs/qemu-x86.cell>
$ sudo jailhouse cell create <path to configs/tiny-demo.cell>
$ sudo mount -t 9p -o trans/virtio host /mnt
$ sudo jailhouse cell load tiny-demo /mnt/zephyr.bin
$ sudo jailhouse cell start tiny-demo
$ sudo jailhouse cell destroy tiny-demo
$ sudo jailhouse disable
$ sudo rmmod jailhouse
For the hello_world demo case, one should then get QEMU's serial port
output similar to:
"""
Created cell "tiny-demo"
Page pool usage after cell creation: mem 275/1480, remap 65607/131072
Cell "tiny-demo" can be loaded
CPU 3 received SIPI, vector 100
Started cell "tiny-demo"
***** BOOTING ZEPHYR OS v1.9.0 - BUILD: Sep 12 2017 20:03:22 *****
Hello World! x86
"""
Note that the Jailhouse's root cell *has to be started in xAPIC
mode* (kernel command line argument 'nox2apic') in order for this to
work. x2APIC support and its reasoning will come on a separate commit.
As a reminder, the make run target introduced for x86_jailhouse board
involves a root cell image with Jailhouse in it, to be launched and then
partitioned (with >= 2 64-bit CPUs in it).
Inmate cell configs with no JAILHOUSE_CELL_PASSIVE_COMMREG flag
set (e.g. apic-demo one) would need extra code in Zephyr to deal with
cell shutdown command responses from the hypervisor.
You may want to fine tune CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC for your
specific CPU—there is no detection from Zephyr with regard to that.
Other config differences from pristine QEMU defaults worth of mention
are:
- there is no HPET when running as Jailhouse guest. We use the LOAPIC
timer, instead
- there is no PIC_DISABLE, because there is no 8259A PIC when running
as a Jailhouse guest
- XIP makes no sense also when running as Jailhouse guest, and both
PHYS_RAM_ADDR/PHYS_LOAD_ADD are set to zero, what tiny-demo cell
config is set to
This opens up new possibilities for Zephyr, so that usages beyond just
MCUs come to the table. I see special demand coming from
functional-safety related use cases on industry, automotive, etc.
[1] https://github.com/siemens/jailhouse
Reference to Jailhouse's booting preamble code:
Origin: Jailhouse
License: BSD 2-Clause
URL: https://github.com/siemens/jailhouse
commit: 607251b44397666a3cbbf859d784dccf20aba016
Purpose: Dual-licensing of inmate lib code
Maintained-by: Zephyr
Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
This will accomodate newer access models later, with variations of those
functions' contents.
Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
nrf SOCs are capable of waking from Low power state or
Deep Sleep state using sense configuration.
So adding support for this in nrf GPIO driver.
Jira: ZEP-2623
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The Makefile was using the obj-$FOO = form instead of the ob-$FOO +=
form, so if both slip and loopback are enabled then only loopback will
get built.
Signed-off-by: Michael Hope <mlhx@google.com>
In order to be able to default Kconfig "Trigger mode" choice
in a board Kconfig.defconfig, this commit provides it with a name.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to be able to default Kconfig "Trigger mode" choice
in a board Kconfig.defconfig, this commit provides it with a name.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixes#4429
Driver didn't work properly when a transfer consisted of multiple
messages.
Fix doesn't use auto end mode anymore. msg_done function waits for
transfer to complete and issues stop condition if necessary.
Tested with stm32f3_disco board and samples/drivers/i2c_fujitsu_fram
example adapted to use I2C_1 as I2C_DEV
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
Fix TinyCrypt shim driver Kconfig dependencies.
Limit the scope of crypto_driver_api functions to driver file only.
Remove dead code from crypto_tc_shim_priv.h
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
GPIO_PIN_ENABLE, GPIO_PIN_DISABLE configuration constants overlap
functionality provided by pinmux driver. They usage makes the API
inconsistent. They are almost uniformly ignored by the existing device
drivers. Only few of them take these constants into account.
This commit deprecates usage of the two configuration constants.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Instead of every hardware number generator driver providing an
implementation of this function, use the random device API to
centralize the implementation of this function.
This is a very simplistic function that can be seen as a stepping stone
to refactor the random number generation in Zephyr.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This should clear up some of the confusion with random number
generators and drivers that obtain entropy from the hardware. Also,
many hardware number generators have limited bandwidth, so it's natural
for their output to be only used for seeding a random number generator.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Some "random" drivers are not drivers at all: they just implement the
function `sys_rand32_get()`. Move those to a random subsystem in
preparation for a reorganization.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Certain interrupt-driven APIs were excluded as they are intended
only to be called from ISRs, or involve registering a callback
which runs in interrupt context.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
spi_transceive_async() omitted as we don't support k_poll objects
in user mode (yet).
The checking for spi_transceive() is fairly complex as we have to
validate the config struct passed in along with device instances
contained within it.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Many APIs had two versions, by port and by pin, which called the same
API with different parameters. This has been reorganized to reduce
the number of system calls.
Callback registration API skipped.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
pinmux_pin_get() needs memory validated for the func parameter since
it's a pointer that gets written to.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The page_layout API returns pointers to kernel memory and is not
exposed to user mode. This is fine for flash_get_page_count()
and flash_get_page_info APIs since these copy the values, but some
redesign work will be needed to get flash_page_foreach() working in
user mode since we do not want the callback running in a privileged
state.
Due to the way that (even unimplemented) system call prototypes are
generated, the definition of struct flash_pages_info needed to be
moved outside of the #ifdef.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Straightforward conversion for adc_enable/disable.
adc_read() uses a sequence table, which points to an array
of struct adc_seq_entry, each element pointing
to memory buffers. Need to validate all of these as being readable
by the caller, and the buffers writable.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
i2c actually only has two entry points into the driver,
i2c_configure and i2c_transfer. All the other APIs are derived
from these.
All derived APIs now just call i2c_transfer() with appropriate args.
The handler for i2c_transfer() needs to examine the message array
and validate all the buffers involved depending on whether we are
reading or writing to them.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Waiting for tx to complete should timeout after 10ms
instead of blocking forever in case ack is not received.
Signed-off-by: Kamil Sroka <kamil.sroka@nordicsemi.no>
Adding sleep before TX FIFO flash fixes splitting networking packets
sent over USB endpoints making ECM broken since there is no flow
control other then frame sizes.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The situation when FIFO is not empty is not a bug and it is spamming
console when only bugs are enabled.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The Designware FIFO is filled in units of 32 bit words, but the buffer
we are passed is not guaranteed to be a multiple of 4 bytes long, nor
aligned on a 4-byte boundary. So in theory we are reading 0-3 bytes
of unused garbage from the end of the array.
That's currently benign on supported platforms with this hardware,
which all support misaligned reads. But not all do. And the incoming
arrival of memory protection opens the possibility that those extra
bytes would cross a protection boundary and cause a crash or security
bug.
Do this right.
(Note that this is fixed to little endian byte order. The Designware
databook is frustratingly silent on the endianness it expects, but
existing hardware I can see is definitely LE and I see a few spots in
the Linux dwc2 driver that likewise assume LE).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The designware hardware in dedicated FIFO mode (which is all we
support right now for lack of shared-FIFO hardware) has one hardware
FIFO per IN (i.e. transmit) endpoint. But it doesn't assign them on
its own, it's the drivers responsibility to populate the TxFNum field
of the DIEPCTL registers with integer indices corresponding to the
desired FIFO.
We weren't doing that, which meant that all IN endpoints were sharing
the same FIFO zero which is supposed to be dedicated to EP0 control
transfers. The net effect is that sometimes outbound transfers would
be corrupted, showing data from the wrong endpoint. More often that
not this would leak from control transfers over to the
higher-bandwidth bulk endpoints of the application, but occasionally
you'd see a control transfer itself get borked and the USB device
would glitch.
Get this right and set the FIFOs properly.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
There is no particular reason this spot in usb_dw_tx() cannot be
reached by racing threads on the same endpoint, though existing API
usage in the tree is all unithreaded. The FIFO state read at the top
of the function must still be true at the bottom or else the packet
byte count will be corrupt.
Also, as described in an existing comment, the databook has some
scary-sounding warnings about access to the registers during FIFO
operations, even if they "should" be on separate endpoints and
unrelated.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Issue a error message, if the _mcr20a_read_reg fails.
Do not execute SPI burst read/write if the buffer is too small.
Unlock mutex if set_pan_id, set_short_addr or set_ieee_addr
fail.
Force abort of the sequence when the higher level changes the channel
even though a T or TR sequence is in progress.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
checkpatch returns the following errors:
"ERROR:COMPLEX_MACRO: Macros with complex values
should be enclosed in parentheses"
Let's fix all of them.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The WS2812 LED driver IC has a one-wire interface which encodes bit
values as pulse widths.
The ICs themselves are basically shift registers. Roughly speaking, a
"short" pulse shifts in a zero bit, a "long" pulse shifts in a one
bit, and an inter-pulse gap exceeding a reset time threshold causes a
pixel to latch the shifted-in color values. Each chip has an output
pin for daisy chaining. Refer to the chip datsheets and comments in
Kconfig.ws2812 for more details.
To meet timing without hogging the core, this driver generates pulses
using SPI. To work, this requires the MOSI line to stay low between
SPI frames, and for inter-frame delays to be less than the reset pulse
time.
There are other ways do it (PWM + DMA on some SoCs, GPIO bit-banging
if no other tasks need the core), but this is a reasonably
general-purpose implementation.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
LPD880x (e.g. LPD8803, LPD8806) devices are LED driver ICs which can
be controlled via a reduced SPI interface (clock and data only), and
support daisy chaining.
Add an led_strip driver for these devices.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This API covers drivers for strips, or strings, of individually
addressable LEDs. Both RGB and grayscale LED strip drivers can be
implemented within these APIs.
The API only provides for updating the entire strip, since not all
strips support updating individual LEDs without affecting the others.
Subsequent patches will add individual driver support.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This ensures DW_apb_i2c correctly transmits the slave address (7 or
10 bit) based on ic_10bitaddr_master when configured in master mode.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
The ic_tar and ic_sar were earlier set to 9 bits but now its
corrected to consider 10 bits.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
When the header file is located in the same directory as the source
file it is better to use a relative quote-include, e.g.
than a system include like
Avoiding the use of system includes in these cases is beneficial
because;
* The source code will be easier to build because there will be fewer
system include paths.
* It is easier for a user to determine where a quote-include header
file is located than where a system include is located.
* You are less likely to encounter aliasing issues if the list of
system include paths is minimized.
Authors:
Anas Nashif
Sebastian Bøe
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
No need to send FCS bytes as the monitor_15_4 is configured to not
expect them. If we change the monitor_15_4 to use them, then we would
need to put correct values into these two FCS bytes.
So cleanest solution is not to send FCS bytes at all.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
`rc` gets assigned values from function returning `int` and not
`u32_t`.
Fixes#4051.
Coverity-ID: 177219
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Loopback is a networking interface which doesn't actually transfer
any data via link layer externally, and instead just mirrors back
(i.e. any packet send to the loopback interface will be received from
it). This interface very useful for testing.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Make drivers/net/ be the place for misc networking-related drivers
(otherwise, we'd need to have a new dir per driver).
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Atmel SAM3X series has been recently converted to use ASF and
should now use common SAM family drivers. The i2c_atmel_sam3
I2C driver will be removed in the future.
This commit also changes the default I2C driver for Arduino Due
board from i2c_atmel_sam3 to i2c_sam_twi.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Added I2C bus (TWI) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Arduino Due board.
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
STM32 UART driver was using a mix of LL/HAL APIs. This commit removes
calls to HAL API and replaces them with LL APIs. No functional change
have been seen during non regression testing.
But we could note a direct gain of 1Kb of ROM
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32F0/3 I2C's independent clock source supports only
HSI and SYSCLK, not APB1. We force I2C clock source to SYSCLK.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Refactors the mcux lpsci shim driver to use the clock control interface
instead of calling CLOCK_GetFreq() directly. This will allow SoCs with
different clock architectures to reuse this driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpuart shim driver to use the clock control interface
instead of calling CLOCK_GetFreq() directly. This will allow SoCs with
different clock architectures to reuse this driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Use the clock control interface instead of calling CLOCK_GetFreq()
directly. This will allow SoCs with different clock architectures to
reuse this driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new clock control driver for Kinetis SoCs that have the system
integration (SIM) module. This will allow mcux shim drivers, such as
uart and i2c, to abstract the call to CLOCK_GetFreq() behind the
clock_control interface and thus be reused for SoCs with different clock
architectures.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
IRQ_CONNECT() was being expanded with the IRQ line for the first device
twice, causing spurious IRQs.
Should fix#4398.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This patch adds support for on board UART_0 on MSP-EXP432P401R-LAUNCHXL.
Driver makes use of driverlib available in ROM by default, thus saving
code space.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This is a USB controller driver for STM32F4xx devices using
the STM32 Cube HAL_PCD framework. This has been tested with
the cdc_acm driver on a 96b_carbon board (STM32F401RE).
This is a refactoring of:
usb: usb_dc_stm: Add support for STM32Cube HAL_PCD USB driver
Signed-off-by: Christer Weinigel <christer@weinigel.se>
[daniel.thompson@linaro.org: Removed STM32F40(157) defconfig changes
together with STM32F4Discovery pinmux and defconfig changes, updated
clock settings and pad configuration to match latest mainline]
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[giannis.damigos@gmail.com: Change uint*_t types to u*_t types,
change SYS_LOG_USB_DC_STM_LEVEL to SYS_LOG_USB_DRIVER_LEVEL and
update pinmux to match latest arm branch]
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Add pinmux configuration for USB OTG Full Speed.
Ports 11 and 12 use alternate function 10 for DM/DP.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Previously, there was boolean CONFIG_SLIP_DEBUG, which effectively
switched between "logging off" and "debug-level logging". Instead,
switch to CONFIG_SYS_LOG_SLIP_LEVEL (the naming of the option follows
existing conventions) which allows to select any of the standard 5
logging levels.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
The current prescaler calculation incorrectly fails to configure the
desired frequency when it is possible to match it exactly. Fix this.
Without this patch, if the user requests frequency N Hz, and there is
a SPI prescaler that can match this frequency exactly, the actual
frequency chosen by spi_stm32_configure() will be N/2 Hz.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
There are 3 cases of possible allocation failures, only 1 of them
was logged. Now, all the cases are logged: 1) failure to allocate
net_pkt; 2) failure to allocate very first net_buf for it; 3)
failure to allocate additional net_buf for it (this latter was
the only one logged previously).
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
set_ieee_addr, set_short_addr and set_pan_id are now unused by L2, so
removing their exposure through the radio API.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Further support will need work per-driver basis, as soon as the L2 will
be able to make usage of such support.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Write-block-size values were filled for nRF5, STM32, QMSI, MCUX and
w25qxxdv devices.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
There are several issues with the dev_config union used as a
convenience when calling the i2c_configure api. One, the union is well
name spaced protected and doesn't convey use with just i2c. Second
there are assumptions of how the bits might get packed by the union
which can't be guaranteed. Since the API takes a u32_t lets change in
tree uses to using the macros to setup a u32_t and make the union as
deprecated.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If CS (Chip Select, known also as Slave Select...) is managed externaly
of the stm32_ll SPI controller, just config NSS line management
accordingly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Supports both master and slave mode, standard and fast modes,
configurable timeouts, and a few other tunable settings.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Also provide their prototypes in `soc.h`. This should help
readability, since some ROM functions, with their names as provided by
Espressif, have sometimes the same prefix as Zephyr APIs.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Configuring an open drain driver is required by the I2C driver,
but the GPIO driver didn't support setting the drive strength.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
PINMUX_FUNC_A is set to 0, which coincides with the GPIO function in
many of the ESP32 pins. Use PIN_FUNC_GPIO by default inside the
GPIO driver, however, so the correct function is always selected.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
If the LF clock was already started, but wasn't initialized with
_k32src_start yet, allow it to run once. This is needed because if a
soft reset is triggered while watchdog is active, the LF clock will
already be running, but won't be configured yet (watchdog forces LF
clock to be running).
If the LF clock isn't configured with _k32src_start, the nRF5 RTC
won't count and the whole system will malfunction, as the kernel
depends on the clock source being working properly.
Signed-off-by: Thiago Silveira <thiago@exati.com.br>
This patch adds a routine which can be used to iterate over all flash
pages on the device.
This can be also done by using flash_get_page_info_by_idx(), but that
would add an unnecessary loop over the layout array for each page.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
802.15.4 is the networking hardware available in KW41Z SoC (and
supported by Zephyr). So, if networking in enabled, automatically
select the corresponding driver. This is similar to how frdm_k64f
automatically selects Ethernet driver, 96b_carbon selects BLE/IPSP
drivers, etc. (But we apply it on SoC level to reuse across the
boards.)
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Some our Zephyr tools don't like seeing UTF-8 characters, as reported in
issue #4131) so a quick scan and replace for UTF-8 characters in .rst,
.h, and Kconfig files using "file --mime-encoding" (excluding the /ext
folders) finds these files to tweak.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
If we were trying to send max MTU size data, then the temporary
frame_buf was overflowing because it only allocated 1500 bytes
for the buffer but then copied 1514 bytes into it (max mtu +
ethernet header).
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
SoCs outside the Kinetis family can have the TRNG module, so move the
HAS_TRNG config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the RNGA module, so move the
HAS_RNGA config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the FTM module, so move the
HAS_FTM config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Note that 'select HAS_FTM' was previously missing from Kconfig.soc and
is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the ADC16 module, so move the
HAS_ADC16 config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the LPSCI module, so move the
HAS_LPSCI config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
SoCs outside the Kinetis family can have the LPUART module, so move the
HAS_LPUART config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch removes deprecated API functions and data types from
dma.h file as well as device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
- place all sensor Kconfig options in submenu
- separate device drivers and common options with a comment line
- align help text
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Composite multifunction USB devices should be able to know about
configuration change, implement it through existing callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Cleanup I2C drivers to not use bitfield access for config information
and instead use accessor macros that use shifts & masks. This is
cleanup towards removing the bitfield access in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
With logging enabled, this leads to type mismatch warning, which is
promoted to error when building under CI.
Also, reomove extra "\n" from the logging messages.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Removing internal boolean in order to use the proper error code hold in
spi_context which was relevantly added in commit 6c717095b8.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
RCC_HCLK_DIV1 translates to 0x0 while apb_psc uses the value defined
by CONFIG_CLOCK_STM32_APB1/2_PRESCALER (range from 1 to 16).
Manually check if the defined prescaler is 1 or not and use that to
calculate the correct timer clock.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Add support for TIM3 as it is widely available and pins available via
headers on several devices.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Previous approach allowed only single word update for single
function call. Updating context in ISR was inefficient for
controllers supporting automatic multiple data packets transaction.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
I2C device drivers which support DTS have their default boot
configuration provided by DTS. The legacy I2C_x_DEFAULT_CFG
option in Kconfig is no longer required. This patch hides
this option from the Kconfig menu for I2C device drivers which
support DTS.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add SPI3 pin definitions for PC10, PC11, PC12.
This is required to use SPI3 on disco_l475_iot1 board
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move all STM32 based board pinmux files into the board dirs so we are
consistent across all the STM32 platforms/boards.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
TEMT is Transmitter Empty bit which is set only when the full FIFO
is empty. It makes sense to poll for THRE (Transmitter Holding
Register Empty) which is set when UART can buffer new character
for transmission (there is room in FIFO). This allows using the
FIFO in full.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
The LCR register specifies the format of the asynchronous data
communication exchange. Keep the data/stop bit and parity settings
intact during baud rate change.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Indenting preprocessor directives reduces the code readability, because
it make preprocessor directives harder to spot.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
L4 parts have a constant page size, so just rely on the HAL defines
that provide it, along with a read to the register which contains this
SoC's total size.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Add flash page layout support for STM32F4 SoCs.
This almost eliminates the need for flash_map.h, except for
STM32F4X_SECTOR_MASK, so delete the file and move the define into the
F4 implementation, to keep things simple.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This is a prep work commit for adding flash page layout support.
The internal flash APIs for STM32 on L4 and F4 are a bit
inconsistent. Some routines take a pointer to the private data, others
don't. Those that do take it as a last argument instead of a
first. Additionally, some APIs are declared in flash_stm32.h that
aren't ever used by the family-specific files.
Clean this up by making everything take a struct device*, and marking
routines static in the common driver code when possible.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Added an internal function to obtain the flash page layout in
run-length encoded format. The API is simple and allows the actual
public API implementations to be simple and maintainable.
This feature can be enabled by using the FLASH_PAGE_LAYOUT Kconfig
option. This API is required for the implementation of flash file
system.
Added a public API to get flash page information (size and start offset)
by offset within the flash and by index of the page.
Added a generic implementation of the internal flash_get_page_info API.
Added an additional public API call to get the total count of pages in
the flash memory and its generic implementation.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This patch implements BMM150 driver with polling mode and its tested
with original BMM150 sensor hardware. Driver works on I2C
interface as of now.
Following datasheet is taken as reference while developing driver.
http://www.mouser.com/ds/2/783/BST-BMM150-DS001-01-786480.pdf
Signed-off-by: Punit Vara <punit.vara@intel.com>
nrf SOC uses nrf rtc timer (not sys tick), which is 32kHz,
whereas CPU runs at higher speed (nrf52 runs at 64MHz).
So 32Khz is too slow to measure critical kernel parameters.
This patch does :-
1. Add support for nrf SOC for timing_info benchmarking.
2. Uses SOC timer to measure kernel parameters.
Jira: ZEP-2314
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The API/Variable names in timing_info looks very speicific to
platform (like systick etc), whereas these variabled are used
across platforms (nrf/arm/quark).
So this patch :-
1. changing API/Variable names to generic one.
2. Creating some of Macros whose implimentation is platform
depenent.
Jira: ZEP-2314
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The stack address was incorrectly specified when stack usage
was being debugged. This caused compiler to emit this warning
drivers/ieee802154/ieee802154_cc2520.c:1136:16: warning:
dereferencing type-punned pointer will break strict-aliasing
rules [-Wstrict-aliasing]
((struct cc2520_context *)(&__device_cc2520))->
^
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If the interrupt isn't acknowledged, the callback will continue to be
called.
Jira: ZEP-2556
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Masks for level- and edge-triggering levels are 0, so the following
check will be always true:
if ((flags & GPIO_INT_ACTIVE_LOW) == GPIO_INT_ACTIVE_LOW)
Invert the evaluation order, by checking the masks that are not 0
first.
Jira: ZEP-2557
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The compilation of the i2c_ll_stm32 fails when we
enable the interrupt mode. The struct i2c_stm32_data
is needed to initialize the semaphore. This patch adds
the missing struct for interrupt mode.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
When transmitting to the UART interface using polled mode, the ESP32
driver would return 0 regardless of the success state. Return the
character that has been transmitted to comply with the API.
Jira: ZEP-2552
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Esp-idf defines the BIT macro that is also defined in Zephyr's
misc/util.h. Fix the issue by including the esp-idf headers first, so
that a check in util.h won't redefine the macro if it's already
defined.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This exposes the CCM operations through generic Crypto API.
Change-Id: I09346e77bf8821c208305a7aa2805cf49cb42d71
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
'pad' parameter controls whether crc16() should add padding at the end
of input bytes or not. This allows to compute CRC16 for data stored in
non-contiguous buffers where CRC value is calculated using subsequent
calls to crc16() with padding added only for last chunk.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
data_addr is not guaranteed to be word-aligned so we need to read it in
a safe way, otherwise this can trigger hardfault on nRF51.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add _i2c_map_dt_bitrate() that maps from a bitrate to the I2C zephyr
cfg bit fields used in i2c_configure().
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Some targets (e.g. STM32-based boards) only have SPI drivers using the
new API. To support both these and existing, legacy SPI drivers in the
SPI HCI driver, abstract out the SPI API into shim routines.
There are no behavioral differences due to this patch. The next patch
will add support for the new API.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."
Effectively, the CC3220 SOC replaces the CC3200.
This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.
Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
ll_radio_state_is_idle() returns bool, not an error value - this means
it is non-zero on success.
Jira: ZEP-2445
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Rename the BT_CONTROLLER prefix used in all of the Kconfig variables
related to the Bluetooth controller to BT_CTLR.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add support for TICKLESS KERNEL in nrf_rtc_timer for Nordic family of
processors. This patch includes :-
1. Programming RTC based on "next timer" value from timeout queue while
A. exiting idle_exit.
B. on RTC interrupt.
2. Impliments some of functions which will be required by sys_clock and
scheduler.
ZEP-1819
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
This patch fixes the read operation of the I2C driver
for all the receptions (1-byte, 2-bytes, N-bytes when
N > 2)
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Martin Iñaki Malerba <inakimmalerba@gmail.com>
In interrupt mode, the drivers entered a forever loop if the
I2C_MSG_RESTART flag was set. This patch fix this issue.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The EVENT interrupt is generated when:
– SB = 1
– ADDR = 1
– ADD10= 1
– BTF = 1 with no TxE or RxNE event
– TxE event to 1 if Buffer interrupt enabled
– RxNE event to 1 if Buffer interrupt enabled
We need to disable and enable the Buffer TxE and RxNE interrupt
inside the EVENT ISR. The LL_I2C_{Enable,Disable}IT_TX and
LL_I2C_{Enable,Disable}IT_RX functions, used now, enable and
disable both Buffer and Event interrupt. This patch uses the
LL_I2C_EnableIT_BUF and LL_I2C_DisableIT_BUF functions to
enable and disable the Buffer interrupt (TxE, RxNE).
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
* add nested interrupt support for interrupts
+ use a varibale exc_nest_count to trace nest interrupt and exception
+ regular interrupts can be nested by regular interrupts and fast
interrupts
+ fast interrupt's priority is the highest, cannot be nested
* remove the firq stack and exception stack
+ remove the coressponding kconfig option
+ all interrupts (normal and fast) and exceptions will be handled
in the same stack (_interrupt stack)
+ the pros are, smaller memory footprint (no firq stack), simpler
stack management, simpler codes, etc.. The cons are, possible
10-15 instructions overhead for the case where fast irq nests
regular irq
* add the case of ARC in test/kernel/gen_isr_table
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have an mcux shim driver, remove the old k64-specific
driver. Also remove include/drivers/k20_sim.h, since the old
k64-specific driver was the only thing left using it.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a shim layer around the mcux ftm driver to adapt it to the Zephyr
pwm interface.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The random number generator from ESP32 uses noise from Wi-Fi and
Bluetooth radios. If these are off, a pseudo-random number is
generated instead; this is currently the case, but even though it's a
black box, it's arguably better than returning a timestamp as a
pseudo-random number generator.
According to the ESP32 Technical Reference manual, the RNG passed the
Dieharder Random Number Test suite (version 3.31.1)[1], but nothing has
been said about the quality of the PRNG.
The RNG register is read directly; no effort is made to use its
contents to feed an entropy pool in a way that's similar to /dev/random
on POSIX systems, as no such subsystem exists on Zephyr at the moment.
[1] http://webhome.phy.duke.edu/~rgb/General/dieharder.php
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Zephyr's watchdog API is badly designed in the sense that it's a 1:1
abstraction on top of whatever Quark D2000 expects for its watchdog,
instead of expecting a generic timeout value.
This implementation tries as much as possible to calculate the watchdog
timeout in a way that's compatible with a Quark D2000 running at 32MHz;
a comment in adjust_timeout() explains this in more detail.
Jira: ZEP-2296
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.
Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This implements a driver for the pin multiplexer as present in the ESP32
SoCs.
All APIs are supported.
Jira: ZEP-2297
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The alignment went off because of the move to use internal fixed-size
integer types (instead of standard int types).
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
It used to be that there was a fairly empty "Bluetooth Drivers" menu
entry in the drivers menu. This entry was present even though there
was no drivers/bluetooth code being compiled in.
With this patch "Bluetooth Drivers" will no longer be present when
BT_CONTROLLER is enabled.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The CONFIG_BT_WAIT_NOP define is used only by
zephyr/subsys/bluetooth/host/hci_core.c.
It is also the only config in drivers/bluetooth that is in use when
BT_CONTROLLER is enabled. Moving it into the bluetooth subsystem
allows us to restructure the drivers/kconfig code such that the entire
Bluetooth driver menu option is omitted when the BT_CONTROLLER is
enabled.
Moving it will also mean that all configs in drivers/bluetooth will
now be related to configuring the source code in drivers/bluetooth.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Added function helps setting the longest possible rx and tx buffers for
single SPI transfer. Each of these buffers is a continuous memory
region. It is useful for example when peripheral supports easyDMA.
Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
The API name space for Bluetooth is bt_* and BT_* so it makes sense to
align the Kconfig name space with this. The additional benefit is that
this also makes the names shorter. It is also in line with what Linux
uses for Bluetooth Kconfig entries.
Some Bluetooth-related Networking Kconfig defines are renamed as well
in order to be consistent, such as NET_L2_BLUETOOTH.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
There are two kinds of HCI implementations. Bluetooth drivers in
drivers/bluetooth that implement HCI by using a wired serial
transport layer to talk to an external controller chip. And a
bluetooth controller in subsys/bluetooth/controller that directly
talks to an internal on-chip controller node.
Currently, when the the subsys/bluetooth/controller is used there
still exists exposed to the user a bluetooth driver configuration
menu, even though no external bluetooth driver is in use. This is due
to a dependency on certain configs in driver/bluetooth that are needed
even though no external controller is used.
This patch moves one of these configs, BLUETOOTH_HCI_RESERVE, from
drivers/bluetooth/hci/Kconfig to subsys/bluetooth/host/Kconfig such
that eventually we can omit the entire Bluetooth driver menu option.
This re-organization does not change when the config can be enabled.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The output state of the CS GPIO must be configured with a pull-up while
setting the GPIO as output. Otherwise the GPIO will be forced low,
before being set high by the call to spim_nrf52_csn(). This results in a
glitch of 1us on the CS line, which may confuse some ICs in the worst
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
When setting the SPIM speed to 8 MHz, the driver will return an error
due to a missing "break" causing the execution flow to reach the default
case.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
patch fix the dead code issue reported by coverity static scan
for gpio driver of cc2650 TI SOC. CC2650_IOC_NO_PULL macro
is defined Zero, bitwise and with any value would result to
zero,because of which only false condition of if is evaluated
but not the true condition.
Jira ZEP-2469.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
In Tickeless kernel Platform timekeeping is having error because
"_sys_clock_tick_count" is not getting updated correctly.
Currently "OVERFLOW" Flag (bit 16 in timer control register)
is reset before it is taken into account into _sys_clock_tick_count.
This patch sets a flag as soon as Timer Overflow occues and clears
it when time is accounted into _sys_clock_tick_count.
Jira : ZEP-2217
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
The transmit and receive procedure used in the STM32 SPI driver is not
correct.
On STM32F4, this is causing OVR errors (per the logged error mask) and
transmission of undesired 0x00 bytes (verified with a logic analyzer).
The root cause is that the receive register is not read (via DR, when
RXNE is set) each time the transmit register is written (also via DR,
when TXE is set). This clearly causes OVR errors when there is no
FIFO, as the receive register needs to be read each time a frame is
transceived, or the IP block has no way of knowing that the
overwritten data were not important.
Adapt the I/O procedure so that every DR write is matched by a DR
read, blocking until the relevant flags are set if necessary.
This behavior is suboptimal for targets such as STM32L4, where there
is a SPI FIFO. However, SPI I/O is broken on those targets, and this
patch fixes them as well. Further optimizations for targets with FIFOs
is left to future work.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
With some other issues in polled mode now resolved, add error handling
and report a valid error status when releasing the context.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Byte access is always naturally aligned; there's no need to use
UNALIGNED_GET or UNALIGNED_PUT. Those would only be needed when
supporting 16-bit data frames.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The current implementation unconditionally enables the SPI (sets
SPI_CR1_SPE) in transceive(), but disables it only in master mode.
The peripheral should only be enabled while the user has specifically
requested I/O. Fix this by always disabling the peripheral when I/O is
complete.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Polled and IRQ-driven SPI I/O share code for cleanup and completion,
which can now be factored into its own routine.
This keeps a single point of truth for common paths, which will allow
a subsequent bug fix to happen in one place, and help avoid future
regressions.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
In polled mode, the STM32 SPI driver is signaling completion when
there are no waiters:
- the only spi_context_wait_for_completion() caller in this driver is
in the IRQ-driven portion of transceive() itself, which isn't
compiled in polled mode.
- the "asynchronous completion + polled I/O" combination is not
supported by the driver, so there are no other threads polling on
this I/O we need to signal completion to.
What should be happening instead of signaling completion is releasing
the chip select pin, which polled I/O currently doesn't do.
Fix these issues.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The LL_SPI_NSS_* macros used in spi_stm32_configure() when
hardware-based NSS management is requested are incorrect; fix them.
In master mode, this seems like a copy/paste error. The slave mode
case is likely due to following incorrect documentation in the ST LL
headers.
Note that in my testing on STM32F4, NSS appears to be open drain when
managed by hardware, making that configuration harder to test (and
probably less useful).
Details for the curious:
The ST LL headers (for example stm32f4xx_ll_spi.h) claim
LL_SPI_NSS_HARD_INPUT is to be used only in master mode, and
LL_SPI_NSS_HARD_OUTPUT is to be used in slave mode.
The opposite is true: when NSS is not handled by software, the SPI
peripheral is responsible for driving NSS as an output, and the
slave peripheral is responsible for reading it as an input.
This is an error in the LL header files; the reference manuals and
the other LL code make this clear.
- The ST reference manuals specify that LL_SPI_HARD_OUTPUT (which
corresponds to SSM unset, SSOE set) is a master-only
configuration. For example, STM32 RM0368 says:
"NSS output enabled (SSM = 0, SSOE = 1)
This configuration is used only when the device operates in
master mode."
- LL_SPI_HARD_INPUT (SSM unset, SSOE unset) is either a master or
a slave configuration; in the slave case (which is what we're
interested in here), it corresponds to the "usual" NSS
input. RM0368, again:
"NSS output disabled (SSM = 0, SSOE = 0)
This configuration allows multimaster capability for devices
operating in master mode. For devices set as slave, the NSS
pin acts as a classical NSS input: the slave is selected when
NSS is low and deselected when NSS high."
The LL_SPI_StructInit() implementations similarly combine
LL_SPI_MODE_SLAVE with LL_SPI_NSS_HARD_INPUT.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Michael Hope
