Read up to an (arbitrary) 32 bytes at once from the port. This improves
performance with the USB CDC ACM driver which may have 64 bytes
available at a time.
Signed-off-by: Michael Hope <mlhx@google.com>
include/uart.h says that an interrupt may be an edge or a level.
Re-work the uart_pipe interrupt handler to support both. This makes
uart_pipe work with the USB CDC ACM driver.
Signed-off-by: Michael Hope <mlhx@google.com>
The previous code is equivalent to:
if !isprint:
if is carriage-return:
post line
set current line to NULL
store ch in current line (*)
which causes a null pointer fault when receiving a carriage return.
This patch switches to a single condition tree. The side effect is
that other non-printable characters are dropped.
Signed-off-by: Michael Hope <mlhx@google.com>
Implements the set line control API for baud rate only. The SAM0
doesn't implement flow control in hardware.
Signed-off-by: Michael Hope <mlhx@google.com>
Define a Device Tree binding for the SAM0 SPI and use it instead of
Kconfig for enabling / disabaling instances
Signed-off-by: Michael Hope <mlhx@google.com>
Implements interrupt driven UART for the serial driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Justin Watson <jwatson5@gmail.com>
There are some minor differences between the UART om SAMD20 and SAMD21
that we need to take into account:
SYNCBUSY bit for the samd20 is located in the STATUS reg.
The samd20 does not have a SAMPR bit like the samd21.
Signed-off-by: Sean Nyekjaer <sean@nyekjaer.dk>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If we could not send the packet, then do not release the net_pkt
as that will be released in net_if.c:net_if_tx() if driver send()
fails.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
VL53L0X_PerformSingleRangingMeasurement() returns a signed 8-bit
integer, not an unsigned 8-bit integer, making the "< 0" comparison
worthless.
Coverity-CID: 182593
Coverity-CID: 182597
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The nrf52840 has 2 gpio ports, and 48 GPIO. We need to
adapt the range to allow the gpio on port 1 to be used
by this driver
Signed-off-by: Giuliano Franchetto <giuliano.franchetto@intellinium.com>
The APA102 is a RGB LED with integrated controller. LEDs can be
daisy-chained and use SPI for communication. The SPI port is
configured via Device Tree.
Tested on the Adafruit Trinket M0.
Signed-off-by: Michael Hope <mlhx@google.com>
The interrupt line number is an unsigned integer; it makes no sense to
compare if it is greater than or equal to 0.
Coverity-CID: 182602
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
In SMP, the system timer is used for timeslicing on auxiliary CPUs,
but the base system timekeeping via _nano_sys_clock_tick_announce() is
still done on CPU0 only (because the framework isn't prepared for
asynchronous notification yet). Skip processing on CPU1+.
Also, due to a hardware interaction* that is difficult to work around,
timer initialization on the auxiliary CPUs is done at the very end of
the CPU bringup, just before the swap into the scheduler. A
smp_timer_init() API has been added for this purpose.
* On ESP-32, enabling the timer seems to result in a near-synchronous
interrupt being delivered despite my best attempts to keep it
masked, then blowing things up because the CPU record isn't set up
to handle it yet.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The earlier xtensa layer put the timer initialization and update
directly into the interrupt handler, which is... weird. Under asm2,
it's just a regular ISR and needs to do the work in the driver.
Really, this driver needs a bunch of cleanup. The xtensa CPU timer is
two registers and one ISR: a global cycle count register, and a
compare register that will fire the IRQ when they match. There is
*way* too much code here.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The existing hand-written interrupt code is manually calling the timer
ISR, which is sort of silly and about to be replaced. Correctly
declare the ISR with IRQ_CONNECT() so that a conventional interrupt
handling implementation can find it. With current code this is a
noop.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Fixed incorrect comparison of FLASH_SLOT in microseconds
with ticks elapsed.
This caused Bluetooth controller to try scheduling events
beyond the acceptable soft real-time design limits, due to
the CPU halted for flash erase operation.
Fixes#6229.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix Kconfig help sections and add spacing to be consistent across all
Kconfig file. In a previous run we missed a few.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Refactor ticker execution context dependency out into HAL
folder. This decouples ticker from mayfly, enabling porting
towards a more tasklet (if and when kernel gets the support)
style execution contexts type implementation support.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
As per current policy of requiring supervisor mode to register
callbacks, dma_config() is omitted.
A note added about checking the channel ID for start/stop, current
implementations already do this but best make it explicitly
documented.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fix sys log compilation warnings by defining the
SYS_LOG_LEVEL to SYS_LOG_I2C_LEVEL in Nios-II i2c driver.
This commit fixes Issue #6062
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Bugfix in the tickless mode part:
During _time_idle_exit it was not announcing to the kernel the
already passed silent ticks, but it was left for the tick interrupt
itself.
This did not cause any trouble so far as there was only the timer
interrupt in this board.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Also pull out the SERCOM pads configuration to defines. Note that the
SAM0 has a two level configuration - a signal (like TX) is mapped to a
pad, and then a pad is mapped to a function on a pin.
Signed-off-by: Michael Hope <mlhx@google.com>
Fix return value to -EBUSY instead of 0 when releasing a
reference but not physically turning off the clock.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add I2C Master driver for Nios-II I2C soft IP core.
This driver relies upon the Altera HAL I2C driver for all the bus level
transactions, interrupt handling and register programming.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Added possibility to reconfigure CONFIG_SYS_CLOCK_TICKS_PER_SEC
for the native_posix board (before it could only be 100)
+
Fixed tickless idle support
+
Minor fixes in irq wrapping
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
to_read is the minimum value between I2C_ESP32_BUFFER_SIZE
and (msg.len - 1) rather than the maximum value.
Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
When I2C Master writes to slave on CMD_Controller, opcode WRITE
was set twice instead of 1 WRITE at the beginning of the
transmission.
And when Master reads from slave, on CMD_Controller,
byte_num = 1 + data_lenght instead of byte_num = 1 at the
beginning of the transmission.
Note that is for 7 bits addresses, to 10 bit adressess is added
more 1 in byte_num as can be seen in the code above this fix.
Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
Since PINMUX_INPUT_ENABLED == 1 and PINMUX_OUTPUT_ENABLED == 0,
we can not set a gpio port as input and output at the same time,
So we always set the gpio as input. Thus, the gpio can be used on
I2C drivers for example.
Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
The I2C address of vl53l0x are write in hex, but the VL53L0X_I2C_ADDR
type is int.
Fix this by replace "int" with "hex".
Signed-off-by: Ding Tao <miyatsu@qq.com>
NATIVE_POSIX_STDIN_CONSOLE and NATIVE_POSIX_STDOUT_CONSOLE have more
than one prompts, this will cause warnings when run kconfig checks.
Remove one of two prompts.
Signed-off-by: Ding Tao <miyatsu@qq.com>
Michael Hope
