Provide a dtsi file that sets up common capabilities for all
Feather-based Particle Mesh devices. Provide additional dtsi files for
some obvious peripheral options.
Remove the xtensa esp32 image: it didn't build, and there's no
indication of how the ESP32 firmware can be updated on the Argon board.
Use particle_argon as the nRF52840 side of the board.
Add Particle Boron support.
Note that dtsi files must be replicated in each board directory until
tooling supports DTS includes from a shared area.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr.
Only the basic architecture support needed to run 64 bit code is
added; no drivers are added, though a low-level console exists and is
wired to printk().
The support is built on top of a "X86 underkernel" layer, which can be
built in isolation as a unit test on a Linux host.
Limitations:
+ Right now the SDK lacks an x86_64 toolchain. The build will fall
back to a host toolchain if it finds no cross compiler defined,
which is tested to work on gcc 8.2.1 right now.
+ No x87/SSE/AVX usage is allowed. This is a stronger limitation than
other architectures where the instructions work from one thread even
if the context switch code doesn't support it. We are passing
-no-sse to prevent gcc from automatically generating SSE
instructions for non-floating-point purposes, which has the side
effect of changing the ABI. Future work to handle the FPU registers
will need to be combined with an "application" ABI distinct from the
kernel one (or just to require USERSPACE).
+ Paging is enabled (it has to be in long mode), but is a 1:1 mapping
of all memory. No MMU/USERSPACE support yet.
+ We are building with -mno-red-zone for stack size reasons, but this
is a valuable optimization. Enabling it requires automatic stack
switching, which requires a TSS, which means it has to happen after
MMU support.
+ The OS runs in 64 bit mode, but for compatibility reasons is
compiled to the 32 bit "X32" ABI. So while the full 64 bit
registers and instruction set are available, C pointers are 32 bits
long and Zephyr is constrained to run in the bottom 4G of memory.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Fix the QSPI and hyperflash nodes to be proper SPI children and expose
the address range for direct access as part of the controller's reg
region.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* i2c, spi, gpio are not tested, remove them now.
* fix the license issue in openocd.cfg
* fix the shell related setting
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The initial support of iotdk which is a board based on Synopsys
ARC IoT SoC.
In this commit, it includes
* processor support
* UART driver
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The mimxrt1020_evk and mimxrt1060_evk boards had invalid jlink device
names. Debugging via 'ninja debug' now works on these boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Fixes a Kconfig typo in the mimxrt1060_evk board that was introduced
when the board was split into separate hyperflash and qspi
configurations.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the default TEXT_SECTION_OFFSET from the board level to the soc
level for the imx rt series. This offset is used to reserve space for
the imx boot header for external xip flash images.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add the codec reset GPIO to intel_s1000_crb's DTS
Update the DTS fixup for intel_s1000_crb accordingly
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Add board support files for mimxrt1020_evk, the development board for
i.MXRT1021 (CM7) SoC.
- Add pinmux, dts, doc.
- Code can be loaded to SRAM.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, and basic/button.
Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
Convert the w25qxxdv driver to use device tree for SPI device params.
Updated the Arduino 101 config to use device tree to specify the SPI
flash. Update the arduino_101_sss to drop Kconfig support for the
w25qxxdv flash.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
By default, after reset SWO signal is not connected to GPIO pin.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
lpuart1 is the default port used by ST-Link VPC.
Update board description to match out of box board configuration.
Fixes#12092
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following recent renaming of STM32 UART Kconfig UART symbols,
LPUART was named as UART_LPUART_1.
Rename to LPUART_1.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
* Add DTS support for gpio controller driver
Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
In 4940a3cac2 a compile time
check of the HW model version was added. This check worked
fine for cases in which the problem was that people had not
fetched a new enough version of the HW models.
But in some cases people will have fetched a new enough version
but be (unknowingly) in a past detached HEAD (or old tag).
With this change we ensure that the required tag is an actual
ancestor for the current HW models version HEAD
Also fail with an error, instead of just printing a warning.
Users can still disable this warning if they know what they are
doing.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
The i2c_atmel_sam3 driver was deprecated at release 1.9, this commit
removes it. Also pinmux_dev_atmel_sam3x driver is removed.
i2c_atmel_sam3 was the last one which depended on it.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Remove configuration parameter CONFIG_BUS_TYPE. Now we may
make use of DT_ST_LSM6DSL_BUS_I2C and DT_ST_LSM6DSL_BUS_SPI
definition to select the bus.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
With this change, drivers or components can register on runtime
their own command line arguments.
What this change does is to use the dynamic command line arguments
API from BabbleSim's libUtil and provides a function for the
drivers to add their own.
Note that this change requires v1.3 of the HW models (which remove
a dependency on the board command line arguments structure)
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
This function can only be used when the arguments structure memory
layout starts as in bs_basic_dev_args_t.
This assumption is just too dangerous in this board as somebody
may change the structure in the future unaware of this weird
requirement.
=> Do not use this function but do what it does in place.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
When the -nosim option is used the user may still want to set
either the simulation ID string (-s) or the device number (-d)
to control the tracing prefixes and/or dump folder, but may not
care to set both of them.
=> This change allows it, while the old behaviour is otherwise
maintained (setting both or none with -nosim)
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Updated flash partitions to extend supported boot scenarios.
Add support for using Nordic nRF5 bootloader to:
- flash a Zephyr application
- flash a MCUboot image as an application
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
The en.high-perf_nucleo-144_mbed.jpg is an empty file.
This causes error when generating PDF documentation
as the tool cannot deal with empty image files.
So replace it with the image with same filename from
nucleo_f765zg, as the images are identical from
the online product description pages.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
interface/stlink-v2-1.cfg and interface/stlink-v2.cfg are wrappers
around interface/stlink.cfg, their inclusion trigger warning which
this change addresses. Besides the warning there is nothing there
except sourcing iterface/stlink.cfg directly.
Signed-off-by: Vasili Slapik <vslapik@gmail.com>
This mode allows the USB driver to use MSI clock as source clock.
MSI PLL-Mode permits +/-0,25% accuracy.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The L476RG does not use the same I2C instance as the other L4 boards.
Correct the pinmux and add the peripheral.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
patch set the config USB_DFU_MAX_XFER_SIZE to 4096. This will
reduce the time required for flashing.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Document CAN support for board nucleo_l432kc and
add can to board yaml "support" section.
Fixes#12052
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix misspellings in documentation (.rst, Kconfig help text, and .h
doxygen API comments), missed during regular reviews.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
