stm32wb is not yet supported on openocd.
But support on pyocd can be enabled thanks to "pack" feature.
Configure board runner with pyocd and provide guidelines
to configure pyocd.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add board suppor for 96Boards Meerkat96 board from Novtech based on
NXP i.MX7 multi core processor. Zephyr is ported to run on the single
core Cortex-M co-processor on this board.
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/imx7-96/
By default Zephyr console output is available via UART1 available at
the 40pin LS connector.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
stm32l496zg_disco and nucleo_l496zg were depending on STM32L496XG SOC.
With the recent change to STM32L496XX, the dependency should be updated.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
Clean up some stray references to cmake in doc, boards and
samples that don't make explicit use of the zephyr app extension,
as well as other minor doc fixes.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The DT spec. only has "okay" and not "ok". The Linux kernel has around
12k "okay"s and 300 "ok"s.
The scripts/dts scripts only check for "disabled", so should be safe re.
those at least.
The replacement was done with
git ls-files | xargs sed -i 's/status\s*=\s*"ok"/status = "okay"/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Updates based on discussion and changes in supported features.
- Make the guide shorter by removing content that's not relevant to
most users who are truly just getting started, such as information
about pre-LTS versions that did not support west, and by being more
concise in some places.
- Decrease the number of colored boxes. At the latest TSC F2F, the
"note / warning / note / tip" contents were identified as a
readability problem.
- Add additional information based on new west features, like "west
boards".
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Hdc1008 driver is renamed into ti_hdc to prepare it to support all
available Texas Instruments HDC sensors (e.g. hdc1080, hdc2080).
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
This can't possibly have worked since the initial merge of the board.
It looks like it was originally written as a port from a KBuild
Makefile fragment but never tested, and has only been touched by
tree-wide changes since then. Try to fix it.
I don't have this hardware, but it should work the same way as
96b_nitrogen if it truly supports pyocd.
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
This commit adds counter driver based on RTCC module for SiLabs Gecko
SoCs.
Tested with SLWSTK6061A / BRD4250B wireless starter kit.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Simple renaming and Kconfig reorganization. Choice of local APIC
access method isn't specific to the Jailhouse hypervisor.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add support for reading the onboard potentiometer (ADC0 channel
12) and thermistor (ADC0 channels 0 and 1).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert all board_set_xxer(foo) calls to board_set_xxer_ifndef(foo),
which allows the user to make their own decision at CMake time.
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
This helps by letting us add checks for when the runner has already
been set. There is documentation saying you can set
-DBOARD_DEBUG_RUNNER at the command line and have it take effect,
which turns out not to be true for a large number of boards.
A status message helps the user debug.
(We'll address the existing in-tree boards in the next patch.)
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
ARC EM4 is just a baseline configuration of ARC EM family of CPU cores.
But with addition of more featuers like caches, DSP extensions etc
we're effectively getting EM6, EM5D etc templates.
So to not confuse users let's talk about families of ARC cores
as that's what makes sense together with extra features but not
templates itself.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Instead of blind copy of nsim_em.dts re-structure this way:
* nsim.dtsi - Top-level "board" description re-usable for
| all nSIM-based "boards".
|
| Even though it's not needed right now but it
| allows to add other ARC core families in the future.
|
\_ nsim_em.dtsi - Common definitions for boards with ARC EM cores
|
\_ Real boards with ARC EM cores
|
\ nsim_em.dts
\ nsim_sem.dts
\ nsim_em_mpu_stack_guard.dts
\ nsim_sem_mpu_stack_guard.dts
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This will allow us to easily specify other CPUs looking
forward and not rely on any default value.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
ARC nSIM simulates all flavors or ARC cores so there's
no point in limiting its usage to ARC EM family only.
Moreover with upcoming addition of ARC HS family support
in Zephyr we'll be re-using nSIM "board" for them as well.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Builds with coverage enabled are in a continuous state
of bit-rot as no CI job enables it. Introduce a dedicated
x86 target that builds with coverage enabled.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Newer versions of GCC (e.g. gcc 9.1.1) fail to compile the version of
Grub that is used by the Zephyr build_grub.sh script. This patch updates
the version of Grub to the latest (as of June 4 2019) which includes a
number of fixes that solve the problem.
Fixes: #16624
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Add board support (and documentation) for the Intel Gordon Peak
Module Reference Board, a dev board based on the Apollo Lake SoC.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Board LPCXpresso55S69 added to supported zephyr boards, initial simple
configuration to boot board and use UART.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
We do have a multi-architecture latency benchmark now, this one was x86
only, was never used or compiled in and is out-dated.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
1. Add flash partitions.
2. Add macro DT_START_UP_ENTRY_OFFSET. The entry of the RV32M1 is
not the start of the vector table. Add the macro to inform the
entry offset.
3. Update linker file to support MCUboot
a. For normal cases (CONFIG_BOOTLOADER_MCUBOOT is cleared), the
vector table is located last 256bytes of the flash.
b. If CONFIG_BOOTLOADER_MCUBOOT is set, the vector table is located
after the image header of MCUboot.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Configure the LPSPI PCSx pins as GPIO if not dedicated to SPI CS. This
allows using them for SPI GPIO CS.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
