Commit graph

3814 commits

Author SHA1 Message Date
Allan Stephens
4aef71b9f6 unified: Finish adding thread monitoring support
Existing code wasn't removing a thread from the kernel's list
of active threads if the thread terminated or aborted. (It did
remove it if the delayed starting of a thread was cancelled.)

Change-Id: Icc97917e33765696480d0e9bf31e882ef555d095
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-10-26 17:03:13 +00:00
Allan Stephens
2220f25f0a kernel: Standardize thread monitoring initialization
Gets rid of unnecessary THREAD_MONITOR_INIT() macro, to be
consistent with the approach taken by _thread_monitor_exit().

Aligns x86 code with the approach used on other architectures.

Revises the associated comments and removes unnecessary
doxygen tags.

Change-Id: Ied1aebcd476afb82f61862b77264efb8a7dc66c9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-10-26 17:03:12 +00:00
Allan Stephens
92e75040a2 kernel: Revise thread monitoring exit API naming
Renames _thread_exit() to _thread_monitoring_exit() to make
its purpose clearer. Revises the associated comments and
removes unnecessary doxygen tags.

Change-Id: I010a328d35d2d79d2a29b9d0b6c02097bb655989
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-10-26 17:03:12 +00:00
Carles Cufi
33d17497d2 drivers: uart_nrf5: Use MDK baudrate divisor constants
The baudrate calculation present in set_baudrate() is
causing the UART to emit inital bytes incorrectly, for a
reason currently unknown, but directly related to the fact
that __aeabi_uldivmod is being invoked.
Since the nRF5x Product Specifications do not provide a
standard formula to calculate baudrates and instead list
a predefined set of divisor values, we opt here to use the
official values and remove the attempt at calculating them
manually.

Change-Id: Ic3ff42ea6d065e9a1d26a5350ce5bf5ad661160a
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-10-25 18:40:56 +00:00
Kumar Gala
bbf736cf6e build: refactor kernel hex build to be common
Several platforms utilize a ihex image format.  Rather than
duplicating the build bits in everyones makefile, pull it into the
toplevel makefile so we all share it.

Change-Id: I9097b06e7e386a69ce6ab4d4e4d56cc776adfec2
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-10-24 10:59:22 -05:00
Anas Nashif
641944283d soc: intel_quark: source Kconfig file of SoC
Change-Id: Ibcd8dc5889cc89333a017d2838294e6abf16618a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-22 16:55:54 -04:00
Dmitriy Korovkin
dc76dbf2ef unified: Add tickless idle support for ARC
Change-Id: I89684e7bee379be0a18f64e4f2c39ae132fe7e6d
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:01 +00:00
Dmitriy Korovkin
909bfffda9 unified/arc: add unified kernel support for ARC arch
- the interrupt (both regular and fast) now does not do rescheduling
  if the current thread is a coop thread or if the scheduler is not locked

- the _nanokernel.flags cache of _current.flags is not used anymore
  (could be a source of bugs) and is not needed in the scheduling algo

- there is no 'task' field in the _nanokernel anymore: scheduling routines
  call _get_next_ready_thread instead

- the _nanokernel.fiber field is replaced by a more sophisticated
  ready_q, based on the microkernel's priority-bitmap-based one

- thread initialization initializes new fields in the tcs, and does not
  initialize obsolete ones

- nano_private includes nano_internal.h from the unified directory

- The FIBER, TASK and PREEMPTIBLE flags do not exist anymore: the thread
  priority drives the behaviour

- the tcs uses a dlist for queuing in both ready and wait queues instead
  of a custom singly-linked list

- other new fields in the tcs include a schedule-lock count, a
  back-pointer to init data (when the task is static) and a pointer to
  swap data, needed when a thread pending on _Swap() must be passed more
  then just one value (e.g. k_stack_pop() needs an error code and data)

- the 'fiber' and 'task' fields of _nanokernel are replaced with an O(1)
  ready queue (taken from the microkernel)

- fiberRtnValueSet() is aliased to _set_thread_return_value since it
  also operates on preempt threads now

- _set_thread_return_value_with_data() sets the swap_data field in
  addition to a return value from _Swap()

- convenience aliases are created for shorter names:

  - _current is defined as _nanokernel.current
  - _ready_q is defined as _nanokernel.ready_q

- _Swap() sets the threads's return code to -EAGAIN before swapping out
  to prevent timeouts to have to set it (solves hard issues in some
  kernel objects).

Change-Id: Ib9690173cbc36c36a9ec67e65590b40d758673de
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:00 +00:00
Dmitriy Korovkin
05d4b23f22 arc: Fix RGF_NUM_BANKS==1 and NUM_IRQ_PRIO_LEVELS>1 problem
Define _firq_scratch_restore, needed when CONFIG_RGF_NUM_BANKS==1
outside of CONFIG_NUM_IRQ_PRIO_LEVELS > 1 clause.

Change-Id: I82eef11a005a35f38a064ce3ce1d6521d6428958
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:00 +00:00
Ricardo Salveti
1dd18c3f92 arm: Add initial support for Nordic Semiconductor nRF51 series
Still missing a working timer driver, as SysTick is not really available
in this SoC series (enabled to avoid build issues, but not used).

Jira: ZEP-784

Change-Id: Ie1c8e6c5e8955ee7f260ce013f4451f9215f3457
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-22 01:25:55 +00:00
Ricardo Salveti
69b9451af1 arm/nordic: use a common header for the nrf51/nrf52 SoC families
Integrating the IRQ definitions for both nRF51 and nRF52, and defining
the set of IRQ values that are common to both.

Also switch the controller, uart and clock drivers to use the common
header definitions.

Change-Id: Id6816d7a97720896cfe4df83656fb8b1f8fb01fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-22 01:25:54 +00:00
Ricardo Salveti
ffacae20d0 arch/arm: add initial support for Cortex-M0/M0+
Not disabling SysTick as it is optional by the spec.

SVC not used as there is no priority-based interrupt masking (only
PendSV is used).

Largely based on a previous work done by Euan Mutch <euan@abelon.com>.

Jira: ZEP-783

Change-Id: I38e29bfcf0624c1aea5f9fd7a74230faa1b59e8b
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-22 01:25:53 +00:00
Chuck Jordan
13900b7046 arc: remove some NSIM conditionals
EM7D was recently merged, and one change suggested there was
to remove conditional checks for NSIM. It is OK to have the simulator
use the exact same memory addresses and sizes as would be found on the
board. This submission fixes EM9D and EM11D to be the same -- i.e.
to not have NSIM conditionals.
See ZEP-966.

Change-Id: Ia990ff7bb4b7ff5071af83723ed3d1420fdff012
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-21 11:53:37 -07:00
Chuck Jordan
a9442ab761 arc: em_starterkit board can now support SOC=EM7D
The EM7D SOC is similar to EM11D, except it has different sized
iccm and dccm memories, and also has FIRQ with RGF_NUM_BANK==1.
To select this SOC on the board, all dip switches are in the up position.
See ZEP-966.

Change-Id: I864ffe0efdf367de0a8cd58e9c46efd7e401c671
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-21 18:10:04 +00:00
Chuck Jordan
ff303948d5 arc: Support FIRQ handling when CONFIG_RGF_NUM_BANKS==1
For the EM Starterkit, one SOC I will soon be adding is EM7D.
This SOC has FIRQ, but only has one register bank.
Thus the interrupt handling for FIRQ needs to be different
when CONFIG_RGF_NUM_BANKS==1. The handler must instead push
registers onto the stack in the same stack frame layout that RIRQ uses.
This allows for context switch to be easily done since its compatible.
The common interrupt entry point _isr_enter must save r0 before using
it, because in the FIRQ 1-bank case, it would be destroyed otherwise.
So a global variable named saved_r0 has been added for this reason.
The stack cannot be used to save r0, because it first has to determine
whether its FIRQ or RIRQ here. This change has been tested on the
EM Starterkit with EM7D SOC changes -- coming soon. To make the review
easier, these 3 files are submitted first.

Also, exceptions will no longer use the _firq_stack.
This stack is not needed in the 1-bank case, but an exception stack
is needed. I've added a new stack called _exception_stack,
and made it be 512B, which should be enough for one exception.
See ZEP-966

Change-Id: I6f228b840da7c4db440dd1cfef4ae25336c87f0d
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-18 20:26:29 +00:00
Anas Nashif
debf5bfe63 pinmux: k64f: remove unused Kconfig section
Those options are not being used anywhere, so remove them and avoid some
confusion.

Change-Id: Ia3767dbd2432851dfae4b1e996f02ed1b2450505
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-18 20:14:52 +00:00
Vinayak Chettimada
5732ae1ae0 arm: nordic_nrf5: Select clock control for BLE controller
Bluetooth controller implementation requires the low power
oscillator for radio time space scheduling and as sleep
clock; the high frequency oscillator as the active clock.

For Nordic Semiconductor's nRF5 Series SoC's select the
NRF Clock peripheral when BLUETOOTH_CONTROLLER is selected
in Kconfig build.

Jira: ZEP-897

Change-id: I6f99e90b3485e757be61e91c749e485dd0cfdaba
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
2016-10-18 13:03:42 +00:00
Anas Nashif
dc8f7b1573 quark d2000: remove bluetooth configuration from SoC
Bluetooth is not an SoC feature of the D2000.

Change-Id: Ibc8a8e6986a7da227fc42cb833fe8508696b104a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-17 09:51:39 +00:00
Marcus Shawcroft
87077727bf eth: Add KSDK ENET driver.
Provide a network driver wrapped around the KSDK ENET and PHY
drivers.

The driver performs one shot PHY setup.  There is no support for PHY
disconnect, reconnect or configuration change.  The PHY setup,
implement via KSDK contains polled code that can block the
initialization thread for a few seconds.

There is no statistics collection for either normal operation or error
behaviour.

Origin: Original

Change-Id: Ia0f2e89a61348ed949976070353e823c178fcb24
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-16 09:57:35 +00:00
Marcus Shawcroft
14aa67cbd1 board: Enable ETH_DW for quark_x1000 if ETHERNET is enabled.
There is a convention in the soc implementation for other
(non-ethernet) classes of driver that enabling a generic driver has the
effect of enabling the specific flavour of driver required for the
board.  Extend this convention such that when ETHERNET is enabled, the
quark_x1000 enables the DW ethernet driver.

Change-Id: I525471d259c9582024cd44d6cc4557260abe6451
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-15 16:44:06 +00:00
Marcus Shawcroft
c5248a9d26 quark_se: Make ipm console config structure static.
Change-Id: Id8c4c94a76c5a5f7d2a1bcef2059511033f65ee8
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-15 12:29:24 +00:00
Marcus Shawcroft
8ea6287c0b quark: ipm: Make driver config structures static.
Change-Id: I2d4977aaea9df969fd8edb4b07310e472e6c6917
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-15 12:29:18 +00:00
Benjamin Walsh
b4b108de4d unified: rename sched.h to ksched.h
Build breaks when enabling CONFIG_NEWLIB_LIBC because it has its own
sched.h file.

This is a bad symptom of a greater issue: the build system passes many
'-I<path>' options to the compiler, and that allows including header
files by simply specifying their names (when located somewhere else than
<zephyr>/include/) and can cause clashes when several files in different
locations have the same name, like in this case.

Fixes ZEP-1062.

Change-Id: I81d1d69ee6669a609cd0c420b1b8f870d17dcb67
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-10-14 20:49:36 +00:00
Ricardo Salveti
b0e0c51b47 arm: move atomic operations selection to the Cortex-M Kconfig
Builtin might not be available for ARMv6 (Cortex-M0/M0+) depending on
the toolchain used (not available by Zephyr's SDK GCC), so move the
atomic operations selection to the Cortex-M family Kconfig file.

Change-Id: I20a5a0c5fdd2bcff2d304139f5a7e8502fdb1cb3
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-11 20:47:49 +00:00
Benjamin Walsh
35497d6c5e unified: cache the next thread to run
When adding a thread to the ready queue, it is often known at that time
if the thread added will be the next one to run or not. So, instead of
simply updating the ready queues and the bitmask, also cache what that
thread is, so that when the scheduler is invoked, it can simply fetch it
from there. This is only done if there is a thread in the cache, since
the way the cache is updated is by comparing the priorities of the
thread being added and the cached thread.

When a thread is removed from the ready queue, if it is currently the
cached thread, it is also removed from the cache. The cache is not
updated at this time, since this would be a preemptive fetching that
could be overriden before the newly cached thread would even be
scheduled in.

Finally, when a thread is scheduled in, it now becomes the cached thread
since the fact that it is running means that by definition it was the
next one to run.

Doing this can speed up considerably some context switch times,
especially when a thread is preempted by an interrupt and the same
thread is scheduled when the interrupt exits.

Change-Id: I6dc8391cfca566699bb9b217eafe6bc6a063c8bb
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-10-10 21:27:31 +00:00
Anas Nashif
5e5981234f quark_se: x86 core does not support ADC
ADC is available on the sensor subsystem only.

Change-Id: I3242108eb1f39a9509e30cc7ff440e02811ba4e6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-10 21:26:31 +00:00
Anas Nashif
e05fa64f4c frdm_k64: spi: fixed wrong kconfig used in driver
Change-Id: I43f31562cdfa0b722907e5c6018e3e56d141ed4f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-10 21:26:30 +00:00
Anas Nashif
37d2fdce13 quark: dma: enable qmsi driver if DMA is selected
Change-Id: I413dc28da562a7899c5271a36eca9a6d8d84221a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-10 21:26:29 +00:00
Benjamin Walsh
fc59e5b584 unified/arm: fix saving of registers in __pendsv()
The unified kernel calls a function (_get_next_ready_thread) to fetch
the next thread to run: it thus must save caller-saved registers that
are expected to hold a value before calling such function.

The callee-saved registers are available after saving them in the
outgoing thread's stack, so use some of those instead to reduce the
number of registers to save before calling _get_next_ready_thread. Also,
save caller-saved registers in callee-saved registers instead of on the
stack to reduce memory accesses.

This issue did not show up previously, probably because
_get_next_ready_thread did not use the regsiters that had to be saved,
but an upcoming optimization to that function stomps on them.

Change-Id: I27dcededace846e623c3870d907f0d4c464173bf
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-10-07 22:51:11 +00:00
Chuck Jordan
df4c0acd2d arc: Fix comment about IRQ call stack
The code density registers are NOT saved on the stack.
This is controlled by bit 13 in AUX_IRQ_CTRL, which didn't even have a symbol
defined for it. I've also added _ARC_V2_AUX_IRQ_CTRL_LP for bit 13.

Change-Id: Ie80853b72bed4e60a5cf1cf0a8c905a3d86180d9
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-07 20:50:26 +00:00
Chuck Jordan
ed569f525d arc: RGF_NUM_BANKS is another configurable option for ARCs
In order to add the EM7D SOC, I will be implementing a version of the FIRQ
interrupt handler that saves and restores registers on the stack when
RGF_NUM_BANKS==1. All other ARC SOCs at this time have RGF_NUM_BANKS==2,
allowing for a faster handler that can use the registers in the 2nd register bank.
But EM7D doesn't have this 2nd bank, hence the need for this new configurable choice.
(See ZEP-966)

Change-Id: Ie089f1f079902552cf279c2cda23ee0805b01eed
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-07 20:50:25 +00:00
Anas Nashif
84c9db39e7 gpio: reduce Kconfigs and use consistent name for GPIOs
Using AON for GPIO kconfigs is very specifc to quark se, there
is no need to make this special for this platform. Use the
existing scheme instead.

Change-Id: I946431490380dc0f537d6056277a94c9c9c80fed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-10-07 16:15:07 +00:00
Ricardo Salveti
1450f7bae4 arm: remove exc_wrapper.S
Not used anymore as the support for dynamic IRQs was removed by
commit 844e212.

Change-Id: I624bbd777b2dbcbf905cedc61e63cef21e8a0bce
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
2016-10-07 14:40:17 +00:00
Fabien Parent
f52baa15fb stm32: make SRAM/FLASH base address generic to soc
Move SRAM_BASE_ADDRESS and FLASH_BASE_ADDRESS to Kconfig.soc since
it will most likely be the same values for all STM32 socs.

Change-Id: I682dc441e34155a19a4f90757707008ef299e9d4
Signed-off-by: Fabien Parent <fparent@baylibre.com>
2016-10-05 18:33:21 +02:00
Qiu Peiyang
76549c1b79 I2C: remove obsolete i2c_quark_se_ss driver
i2c_quark_se_ss driver is deprecated and replaced
by i2c_qmsi_ss. So remove i2c_quark_se_ss definition.

Change-Id: Idcc6a7f01ffae626ae7d5f9966eac67be78599af
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2016-10-05 10:07:30 +00:00
Ramesh Thomas
c4c0ed414b power_mgmt: Reduce complexity in handling of power hooks
Simplified some documentation, removing inconsistencies and making
it easier to understand by separating PM infrastructure areas and
soc specific components that implement the hooks.

Removed the DEVICE_SUSPEND_ONLY policy as it is redundant and
causes high complexity in the flow. It is also not practical
to use it because it was meant to be used without doing CPU or SOC
low power state operations. This means it would do device PM
operations in the ISR of the system timer used by the scheduler.
This can disrupt the scheduler time.

Added a check of a flag around the notification sent from the ISR
of the wake event and created APIs to set/clear it. This will
allow disabling the notification when not needed from
_sys_soc_suspend().

Jira: ZEP-972
Change-Id: Id7aa7d2683384eabed518d4efac446ecc84c3498
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-10-05 10:05:42 +00:00
Andrew Boie
26b1651f0c intstub.S: fix argument to _sys_power_save_idle_exit on IAMCU
Change-Id: I5aa1abe464ba2b8f9c36be78a95705ffcf993c7d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:27 +00:00
Andrew Boie
70d8a32740 x86: interrupts: consolidate duplicated code in idle path
Change-Id: I16b80f363fef17d3ea99fec0ced4f49238f8e6c7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:07 +00:00
Andrew Boie
e56f61f5aa x86: exceptions: simplify exception stubs
Exception stubs now just push the handler and in some cases a dummy
error code before jumping to the exception handling code, never to
return.

Change-Id: I6a79d9243deb3fc7ccdae003dd0917364c0aa304
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:07 +00:00
Andrew Boie
edeb1f1c52 x86: interrupts: optimize and simplify IRQ stubs
Interrupt stubs now just push the ISR and parameter onto the stack
and jump to the common interrupt code, never to return.

Change-Id: I82543d8148b5c7dfe116c43f41791f852614bb28
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-28 20:28:06 +00:00
Andrew Boie
2d7490c7ce x86: don't unconditionally run ISRs with interrupts enabled
Re-enabling interrupts before running the ISR must only be done
when CONFIG_NESTED_INTERRUPTS is turned on.

Change-Id: I2c04f2ce08d41cfef5553ee8554a90d1be0e86a3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-26 17:53:45 +00:00
Qiu Peiyang
2a2291d430 remove unused whitespace in arch/arc/core/fault_s.S
commit  e57b21c78c ("irq: Use lowest priority not a
hard-coded priority 2") introduce a wrong whitespace,
not complying with coding style. Remove it.

Change-Id: Ie7e48843e5da6cb3417773ef8a57cf9a166c70d6
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2016-09-25 20:35:09 -04:00
Chuck Jordan
e57b21c78c irq: Use lowest priority not a hard-coded priority 2
In this file was found an assumption about how many
priorities are being used. This is configurable with
CONFIG_NUM_IRQ_PRIO_LEVELS, however, so it should be using that
instead. This line of code changes:
or r3,r3,(1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1))
so as to use the correct bit to OR.

Change-Id: I8c6297e98b5163aa27460a68b203e8a27d1e2506
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-09-24 23:22:03 +00:00
Chuck Jordan
8e5c813a24 irq: _ARC_V2_DEF_IRQ_LEVEL should be set to last legal priority
Set _ARC_V2_DEF_IRQ_LEVEL to the last legal priority value, and not 15.
The last legal value is: (CONFIG_NUM_IRQ_PRIO_LEVELS-1).
This is safer because we don't want priorites not configured to be 
enabled.

Change-Id: I1689cc00aa7e707a204d16ec17d7f396566e8638
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-09-24 23:22:03 +00:00
Peter Mitsis
b27249486a unified: Remove references to obsolete task_timeout
Change-Id: I7c3b1b8418809914d3daf9d68ed8e4c3b99dd0b1
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-09-23 19:53:20 +00:00
Andrew Boie
325cae5c94 kernel: remove lingering irq_connect_dynamic() references
This API no longer exists.

Change-Id: I724bee8c0ebfbbe2d47c00c7645977d817bbcd36
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-23 15:36:51 +00:00
Anas Nashif
58002193e9 drivers: gpio: reuse gpio Kconfigs for sensor subsystem
No need to create new Kconfig that do exactly the same, just
reuse those from the main QMSI driver.

Change-Id: I965055f36845ac0464e4a383b0d05c3ae35c0015
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-09-22 01:00:46 +00:00
Andrew Boie
99368c7435 x86: optimize GDT space
The CPU manual indicates that 8-byte alignment is sufficient,
not sure why gdt_rom was aligned on a 16-byte boundary.

The null descriptor in the GDT is never looked at by the CPU,
save a few bytes by putting the 6-byte pseudo descriptor there.

Change-Id: I73f26cdeb30a91f8258c88ef960a45812a11d959
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-20 20:47:15 +00:00
Andrew Boie
757dae5b7d x86: introduce new segmentation.h header
This header has a bunch of data structure definitions and macros useful
for manipulating segment descriptors on X86. The old IDT_ENTRY defintion
is removed in favor of the new 'struct segment_descriptor' which can be
used for all segment descriptor types and not just IRQ gates.

We also add some inline helper functions for examining segment registers,
descriptor tables, and doing far jumps/calls.

Change-Id: I640879073afa9765d2a214c3fb3c3305fef94b5e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-20 20:46:45 +00:00
Vinayak Chettimada
79cdf33579 ARM: irq: Add _arch_irq_is_enabled external interrupt API
Add _arch_irq_is_enabled external interrupt API to find out
if an IRQ is enabled.

Change-id: I8ccbaa6d4640c1ab8369d2d35c01a2cfbb02f6cd
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
2016-09-20 19:45:31 +00:00