During the compression an empty settings entry was
copied to the scratch sector form the oldest sector in case
lack of newer entry version in fcb storage.
This doesn't make sense as empty entry and lack of entry has
similar meaning.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Document the gsource (globbing source), rsource (relative source), and
grsource (globbing + relative source) statements.
Also add a separate section that documents Zephyr's non-standard
prefer-later-defaults Kconfig behavior. It was only mentioned in passing
before.
Piggyback: Move the note about .config assignments having no effect on
invisible symbols closer to the beginning of the 'Configuring invisible
Kconfig symbols' section. It makes more sense there.
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
sendto() is one and only caller of send_data(), a function of handful
of lines, and yet send_data() is located a hundred lines away from
it. Such "spaghetti functions" complicate review, debugging, and
refactoring of the IP stack.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
MPU devices that enforce power-of-two alignment now
specify the size of the buffer used for the newlib heap.
This buffer will be properly aligned and a pointer
exposed in a kernel header, such that it can be added
to a user thread's memory domain configuration if
necessary.
MPU devices that don't have these restrictions allocate
the heap as normal.
In all cases, if an MPU/MMU region needs to be programmed,
the z_newlib_get_heap_bounds() API will return the necessary
information.
Given how precious MPU regions are, no automatic programming
of the MPU is done; applications will need to do this as
needed in their memory domain configurations.
On x86, the x86 MMU-specific code has been moved to arch/x86
using the new z_newlib_get_heap_bounds() API.
Fixes: #6814
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The horizontal scroll (hscroll) wasn't initialized properly when the
initial (prefilled) contents of an edit box was longer than the edit box
itself (e.g. when saving with a long path in KCONFIG_CONFIG). Things
snapped back into place once a key was pressed.
Properly initialize hscroll to fix the initial rendering.
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
It's highly unlikely that snprintk() will return a negative value, but
that's a possibility that will make the `pos` variable be set to a
value outside the boundaries of the statically allocated `buf` array.
Also clamp writes to ensure that the statically allocated buffer won't
be overwritten with a large token length.
Fixes#7070.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This patch restricts the stack sentinel to only be allowed if the
USERSPACE configuration option is not set. The stack sentinel feature
is redundant if used in conjunction with the USERSPACE, due to the
protection mechanisms in place for stacks.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Adds dts bindings for the mcr20a wireless transceiver. The frdm_k64f
board supports the mcr20a via an Arduino shield, therefore the dts node
is added to the board dts. The kw2xd is a SiP and thus the mcr20a dts
node is added to the soc dts.
The networking samples using prj_frdm_k64f_mcr20a.conf have been broken
since the refactoring of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Configures the frdm_kw41z board to mux spi signals on pins PTC16-19.
Updates the board document to reflect that spi is supported on these
pins.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The kw40z and kw41z socs have the same dspi peripheral as the k64 and
kw2xd, so we can reuse the existing mcux dspi shim driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux dspi shim driver to use the clock control interface
instead of calling CLOCK_GetFreq() directly. With this change, we are
now getting all soc-specific information from device tree and can remove
the direct dependency on soc.h.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts spi bindings for the kinetis dspi controller, and updates the
k64, kw2xd, kw40z, kw41z dts nodes accordingly.
Updates the dts interrupt priorities to match the board defconfigs
(e.g., boards/arm/frdm_k64f/Kconfig.defconfig)
For k64, fixes an error in the spi1 interrupt number and adds a third
instance (spi2).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Spi configs like irq priority and device name should not exist if the
spi driver supports device tree. Fixes a few configs that were missing
the necessary "depends on !HAS_DTS_SPI".
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some spi instance configs were wrapped with ifdefs, while others used
depends. Make them consistent by wrapping them all with ifdefs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts bindings for the fxas21002 interrupt pins to all boards that
have this sensor.
The fxas21002 driver is currently only aware of one sensor interrupt
pin, therefore the routing of INT1 or INT2 to the driver is handled in
each board's dts.fixup.
The fxas21002 sample application has been broken since the refactoring
of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts bindings for the fxos8700 interrupt pins to all boards that
have this sensor. The frdm_k64f and hexiwear_k64 connect both sensor
interrupt pins to the mcu, but the frdm_kw41z connects only one.
The fxos8700 driver is currently only aware of one sensor interrupt pin,
therefore the routing of INT1 or INT2 to the driver is handled in each
board's dts.fixup.
The fxos8700 sample application has been broken since the refactoring of
the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add a set of Kconfig symbols that allow us to set that the GPIO
driver/SoC support DTS (HAS_DTS_GPIO) and that drivers that need/use
GPIO support DTS as well (HAS_DTS_GPIO_DEVICE).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There are certain use cases where the application needs to be able to
explicitly set a specific identity address. This was previously
possible using the bt_storage API, however now that it's gone another
solution is needed.
This patch adds a ne bt_set_id_addr() API which the application can
use to set a specific identity address before calling bt_enable().
Fixes#7434
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add cs, irq and reset gpios description in spbtle controller
node and use generated defines instead of Kconfig symbols.
Define a bt alias to allow generation of defines with friendly
names.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to generate GPIO definition for control pin of BlueNRG module
define reset-gpio and irq-gpio in st,spbtle-rf yaml binding.
Add HAS_DTS_SPI_PINS kconfig symbol to control use of the '#define'
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that we can generate gpio info from dts lets add optional support
fot the cs-gpios property in the bus controller node. This matches the
binding spec from Linux on how cs-gpios are handled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
With recent dts script change we dropped _0 from define names if there
is only a single one. So for the MPU we need to use
CONFIG_SRAM_BASE_ADDRESS instead of CONFIG_SRAM_BASE_ADDRESS_0.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When we included SoC specific Kconfig files we do something like:
gsource "arch/arm/soc/arm/*/Kconfig.soc"
However, we should do that inside an if block for that SoC family so as
to limit SoC family specific options to only being visible when that SoC
family is selected. So we simply move the gsource and related items
inside the if SOC_FAMILY_<SOC> block.
Fixes: #7452
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to disable the execution of code from the RAM region
we need to declare it in arm_mpu_regions.c file.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
In dts.fixup files for used for NXP SoCs, IP clock name was
bound to SIM clock label. This is correct but would require
manual change if IP clock controller was changed in device tree.
Use reference to IP generated define "_CLOCK_CONTROLLER" to get
this value.
Besides, having all IP related values starting with the same prefix
will be easier for possible macro preprocessing (if required one day).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
'cell_string' yaml attribute has been introduced in order to
help enforcement of specific string during defines generation.
This adds complexity in understanding script behavior as a black
box and create additional dependency which is not strictly required.
For node specific generation functions (pinctrl and interrupts),
this could be replaced directly by an hardcoded version
(as everyone used the same 'cell_string' anyway).
For extract_cells functions, string could be replaced by extracted
property name. As a consequence, we're now able to generate defines
for properties refering to these controllers via phandle.
For instance, in following node
spbtle-rf@0 {
compatible = "st,spbtle-rf";
reg = <0>;
reset-gpios = <&gpioa 8 0>;
};
We'll be able to generate:
#define ST_STM32_SPI_...LE_RF_0_RESET_GPIOS_CONTROLLER "GPIOA"
#define ST_STM32_SPI_...PBTLE_RF_0_RESET_GPIOS_FLAGS_0 0
#define ST_STM32_SPI_..._SPBTLE_RF_0_RESET_GPIOS_PIN_0 8
Only impact for this whole change is for NXP clocks which were the
only ones using 'cell_string' attribute with a value different than
the default one.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
extract_controller only handle the first phandle in a cell property.
However we could easily have something like this where the phandles
vary:
gpios = <&gpiod 13 GPIO_INT_ACTIVE_LOW
&gpioc 14 GPIO_INT_ACTIVE_LOW>;
So we need to walk the property list for each phandle and produce a
define associated with it.
Also, if alias to the node is defined, indexed alias define
is generated for every indexed controller define:
#define GPIO_LEDS_0_GPIO_CONTROLLER_0 "GPIOA"
#define GPIO_LEDS_0_GPIO_CONTROLLER_1 "GPIOB"
#define LED1_GPIO_CONTROLLER_0 GPIO_LEDS_0_GPIO_CONTROLLER_0
#define LED1_GPIO_CONTROLLER_1 GPIO_LEDS_0_GPIO_CONTROLLER_1
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If we had something like:
gpios = <&gpiod 13 GPIO_INT_ACTIVE_LOW
&gpiod 14 GPIO_INT_ACTIVE_LOW>;
The script blows up in extract_cells. While extract_cells attempted to
handle more than a single item in such a list, it didn't manipulate the
prop list for the recursive calls properly.
Since we pop off items from the prop list as we use them we can easily
pass the prop list to the rescurive call to fix things.
Besides, if alias is defined for the node, indexed aliases defines are
generated:
#define GPIO_LEDS_0_GPIO_FLAGS_0 4
#define GPIO_LEDS_0_GPIO_FLAGS_1 0
#define GPIO_LEDS_0_GPIO_PIN_0 5
#define GPIO_LEDS_0_GPIO_PIN_1 6
#define LED1_GPIO_FLAGS_0 GPIO_LEDS_0_GPIO_FLAGS_0
#define LED1_GPIO_FLAGS_1 GPIO_LEDS_0_GPIO_FLAGS_1
#define LED1_GPIO_PIN_0 GPIO_LEDS_0_GPIO_PIN_0
#define LED1_GPIO_PIN_1 GPIO_LEDS_0_GPIO_PIN_1
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Indexed defines were systematically generated even when there
was only one element to generate.
So we ended up generated a lot of _0 defines.
Then we needed to generate aliases to these _0 indexed defines,
in order to get useful defines.
For instance:
#define GPIO_LEDS_0_GPIO_FLAGS_0 4
#define GPIO_LEDS_0_GPIO_PIN_0 5
#define GPIO_LEDS_0_GPIO_FLAGS GPIO_LEDS_0_GPIO_FLAGS_0
#define GPIO_LEDS_0_GPIO_PIN GPIO_LEDS_0_GPIO_PIN_0
This commit allows to generate _0 indexed define only if a
property has more than one elements to define.
Aliases generation to _0 indexed defines are also removed.
Note: IRQ are left untouched since this is frequent to handle
multiple IRQs in a driver
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some functions were using y_key and y_val as argument. This was not
quite easy to read. Rename argument into more informative versions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add usb disconnect pin support.
Some boards use a GPIO pin to controll a transistor,
which drives the pull-up resistor on USB DP pin.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add few tests to check access permissions of memory partitions
of a memory domain, validate memory domain destroy.
Signed-off-by: Spoorthi K <spoorthi.k@intel.com>
The mailing list hosting software change introduced some changes to
where mailing lists are hosted. Update the docs to point at the
specific sublists rather than the top-level site. (See issue #7437).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
