iMX.RT parts use a GPR register for some pinmux settings. Update pinctrl
driver to support this GPR register definition.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
OCRAM can be used for DMA, and in this case it should be marked as
noncacheable. Add KConfig symbol and appropriate linker scripts to
enable OCRAM region to be defined as noncacheable, and initialized with
data from flash at boot.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This update current Atmel sam0 pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam0
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update current Atmel sam pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
In npcx adc driver, we select 'Scan' (Multiple Channels Operation Mode)
mode by default. It means that selected channels in ADCCS will be
converted automatically. Then, read the measured data from CHNDAT
registers if EOCCEV (Event is set after all selected channels are
converted.) flag in ADCSTS is set.
But we enable the wrong interrupt type, INTECEN, during adc
initialization. Ec will send the interrupt after each channel in ADCCS
is converted. It has no harm to the current driver since the driver
reads all selected channels and turns off ADC converter only after
EOCCEV is set in ISR. But it does generate spurious interrupts.
This CL enables the correct interrupt type, INTECCEN, during adc
initialization. Ec only sends the interrupt after all of channels in
ADCCS are converted.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This is required to include the resource table in the build output. The
Linux remoteproc framework explicitly looks for this section while loading
the elf and may complain if the resource table is missing.
Signed-off-by: Matthias Fend <matthias.fend@emfend.at>
Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This
processor operates at 200MHz and executes on SRAM.
This patch adds support for ast1030 as the first SoC of this series
which is targeted but not limited at the bridge IC in a server system.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
KW24 and KW22 series support open drain pins, while rest of kinetis KW
SOCs do not. Don't redefine PORT_PCR_ODE for these SOCs
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Extend the macro with checks for DT properties related to pin
assignments that are defined but would be ignored, depending on
whether PINCTRL is enabled or not, what presumably indicates
a resulting configuration different from what the user expects.
Add also a possibility to indicate that the pinctrl-1 property
should not be checked because the caller does not support the
sleep state.
Rename the macro so that its name better reflects its function.
Update accordingly all drivers that use it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add Kconfig items that can be used to query if the current SoC
support the HW peripheral CTRLAP.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The pm_constraint_* APIs were effectively used by the policy manager
only. This patch renames the API to the policy namespace and makes its
naming more explicit:
- pm_constraint_set -> pm_policy_state_lock_get()
- pm_constraint_release -> pm_policy_state_lock_put()
- pm_constraint_get -> pm_policy_state_lock_is_active()
The reason for these changes is that constraints can be of many types:
allow/disallow states, impose latency requirements, etc. The new naming
also makes explicit that the API calls will influence the PM policy
behavior.
All drivers and documentation have been updated accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for configuring pins to be used by the nRF PWM, QDEC, and
QSPI peripherals.
A new custom property "nordic,invert" is added to the pin configuration
group binding to allow configuring PWM channel outputs as inverted.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add a 4k indentity mapping in the MMU for the Processor System GPIO
controller if the parent device node is enabled in the device tree.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
USB pll clock should be enabled if USB driver is used. Add required
configuration for USB pll clock.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This is mostly the same than the aarch64 one, excepted that we
force the armv8r fvp to run in aarch32 profile. So that we can simulate
the Cortex-R52.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:
sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add build assertions that will ensure that every peripheral for
which a driver instance is created has some pins assigned to it.
Neither pinctrl-0 nor *-pin properties can be currently marked as
required in devicetree, so these assertions will help users avoid
invalid configurations where it could be hard to figure out why
the UART is not working.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
nRF5340 application core should not attempt to pass control over any
pins to the nRF5340 network core if the latter is disabled.
This commit fixes https://github.com/zephyrproject-rtos/zephyr/issues/43476.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Enables low power clocks for mimxrt1064. This allows the soc to
transition into very low power states during idle, as most PLLs can be
disabled. Power states need to be enabled and selected at the board
level.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add power management code for the RT10xx SOC. By default, the code will
simply gate the core clock and transition the SOC to WAIT mode when
sleeping, but if clocking hooks are register to reduce clock frequencies
these will be called as well, and the SOC core voltage will be lowered
for additional power savings.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add KConfig symbols to select power management HAL drivers required for low
power modes. Set ZTEST_NO_YEILD if PM is enabled, since RT series SOCs
do not connect to a debugger in WAIT mode.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The NXP KE1xF SoC series does not support neither slew rate nor open
drain PORT configuration registers.
Fix pinctrl compilation for the KE1xF by defining dummy register macros
for the SRE and ODE registers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove a redundant symbol that was used as a proxy to enable CONFIG_PM.
If an application needs to enable PM, it should just enable PM subsystem
Kconfig options. Furthermore, there's no clue "SOC_POWER_MANAGEMENT" is
a Microchip specific option.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename CONFIG_SOC_POWER_MANAGEMENT_TRACE to CONFIG_NPCX_PM_TRACE so that
it is clear that it's a NPCX specific option.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove a redundant symbol that was used as a proxy to enable CONFIG_PM
and CONFIG_PM_DEVICE. If an application needs to enable PM, it should
just enable PM subsystem Kconfig options. Furthermore, there's no clue
"SOC_POWER_MANAGEMENT" is a NPCX specific option.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add pinctrl include file to define SOC specific pinctrl_soc_t structure,
used to store pin configuration for pinctrl driver
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Attaching SFRO clock to FlexCOMM0 should be conditional on the
device tree as an application may not need SFRO attached to FlexCOMM0.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
The Bluetooth HCI driver based on the RPMsg transport now uses the IPC
service module. The compatible Bluetooth sample - HCI RPMsg - has also
been migrated to the new IPC solution.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Add configurable init priority for nrf53 synchronized rtc module.
Add build time assert to ensure that initialization is done after
mbox.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The constraints API offered by TI HAL is meant to be used externally,
for example, when implementing a policy using their policy mechanism
(not used on Zephyr). The API is likely designed for systems where a
thin RTOS is used (e.g., FreeRTOS, TI-RTOS?), places where you basically
get a Kernel and a few services around, but not a system like Zephyr
where you also get, for example, a power management subsystem. This
means that it gets difficult for an RTOS like Zephyr to use such HAL
APIs while using its own constraints API. The first question is why we
allowed such kind of HAL code to be part of upstream Zephyr. It
certainly does useful things, but it is also uses a HAL infrastructure
which is hardly exportable to an RTOS like Zephyr. Part of the
Power_init() code, for example, should likely be in a clock controller
driver, where Zephyr APIs can be used.
The _solution_ that was done to workaround this case was allowing custom
full re-implementations of the constraints API. So we are basically
overwriting a functional API with custom HAL code because of poor HAL
designs. This is in general a bad design principle. If we allow this, we
can hardly offer any guarantees to the API users. For example, is
re-implemented as thread-safe? What is the API behavior then? ...
Platforms like TI that have incomplete support in Zephyr tend to leverage
to HAL code certain functions that should be proper Zephyr
drivers. Such platforms should not influence the design of APIs because
they lack solid foundations.
This patch removes the custom implementation since the HAL has been
patched so that it forwards PM state constraints to Zephyr.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
