Commit graph

8801 commits

Author SHA1 Message Date
cyliang tw
51d57f612d drivers: pinctrl: add pin group for NuMaker pinctrl
Update Nuvoton numaker series pinctrl, let support pin group.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-28 06:49:38 +00:00
Fabio Baltieri
9065c2d156 input: convert xpt2046 from kscan
Convert the XPT2046 driver to the input subsystem, change the api,
remove the callback and enable logic.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-06-27 12:17:06 +00:00
Manojkumar Subramaniam
80fda53492 dts: riscv: add a initial SoC dtsi for Efinix Sapphire SoC
Sapphire SoC from Efinix

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-06-27 12:09:57 +00:00
Manojkumar Subramaniam
e8109f903c dts: bindings: timer: Add efinix,sapphire-timer0
A new timer controller addition

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-06-27 12:09:57 +00:00
Manojkumar Subramaniam
197cce50d0 dts: bindings: serial: Add efinix,sapphire-uart0
A new UART controller addition, interrupt is optional

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-06-27 12:09:57 +00:00
Manojkumar Subramaniam
2ec89ba831 dts: bindings: gpio: Add efinix,sapphire-gpio
A new gpio controller addition

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-06-27 12:09:57 +00:00
Manojkumar Subramaniam
1eb4317d5c dts: bindings: vendor-prefixes: Add efinix prefix
Add efinix manufacturer binding prefix.

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-06-27 12:09:57 +00:00
Gerard Marull-Paretas
a44f61c5f5 tests: lib: devicetree: api: test the 'reserved' status
The `reserved` status, even though supported, was not tested. Add
coverage for it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-26 03:10:30 -04:00
Alexander Razinkov
b158c52e24 devicetree: support of 64-bit addresses from devicetree
Usage of 64-bit address constants from devicetree without a
UINT64_C wrapping macro results in the following warning and the
cut-off of the address value:

"warning: integer constant is so large that it is unsigned"

This change extends devicetree API adding few wrappers over the
address constant getters which add ULL size suffix to an
address integer literal when the appearance of 64-bit address
values is possible

Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
2023-06-25 03:29:54 -04:00
Jason Yuan
fcb4c23b95 dts: bindings: afe: add current sense amplifier
Add bindings for a current sensor using a shunt resistor and amplifier.

Signed-off-by: Jason Yuan <jasonyuan@google.com>
2023-06-24 18:54:33 +02:00
Jason Yuan
7b73beab43 dts: bindings: adc: add shunt sensor
Add bindings for a current sensor using a shunt resistor.

Signed-off-by: Jason Yuan <jasonyuan@google.com>
2023-06-24 18:54:33 +02:00
Jason Yuan
67bdd17808 drivers: adc: voltage divider
adds DT macro initializer and scaling function for voltage divider.

Signed-off-by: Jason Yuan <jasonyuan@google.com>
2023-06-24 18:54:33 +02:00
Conor Paxton
ea42995f2e dts: riscv: introduce PolarFire SoC I2C interface
Add support for Microchip's PolarFire SoC I2C interface
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
2023-06-23 12:31:36 -04:00
Ethan Duckett
3b6409e34e dts: stm32g4: fix clk-lse driving-capability
Altered LSE in stm32g4.dtsi to same value as other ST DTS files.

Signed-off-by: Ethan Duckett <ethan.duckett@brillpower.com>
2023-06-23 15:14:16 +00:00
Andy Sinclair
7bc99e246c drivers: led: npm1300: nPM1300 LED driver
Added LED driver for nPM1300 PMIC

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-06-23 08:55:13 +00:00
Fabio Baltieri
2790106c33 input: add a gpio qdec input driver
Add a GPIO based quadrature decoder driver that reports relative axes
movements using the input subsystem.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-06-22 10:46:15 +02:00
Georgij Cernysiov
5cde75688e dts: bindings: ospi: add ospim io ports
Adds properties to configure OCTOSPI IO
Manager data lines. That allows to use
any `IOLowPort` and `IOHightPort`.

Note: OSPIM requires additional clock to be enabled.
      Please refer to Reference Manual.
      Extra clock can be enabled in devicetree.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-06-21 16:06:00 +02:00
cyliang tw
0fd564ef7f drivers: gpio: support for Nuvoton numaker series GPIO
Add Nuvoton numaker series GPIO support, including interrupt mode and
also integrate clock control.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
cyliang tw
6176687c88 drivers: serial: support for Nuvoton numaker series UART
Add Nuvoton numaker series UART support, including interrupt-driven,
also apply pinctrl and clock-control.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
cyliang tw
c448dceb57 drivers: reset: add support for NuMaker series reset
Add Nuvoton numaker series reset controller support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
cyliang tw
4ad399d54d drivers: clock_control: add support for Nuvoton numaker series CLK
Add Nuvoton numaker series clock controller support, including:
1.  Do system clock initialization in z_arm_platform_init().
2.  Support peripheral clock control API equivalent to BSP
    CLK_EnableModuleClock()/CLK_SetModuleClock().

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
cyliang tw
5879810137 drivers: pinctrl: add support for NuMaker series pinctrl
Add Nuvoton numaker series pinctrl support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
cyliang tw
512371b75b soc: arm: add support for nuvoton numaker m46x series
Add initial support for nuvoton numaker m46x SoC series including
basic init.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
Marko Sagadin
54cbf45c74 drivers: uart: add support for serial ports on native posix
Add support for communication with serial ports on native POSIX platform
via UART driver API. Serial port driver supports polling API,
configuration of the serial ports used via devicetree and command line
options, and runtime configuration with `uart_configure`.
Multiple instances of the driver are supported.
Example use and configuration is also demonstrated in the
`samples/drivers/uart/native_tty` sample.

Closes: #56586

Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
2023-06-21 09:27:22 +02:00
Jaska Uimonen
e2e3dc0771 dts: xtensa: intel: add imr entry to cavs25_tgph
Add similar imr definition to cavs25_tpgh as in cavs25.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-06-20 12:57:29 -04:00
Jaska Uimonen
a8b28f13c1 soc: intel_adsp: cavs: add simple IMR functionality
Add simple mechanism to load the image from IMR memory. Basically we are
only setting a flag in power off for the next boot to jump to existing
image in IMR.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-06-20 09:28:56 +01:00
Maciej Baczmanski
9748250e72 dts: vendor-prefixes: Add OpenThread.io vendor prefix
Added OpenThread.io vendor prefix to enable
`openthread,config` dts binding for additional OpenThread configurations.

Signed-off-by: Maciej Baczmanski <maciej.baczmanski@nordicsemi.no>
2023-06-19 15:03:24 +02:00
Guy Morand
890363a6fb drivers: led: Add lumissil is31fl3216a driver
The IS31FL3216A is a fun light LED controller. The LED current of each
channel can be set in 256 steps by adjusting the PWM duty cycle through
an I2C interface.

Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
2023-06-19 11:02:36 +02:00
Jonas Remmert
99751b1d98 drivers: led: Add lp5569 led controller driver
Add a minimal driver for the ti lp5569 led controller. The driver supports
multiple instances. Commands on|off|set_brightness are supported.

Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
2023-06-19 09:17:52 +01:00
Piotr Wojnarowski
bc8b234d9c soc: arm64: ls1046a: Move GIC version to DT
Move the GIC version to the device tree for ls1046a
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
6b004bc1b9 soc: arm64: am6x: Move GIC version to DT
Move the GIC version to the device tree for am6x
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
0e537bc04e soc: arm64: rk3399: Move GIC version to DT
Move the GIC version to the device tree for rk3399
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
2ba2e1dc3a soc: arm64: intel_socfpga: Move GIC version to DT
Move the GIC version to the device tree for intel_socfpga
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
7908d7556c soc: arm64: nxp_imx: Move GIC version to DT
Move the GIC version to the device tree for nxp_imx
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
7626426f27 soc: arm64: qemu: Move GIC version to DT
Move the GIC version to the device tree for the QEMU platforms
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
184440239e soc: arm64: mimx9: Move GIC version to DT
Move the GIC version to the device tree for mimx9
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
03aa363a6c soc: arm64: viper: Move GIC version to DT
Move the GIC version to the device tree for viper
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
ff9fe7271a soc: arm64: fvp_aemv8: Move GIC version to DT
Move the GIC version to the device tree for fvp_aemv8{a,r}
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
fc29f73a29 soc: arm: xilinx_zynqmp: Move GIC version to DT
Move the GIC version to the device tree for xilinx_zynqmp
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
0835a99fac soc: arm: renesas_rcar: Move GIC version to DT
Move the GIC version to the device tree for renesas_rcar
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
48ba2aec6a soc: arm: cyclonev: Move GIC version to DT
Move the GIC version to the device tree for cyclonev
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
bca43d3eaf soc: arm: nxp_s32: Move GIC version to DT
Move the GIC version to the device tree for nxp_s32
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
95c1a7e83f soc: arm: xilinx_zynq7000: Move GIC version to DT
Move the GIC version to the device tree for xilinx_zynq7000
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
2f5ac45e53 dts: bindings: interrupt-controller: GIC: Allow specifying version in DT
Currently, only the presence of a GIC is reflected in the device tree,
and its version must be set separately in each SoC's Kconfig.
This patch adds separate bindings for each GIC version whose presence
in the device tree automatically enables the corresponding Kconfig symbol.

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
88f4353ce1 dts: bindings: interrupt-controller: GIC: Update description
When the GIC driver was originally introduced, it was only used on
Cortex-R SoCs. However, this is not the case anymore. Update the
description to reflect that this driver is not specific to Cortex-R.

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Daniel DeGrasse
6c10da7957 drivers: sensor: introduce driver for TCN75A temperature sensor
Add driver for TCN75A temperature sensor. The following features are
supported:
- TCN75A oneshot mode, which allows single shot conversions with lower
  power consumtion
- Resolution selection, up to 12 bit resolution (9 bit default)
- Triggering based on temperatue thresholds. If the TCN75A exits a set
  threshold range, the application can be notified via a callback.

Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
2023-06-17 08:01:16 -04:00
Manimaran A
0f6cb5edcd drivers: ps2: microchip: Low power and wakeup enabled
ps2 driver updated to support low power and wakeup.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-06-17 07:59:07 -04:00
Gerard Marull-Paretas
74b063ed58 boards: cc32(20|35)sf_launchxl: add UART0 pinctrl entries
Add UART0 pinctrl entries, and make them required at bindings level.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-17 07:55:43 -04:00
Gerard Marull-Paretas
8654f321e9 boards: cc32(20|35)sf_launchxl: add I2C pinctrl entries
Add I2C pinctrl entries, and make them required at bindings level.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-17 07:55:43 -04:00
Gerard Marull-Paretas
c0bc9f974f drivers: pinctrl: add TI CC32XX driver
Add a new pinctrl driver for TI CC32XX SoC. The driver has not been
tested, just implemented following datasheet specs and checked that it
compiles. Consider this as a best-effort driver to remove custom pinmux
code in board files.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-17 07:55:43 -04:00