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dts: xtensa: intel: add imr entry to cavs25_tgph

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Add similar imr definition to cavs25_tpgh as in cavs25.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
This commit is contained in:
Jaska Uimonen 2023-06-20 16:55:31 +03:00 • committed by Anas Nashif
commit e2e3dc0771
1 changed files with 7 additions and 0 deletions
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7
dts/xtensa/intel/intel_adsp_cavs25_tgph.dtsi
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@ -83,6 +83,13 @@
wovcro-supported;
};
IMR1: memory@0xb0000000 {
compatible = "intel,adsp-imr";
reg = <0xB0000000 DT_SIZE_M(16)>;
block-size = <0x1000>;
zephyr,memory-region = "IMR1";
};
soc {
shim: shim@71f00 {
compatible = "intel,adsp-shim";