michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: arm64: fvp_aemv8: Move GIC version to DT

Browse source 
Move the GIC version to the device tree for fvp_aemv8{a,r}
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
This commit is contained in:
Piotr Wojnarowski 2023-05-17 17:57:03 +02:00 • committed by Anas Nashif
commit ff9fe7271a
5 changed files with 2 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

2
boards/arm64/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.dts
View file

@ -80,7 +80,7 @@
interrupt-parent = <&gic>;
gic: interrupt-controller@2f000000 {
compatible = "arm,gic";
compatible = "arm,gic-v3", "arm,gic";
reg = <0x2f000000 0x10000>, // GICD
<0x2f100000 0x200000>; // GICR
interrupt-controller;

2
dts/arm64/fvp/fvp-aemv8r.dtsi
View file

@ -60,7 +60,7 @@
interrupt-parent = <&gic>;
gic: interrupt-controller@af000000 {
compatible = "arm,gic";
compatible = "arm,gic-v3", "arm,gic";
reg = <0xaf000000 0x10000>,
<0xaf100000 0x200000>;
interrupt-controller;

1
soc/arm/arm/fvp_aemv8r_aarch32/Kconfig.soc
View file

@ -10,7 +10,6 @@ config SOC_FVP_AEMV8R_AARCH32
select CPU_CORTEX_R52
select CPU_HAS_ARM_MPU
select CPU_HAS_MPU
select GIC_V3
select GIC_SINGLE_SECURITY_STATE
select PLATFORM_SPECIFIC_INIT

1
soc/arm64/arm/fvp_aemv8a/Kconfig.soc
View file

@ -8,6 +8,5 @@ choice
config SOC_FVP_BASE_REVC_2XAEMV8A
bool "ARM FVP Base RevC 2xAEMv8A AArch64 simulation"
select CPU_CORTEX_A53
select GIC_V3
endchoice

1
soc/arm64/arm/fvp_aemv8r/Kconfig.soc
View file

@ -9,7 +9,6 @@ config SOC_FVP_AEMV8R_AARCH64
bool "ARM FVP AEMv8R aarch64 simulation"
select CPU_CORTEX_R82
select CPU_HAS_MPU
select GIC_V3
select GIC_SINGLE_SECURITY_STATE
endchoice