Commit graph

11,885 commits

Author SHA1 Message Date
Krzysztof Chruściński
9caab5b23f dts: bindings: nordic-nrf-nfct-v2: Extend description
Add information about nfct node status. For cpuapp status is irrelevant
because NFCT is by default assigned to cpuapp but for cpurad node needs
to have reserved status.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-06-12 11:46:21 +02:00
Krzysztof Chruściński
b84dd5b600 dts: vendor: nordic: Fix nfct compatible
Use nordic,nrf-nfct-v2 compatible in the main nrf54h20 devicetree
description.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-06-12 11:46:21 +02:00
Fin Maaß
dfb5a31b3e drivers: ethernet: phy: add dt prop for default speeds
add dt prop for default speeds, that the phy is
configured on init by default.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-06-12 11:44:46 +02:00
Jordan Yates
5dcaf077e7 regulator: npm1300: configure active discharge
Configure the active discharge feature for both the BUCK and LDO/LDSW
blocks through the appropriate registers.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-12 11:40:32 +02:00
Jordan Yates
c458d92cf1 dts: nordic: rng_hci disabled by default
As a software construct that depends upon Bluetooth being enabled,
this device should not be enabled by default. Most nRF SoC's have
internal `RNG` hardware that is much more efficient to access.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-12 11:28:43 +02:00
Jordan Yates
864d818a41 dts: nordic: nrf5340: enable rng_hci
Explicitly enable `rng_hci` on nRF5340 application core boards, as the
application core dos not have access to a dedicated RNG hardware
peripheral (limited to the network core).

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-12 11:28:43 +02:00
Neil Chen
ab3d2dc830 boards: frdm_mcxa153,frdm_mcxa156: add hwinfo support
1. enable hwinfo support
   - device_id_get
   - get_reset_cause
   - get_supported_reset_cause
   - clear_reset_cause
2. verified tests/drivers/hwinfo

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-06-12 10:24:40 +02:00
Jiafei Pan
42ae45c1f9 dts: nxp_mimx943_a55: add GPIO device nodes
Added all GPIO device nodes in i.MX 943 Cortex-A Core SoC dts.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-06-11 18:31:10 -07:00
Silicon Signals
ba36bf6c0a audio: codec: Add driver for MAX98091 codec
This patch adds a minimal driver for the MAX98091 audio codec.
Currently, playback functionality is supported.

Co-developed-by: Rutvij Trivedi <rutvij.trivedi@siliconsignals.io>
Signed-off-by: Rutvij Trivedi <rutvij.trivedi@siliconsignals.io>
Co-developed-by: Tarang Raval <tarang.raval@siliconsignals.io>
Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io>
Signed-off-by: Silicon Signals <siliconsignalsforgit@gmail.com>
2025-06-11 16:17:08 -07:00
Julien Panis
2d98ac0f0b dts: arm: ti: cc23x0: Add DMA mode support to AES module
Add support to use DMA mode with cc23x0 AES module. This consists in
specifying the DMA channels and peripherals.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-11 16:06:55 -07:00
Julien Panis
e0f02d93a6 drivers: crypto: cc23x0: Add support for DMA mode
Two DMA channels are assigned to AES channels A and B respectively.
Each channel A/B has an interface to control the conditions that will
generate requests on the related DMA channel: trigger condition,
R/W address, and DMA done action.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-11 16:06:55 -07:00
Johann Fischer
79a80730b2 usb: device_next: allow to use label as interface string descriptor
The intention was to use the "interface-name" string property in the
interface string descriptor, but using the label property is acceptable
again. Therefore, allow the use of the DT label property string in the
interface string descriptor.

Follow exactly the same approach as in the CDC ACM implementation
introduced in the commit b0791400f6
("usb: device_next: cdc_acm: allow setting the interface description").

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-06-11 08:18:30 +02:00
Yangbo Lu
030d5bd735 dts: arm: nxp: add i.MX943 M33 dtsi file
Added i.MX943 M33 dtsi file for basic support.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-06-10 22:07:17 +02:00
Shreyas Shankar
73e6ca23eb ti: j722s: Fix reg length in pinctrl as per TRM description
In j722s_main.dtsi, the pinctrl block must have reg length 0x2b0
As per TRM, PADCONFIG registers range from 0 to 171.
Thus, length = (171-0+1)*4 = 172*4 = 0x2b0.

Reference: https://www.ti.com/lit/ds/symlink/tda4ven-q1.pdf
Table 5.1 contains data on PADCONFIG registers.

Signed-off-by: Shreyas Shankar <s-shankar@ti.com>
2025-06-10 22:06:50 +02:00
Saravanan Sekar
3fe1eda7fb dts: arm: ti: mspm0: Add a support for TI MSPM0 Timer Counter
Add a support for TI MSPM0 Timer which has sub module for Counter,
Timer Capture and Timer Compare.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-06-10 10:25:10 -04:00
Saravanan Sekar
7a3f79ef86 drivers: counter: Add a support for TI MSPM0 Timer counter
TI MSPM0 SoC series has General Purpose Timer and Advanced control timers
with Counting module, Capture block (measure input signal period/time) and
Compare block (to generate time expiry, output waveform like PWM).

Add a support for counter driver with alarm and counter top functions.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-06-10 10:25:10 -04:00
Krzysztof Chruściński
28cfb3fecd dts: pwm: nordic: Add idleout-supported property
Add property which indicates that PWM instance supports IDLEOUT
feature. Add property to all instances that supports it.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-06-10 10:24:16 -04:00
Romain Jayles
778b2dfc40 dts: stm32wba: split temperature calibration address between socs
The temperature calibration addresses of ts-cal1-addr and ts-cal2-addr
are not shared between stm32wba5 and stm32wba6 these addresses are now
separated to the dedicated device-tree

Signed-off-by: Romain Jayles <romain.jayles@st.com>
2025-06-10 13:29:47 +02:00
Jérôme Pouiller
033ffd1a2c boards: silabs: siwx91x: Fix test for memory controller
tests/drivers/memc/ram requires the board contains a node labeled
"memc"/.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-06-10 13:28:48 +02:00
Julien Panis
a92339b8cd dts: arm: ti: cc23x0: Add DMA mode support to UART module
Add support to use DMA mode with cc23x0 UART module. This consists in
specifying the DMA channels and peripherals.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:08:22 +02:00
Julien Panis
fa199b6f6c drivers: serial: cc23x0: Add support for DMA mode
Two DMA channels are assigned to TX and RX respectively:
- A TX DMA request is asserted when there is space in the FIFO.
- A RX DMA request is asserted when data is in the FIFO.

When DMA is enabled for a peripheral, the DMA transfer completion is
signaled on the peripheral's interrupt only (here UART's interrupt).
It is not signaled on the DMA dedicated interrupt.

Also, when DMA is enabled for a peripheral, the DMA controller stops
the normal transfer interrupts for this peripheral from reaching the
NVIC (the interrupts are still reported in the interrupt registers of
the peripheral). Thus, when a large amount of data is transferred using
DMA, instead of receiving multiple interrupts from the peripheral as
data flows, the NVIC receives only one interrupt when the transfer
completes (unmasked peripheral error interrupts continue to be sent
to the NVIC).

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:08:22 +02:00
Julien Panis
b3a32a95d1 dts: arm: ti: cc23x0: Add DMA mode support to ADC module
Add support to use DMA mode with cc23x0 ADC module. This consists in
specifying the DMA channel and peripheral.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:07:54 +02:00
Julien Panis
45a8a0f0c6 drivers: adc: cc23x0: Add support for DMA mode
The ADC has a dedicated interface for communicating with the DMA.
The ADC module provides four interrupt sources (one for each
conversion result storage register) which can be configured to
source the DMA trigger.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-06-10 12:07:54 +02:00
Sai Santhosh Malae
34982b1465 drivers: adc: siwx91x: DTS changes for siwx91x ADC driver
1. Create a YAML file for ADC node
2. Add ADC node in the siwx917.dtsi

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-06-10 12:07:33 +02:00
Adam Mitchell
dcf94aaf7b dts: arm: st: h7: Add support for STM32H742
Adds base Devicetree files for H742Xi/g variants

Signed-off-by: Adam Mitchell <adam.mitchell@brillpower.com>
2025-06-10 08:51:45 +02:00
Furkan Akkiz
e5fb161de4 dts: arm: adi: Add MAX32657 DMA instances and binding file
Add DMA0 and DMA1 nodes to MAX32657 dtsi file and add binding file
for DMA slots.

Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
2025-06-10 08:47:42 +02:00
Raffael Rostagno
0dd3274a92 dts: esp32c2: esp8684: Add GDMA support
Add GDMA peripheral to device tree.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-06-09 14:35:51 -07:00
Sudan Landge
5a3c4941a2 pinctrl: add support for mps4
Add MPS4 pinctrl support by referring to
`mps4/common/partition/platform_base_address.h`
from TF-M's main branch.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-06-09 14:35:12 -07:00
Harris Tomy
ab6c6b44f3 dts: stm32u5: Removes trailing 'U's in dt props
Integers in devicetree are always signed.
See https://github.com/zephyrproject-rtos/zephyr/pull/89978#discussion_r2124113613

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-06-09 14:26:11 -07:00
Harris Tomy
d280d89214 dts/kconfig: stm32u5: add f9 and clean up dts node locations
Adds skeleton dtsi for u5f9 for u5g9 to inherit from

Moves the peripheral nodes into dtsi's that actually has the peripheral
and includes them for SoC's higher in the series where applicable.

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-06-09 14:26:11 -07:00
Harris Tomy
97876b5d1e dts: stm32u5: add memory package variants
Corrects stm32u53/45xx variants and adds u575Xg and u599Xi

Signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-06-09 14:26:11 -07:00
Jordan Yates
25249a010a dts: st: stm32l4p5: re-add SDMMC idma property
The `idma` property added in 94847be1 was removed in the re-organisation
in 306dea6f. Re-add the property at a more generic location.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-06-09 10:27:03 +01:00
Phuc Pham
14ab7d8494 drivers: gpio: Add support for RZ/G2UL
Add GPIO support for RZ/G2UL

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-06-09 10:26:45 +01:00
Phuc Pham
da26dbd08a drivers: pinctrl: Add support for Renesas RZ/G2UL
Add pinctrl support for Renesas RZ/G2UL

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-06-09 10:26:45 +01:00
Phuc Pham
872d5cfc14 dts: arm: renesas: Add support for Renesas RZ/G2UL
Add devicetree to support for Renesas RZ/G2UL

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-06-09 10:26:45 +01:00
Duy Nguyen
e7c025db24 drivers: spi: Initial support SPI driver on Renesas RX130
Initial commit for SPI driver support on RSK_RX130@512KB board
with RSPI module

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Minh Tang <minh.tang.ue@bp.renesas.com>
2025-06-09 08:55:05 +02:00
TOKITA Hiroshi
3f7e8f498e drivers: virtio: add VIRTIO MMIO transport driver
Add virtio-mmio driver

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-06-07 15:39:06 +01:00
TOKITA Hiroshi
3720c9b805 drivers: entropy: virtio: Unify the notation to VIRTIO
Since `VirtIO` is not the official notation,
unify the name to `VIRTIO`.
In the text, `Virtio` and `virtio` can also be used
depending on the context.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-06-07 15:39:06 +01:00
Lin Yu-Cheng
b2e13bd6c3 driver: crypto: add crypto driver for rts5912
Add crypto driver for Realtek rts5912

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-06-07 13:29:07 +01:00
Ivan Wagner
b9cd08b2ea drivers: sensor: lsm6dso: add support for tilt and tap triggers
Tilt or Tap can be selected via config and further tap parameters can be
configured via DT.

Signed-off-by: Ivan Wagner <ivan.wagner@tecinvent.ch>
2025-06-06 20:11:46 +01:00
Armando Visconti
a10f807994 drivers/lis2dux12: add read_and_decode APIs support
Add RTIO async and RTIO stream functionalities that enables,
among all the other things, the sensor data streaming from FIFO.

RTIO stream supports following triggers:

  - SENSOR_TRIG_FIFO_WATERMARK
  - SENSOR_TRIG_FIFO_FULL
  - SENSOR_TRIG_DATA_READY

Following FIFO parameters has to be defined in device tree to
correctly stream sensor data:

  - fifo-watermark
  - accel-fifo-batch-rate

Currently the driver can decode FIFO content with Accelerometer
16-bit samples.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2025-06-06 09:11:04 -07:00
Ayush Singh
5aefdf3e60 dts: arm64: ti: ti_am62x_a53: Add MAIN_GPIO*
Currently only 32 lines are enabled in both, since the GPIO subsystem
does not support > 32 lines.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-06-06 14:49:07 +01:00
Qiang Zhao
e5513ab18b dts: arm: nxp_imx95_m7: add ptp_clock node
Added ptp_clock node on imx95 core m7

Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
2025-06-06 14:47:53 +01:00
Qiang Zhao
59ae9c19de dts: bindings: Add NXP NETC PTP binding
Add binding for NXP NETC PTP Clock device

Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
2025-06-06 14:47:53 +01:00
Adam Mitchell
f70485f088 dts: arm: st: h7: Correct dma-request value for H743 DMAMUX2
Reduces value of dma-requests to 12 as specified in RM0433

Signed-off-by: Adam Mitchell <adam.mitchell@brillpower.com>
2025-06-06 12:03:37 +02:00
Alvis Sun
bf0fd155ae drivers: serial: npcx: add serial driver support for npck3
This commit adds serial driver support for npck3.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-06-06 12:03:25 +02:00
Andreas Schuster
81049c5b75 dts: arm: stm32g0: add mcos node
The newly added mcos node contains two childreen `mco1` and `mco2` that can
be used to output different clocks on the MCO pins of the stm32g0
microcontrollers.

Signed-off-by: Andreas Schuster <andreas.schuster@schuam.de>
2025-06-06 11:52:40 +02:00
Andreas Schuster
41c6257046 include: dt-bindings: stm32g0_clock: add mco macros
Adds macros to be able to use the microcontroller clock output (MCO) on the
STM32G0 microcontroller.

Signed-off-by: Andreas Schuster <andreas.schuster@schuam.de>
2025-06-06 11:52:40 +02:00
Dave Joseph
963fda5e4a drivers: mbox: TI Secure Proxy mbox drivers
Added secure proxy mailbox driver for supported devices using
the binding ti,secure-proxy. This is used to communicate with
a device manager running on a separate core via a secure proxy
mailbox for TI K3 devices. Required for enabling TISCI layer
communication.
Refer: https://software-dl.ti.com/tisci/esd/latest/1_intro/TISCI.html

Tested on MAIN_CORTEX_R5_0 on AM243x EVM.
Refer:https://www.ti.com/lit/pdf/spruim2

Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Dave Joseph <d-joseph@ti.com>
2025-06-06 11:52:07 +02:00
Alain Volmat
314953b19b dts: arm: st: mp13: add dcmipp node in stm32mp135.dtsi
Add node describing the DCMIPP available on stm32mp135.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-06 10:10:58 +02:00