Commit graph

8801 commits

Author SHA1 Message Date
Michael Hennerich
21fd91e11e drivers: sensors: adt7420: Add driver for ADT7420 Temperature Sensor
This patch adds support for the Analog Devices ADT7420 High-Accuracy
16-bit Digital I2C Temperature Sensors. Optionally sensor threshold
events are supported.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2018-07-12 13:03:24 -05:00
Aurelien Jarno
9107e3dac8 drivers: usb: add support for USB OTG FS on STM32F7
The STM32F7 uses the same USB OTG FS controller than the STM32F4 series.
It is therefore trivial to add support for it, by adding the DT fixup
and pinmux macros, and the DT entries in stm32f7.dtsi. Keep it disabled,
it should be enabled at the board level.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-07-11 16:28:10 -05:00
Sean Nyekjaer
781a2f0275 arch: add support SAMD20 used in the SAMD20 Xplained Pro Board
This add basic support the SAMD20 inkl. SPI and UART

Signed-off-by: Sean Nyekjaer <sean@nyekjaer.dk>
2018-07-10 12:56:44 -05:00
Sean Nyekjaer
5a1bcc756c dts: arm: sam0: move contents samd21 to samd
samd21.dtsi includes now the same content need for SAMD20,
move it to samd.dtsi and include it from samd21.dtsi.
Then later USB support can be added to the samd21.dtsi seperatly
from the samd20 etc.

Signed-off-by: Sean Nyekjaer <sean@nyekjaer.dk>
2018-07-10 12:56:44 -05:00
Christian Taedcke
899bdb1371 boards: arm: Add support for Silabs EFR32 SLWSTK6061A board
The EFR32 Flex Gecko Wireless Starter Kit contains sensors and
peripherals demonstarting the usage of the EFR32FG1P SoC
family. This patch add basic support for this board.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-07-10 12:53:50 -05:00
Kumar Gala
f0450fc423 nrf52: dts: Force user to explicitly set UART0 compatible
Since the UART0 @ 0x40002000 can either be UART or UARTE the user of the
soc.dtsi needs to select either compatible = "nordic,nrf-uarte" or
"nordic,nrf-uart"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-10 08:54:30 -05:00
Diego Sueiro
970c4f9cf3 arch: Add imx7d_m4 i2c definitions
Adds all necessary i2c definitions and configurations for imx7d_m4 soc.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-07-06 15:55:57 -05:00
Yong Jin
8776835bd6 arch: arm: stm32: add basic support for STM32F769 SoC
The STM32F769 has more interrupts and features than the STM32F746,
but the basic support is similar with STM32F746

Signed-off-by: Yong Jin <jinyong.iot@foxmail.com>
2018-07-06 09:56:25 -05:00
Yannis Damigos
1af5ce40cd dts/arm/st: Fix SPI1 clock property on F0 series
SPI1 is on APB2 on F0 series.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-07-06 09:46:57 -05:00
Yannis Damigos
ebc5e51ef6 dts/arm/st: Fix I2C3 clock property on L0 series
Set the correct bit to enable I2C3 clock on L0
series.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-07-06 09:46:57 -05:00
Yannis Damigos
ce983e77c8 dts/arm/st: Fix I2C1 clock property
Set the correct bit to enable I2C1 clock.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-07-06 09:46:57 -05:00
Kumar Gala
db1075e4e5 dts: Fix warning related to arm,v{6,7,8}m-nvic yaml files
The nvic yaml files were missing an id property.  So we'd get a warning
like:

extract_dts_includes.py: 'id' property missing in 'ARMv7-M NVIC Interrupt Controller' binding. Using '<unknown id>

Add the id to fix this warning.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-05 15:24:31 -05:00
qianfan Zhao
7e2f6ebc7b stm32f2: add stm32f207xe soc
Used and tested(blinky, hello_world) on out of tree custom board.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
bdeece01b8 driver: uart_stm32: add support for stm32f2 series
clear RXNE flag in fifo_read, remove TEACK and REACK
check when uart_stm32_init because stm32f2 doesn't
has those flags.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
dffac9ab74 driver: interrupt_controller: Add support for stm32f2
Add kconfig and c code for stm32f2 interrupt controller driver

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
6fb7b04461 drivers: stm32-gpio: Provide GPIO driver for stm32f2
Add necessary GPIO defines for the stm32f2 series soc

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
6091a7fd50 drivers: clock_control: Add support for stm32f2
Add clock control support for the stm32f2

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
85d2633af2 stm32f2: add stm32f207xg soc
Add stm32f207xg soc to make nucleo-f207zg work.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
qianfan Zhao
6511c4122d arm: stm32f2: Add support for stm32f2 series
Add necessary kconfig and DTS files for stm32f2 series

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-07-05 11:26:07 -05:00
Daniel Egger
dbf11bef81 dts: stm32f7-pinctrl Add definitions for F7 USART/UARTs
Added possible pin combinations for all U(S)ARTs peripherals for the
STM32F7 series MCUs.

Signed-off-by: Daniel Egger <daniel@eggers-club.de>
2018-07-05 11:24:33 -05:00
Erwan Gouriou
d5100d792f dts/st: add clock property to i2c nodes
Add clocks to stm32 i2c nodes.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-07-05 11:16:38 -05:00
Erwan Gouriou
9b046ec08a dts/stm32: add clock property to spi nodes
For test purpose, add clocks property to (some) spi nodes

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-07-05 11:16:38 -05:00
Aurelien Jarno
6ee562b754 arch: arm: stm32: add basic support for STM32F723 SoC
The STM32F723 has more interrupts than the STM32F746 due to the
additional SDMMC controller. Besides that the changes are very
similar to the ones of the STM32F746.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-07-03 13:53:36 -05:00
Sebastien Bourdelin
ac1a9c4ef2 drivers: led: Add LED driver support for NXP PCA9633
Add support for NXP PCA9633 an I2C 4-bit LED driver.
Supported blinkink period: 41ms to 10667ms
Supported brightness value: 0 to 100%

This driver supports the following APIs:

1. led_blink
2. led_set_brightness
3. led_on
4. led_off

Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
2018-07-02 10:25:47 -05:00
Daniel Egger
c32681f78d dts: arm: st: Correct pin assignment of node usart6@0
USART6 is ALT8, not ALT7

Signed-off-by: Daniel Egger <daniel@eggers-club.de>
2018-07-02 09:48:20 -05:00
Yurii Hamann
58643f3d86 arm: stm32: STM32F7 family device tree
This patch includes:
STM32F7 family device tree file with basic and UART definitions.
STM32F746 subfamily device tree file.
Memory definitions for STM32F746xG subfamily.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yannis Damigos
3d53ddd435 dts/arm/st: Fix OTG_FS endpoint number for STM32F4 SoCs
STM32F412/413/446/469 SoCs have 6 bidirectional endpoints
according to the reference manuals RM0402, RM0430,
RM0390 and RM0386.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-06-26 11:17:25 -05:00
Ioannis Glaropoulos
2b7c854a65 boards: arm: nrf: move LED and Button definitions in DTS
This commit moves the definitions for the LED and Buttons
supported in nrf52810_pca10040 DK in DTS from board.h. Aliases
are kept in board.h to make basic examples pass.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-06-25 19:34:33 +02:00
Carles Cufi
0f6bd5c891 arch: arm: nrf: Add support for the nRF52810
The nRF52810 is a low-cost variant of the nRF52832, with a reduced set
of peripherals and memory. This commit adds basic support for it in the
arch SoC and dts folders.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Ioannis Glaropoulos <ioannis.glaropoulos@nordicsemi.no>
2018-06-25 19:34:33 +02:00
Ulf Magnusson
b63a5928bc dts: kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-22 15:11:21 -04:00
Erwan Gouriou
37028baf38 dts/bindings: Remove redundant clock properties in st,stm32-i2c...
Clock property is is provided in i2c.yaml binding,
remove it from st,stm32-i2c-vX.yaml

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-06-22 12:30:33 -04:00
Bartosz Sokolski
06f4daf847 dts: add parentheses around argument in macro __SIZE_K
to allow expressions

Signed-off-by: Bartosz Sokolski <bartosz.sokolski@nordicsemi.no>
2018-06-20 12:14:58 -04:00
Mieszko Mierunski
dc1c2742b6 boards: nrf: Moved SDA and SCL pin configuration to DTS for nRF boards
SDA and SCL pins can now be configured through DTS.
Pins on development kits have been assigned according to arduino
headers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-06-20 13:38:18 +02:00
Stanislav Poboril
631eedd334 arch: Add imx6sx m4 soc support
The i.MX 6SoloX SoC is a hybrid multi-core processor composed by one
Cortex A9 core and one Cortex M4 core.

Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A9 core (running Linux) via RPMsg.

The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README

The A9 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A9 can perform these steps at bootloader level after the Linux
system has booted.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-06-19 17:08:51 -05:00
Aurelien Jarno
7688f49065 drivers: usb_dc_stm32: change all endpoints to bidirectional
The various STM32 reference manuals sometimes define the USB endpoints
as IN or OUT only and sometimes as bidirectional, even in the same
manual. This is likely because the OTG implementation has one set of
registers for the IN endpoints and one other set for OUT endpoints.
However at the end a given endpoint address can both transmit and
receive data.

This causes some confusion how to declare the endpoints in the device
tree, and depending on the SoC, they are either the same number of IN
and OUT endpoints declared, or they are declared as bidirectional. At
the end it doesn't really matter given how the driver uses those values:

    #define NUM_IN_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                       CONFIG_USB_NUM_IN_ENDPOINTS)

    #define NUM_OUT_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                        CONFIG_USB_NUM_OUT_ENDPOINTS)

    #define NUM_BIDIR_EP NUM_OUT_EP

This patch therefore cleanup the driver, the DTS, and the DTS fixups to
only define the number of bidirectional endpoints.

In addition to the cleanup, that fixes a regression introduced by commit
52eacf16a2 ("driver: usb: add check for endpoint capabilities"), which
introduced a wrong check for SoC only defining the number of
bidirectional endpoints.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-06-18 15:24:15 -04:00
Alexander Wachter
c601f3be67 can: Add can support for STM32L432
This commit enables CAN on the STM32L432.
Tested on nucleo l432ck with external transceiver and loopback mode.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-18 15:23:29 -04:00
Alexander Wachter
ebc31f6235 drivers: can: Prepare STM32 driver for other series than STM32F0
This commit splits the common interrupt into rx and tx parts because
only STM32F0 series has a common interrupt.
Moved clock source definition to device-tree.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-18 15:23:29 -04:00
Alex Tereschenko
0824ec6409 dt: nrf52840: remove 0x from USBD address
The prepended 0x causes DTC warnings and shouldn't be there.

Tested by compiling hello_world for nrf52840_pca10056 before and after.

Fixes #8334.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
2018-06-16 18:00:56 +02:00
Marc Reilly
6c60abb03b drivers: gpio: add dts support for nrf52 gpio
This adds basic support for declaring gpio nodes in dts for nrf52.
The dts.fixup provides mapping for the generated defines to the config
defines currently used by the nrf gpio driver.

Existing boards that use nrf52 are updated.

Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
2018-06-14 15:56:39 +02:00
Savinay Dharmappa
b7c4c0302c dts: riscv32: riscv32-qemu: Add device tree support
add device tree support for riscv32-qemu

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-06-13 08:47:52 -04:00
Johann Fischer
2055b84f79 boards: frdm_kl25z: add USB support
Add USB support to FRDM_KL25Z board.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-06-12 04:09:50 -04:00
Florian Vaussard
c7d2dc2363 dts: stm32l4: Add PWM nodes
Add available PWM nodes to the existing STM32L4 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard
7a60a2c49b dts: stm32f4: Add PWM nodes
Add available PWM nodes to the existing STM32F4 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard
bfa1941e1d dts: stm32f3: Add PWM nodes
Add available PWM nodes to the existing STM32F3 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard
da0caab3fd dts: stm32f1: Add PWM nodes
Add available PWM nodes to the existing STM32F1 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard
0e8d97f186 dts: stm32f0: Add PWM nodes
Add available PWM nodes to the existing STM32F0 device trees.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Florian Vaussard
71e66f06b4 dts: stm32: Add Timer and PWM binding
Add new device tree bindings for STM32 Timer and PWM IPs.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-06-12 03:54:26 -04:00
Rajavardhan Gundi
e5b0e9ac07 DTS: interrupt controller: Define IRQ priorities for CAVS & DW ICTL
IRQ priorities for CAVS and DW were previously defined in Kconfig.
They are now defined via DTS and removed from Kconfig.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-06-11 17:27:58 -04:00
Alexander Wachter
b97dd472fb drivers: can: Move bit timing and clock to device tree
This commit moves the bit timing (PROP, BS1, BS2 segments and SWJ)
from Kconfig to the device-tree and fixes issue #7933

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-01 12:59:42 -05:00
Ramakrishna Pallala
05063ede55 dts: arc: Fix IRQ priorities for quark_se_c1000_ss
ARC only supports only 2 priority levels so make sure
the IRQ priority is not greather than 1.

The test was passing in previous build because the ASSERT was
not enabled.

Fixes Issue #8099

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-06-01 07:40:30 -04:00