Convert over arc based boards to use device tree instead of board.h to
describe buttons & LEDs. There are a few boards that the button gpio
flags need validation.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will be usefull to tell when Ethernet device has its attributes
filled in by DTS rather than by Kconfig.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add maximum-speed property to usb nodes and set it to
their maximum on-chip PHY capability.
SoCs with USB device controllers only support full
speed, so we don't add maximum-speed to these nodes.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add maximum-speed property to usb node.
It configures USB controllers to work up to a specific speed.
Valid arguments are "super-speed", "high-speed", "full-speed"
and "low-speed".
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Convert over x86 based boards to use device tree instead of board.h to
describe buttons & LEDs. There are a few boards that the button gpio
flags need validation.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin
generation based on device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The gpio controllers on SAM4S, SAME70, and SAMD were missing properties
related to GPIO pin generation. Add the missing details into the yaml
and dts files to allow boards to specific gpio pins.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the needed bits to get device tree support for the GPIO controller
on the Zedboard-Pulpino. This will allow us to move LED & button info
into the board.dts.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add simple device tree support for the Pulpino SoC and Zedboard-Pulpino
board port. This gets the UART info from device tree instead of soc.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
added sam4s16b, sam4s8c, sam4s8b, sam4s4c, sam4s4b,
sam4s4a, sam4s2c, sam4s2b and sam4s2a.
Used the same order as in the data sheet and code structure
equal to same70. Updated the sam4s_xplained board to match
the altered .dtsi location of the specific SoC.
Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
This patch adds timers and PWM nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_PINS and
HAS_DTS_SPI.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Every board that uses dts-enabled gpio drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_GPIO_DEVICE and
HAS_DTS_GPIO.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_DEVICE and
HAS_DTS_SPI.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Now that we've cleaned up all the STM32 related .dtsi files we don't
use dts/arm/st/mem.h so we can remove it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F7 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F4 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F3 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F2 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Makes the designware spi driver consistent with other spi drivers by
selecting HAS_DTS_SPI in the driver. This required adding spi nodes and
dts fixups to several arc and x86 socs, as well as enabling those nodes
in associated boards.
Also refactors the driver to use the base address, interrupt number, and
interrupt priority from dts.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the L4 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the L0 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F1 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F0 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adding i2c slave requires overlay with node definitions and
proper aliases depending on driver implementation.
Modified i2c_slave_api test to use information from dts.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Added basic PSoC6 UART driver and added two UART nodes in the PSoC6
device tree to have output from CM0+ and CM4 cores.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Added initial support and created the corresponding device tree part for
building PSoC6 SoC as part of Zephyr.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Commit introduces support for ARM TrustZone CryptoCell 310
for Nordic Semiconductor nRF SoCs in device tree.
Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
Enable UART 16550 driver for Nios-II QEMU platform.
Note: This PR is tested with patched version Qemu 3.0.0 which
adds support for altera_10m50_zephyr machine type.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
'use-prop-name' is not documented.
Update dts/bindings/device_node.yaml.template to fix this.
Document that 'type' attribute is not used.
Fixes#9971
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Flash controller-node for stm32f2 based SoCs was missing basic
properties such as compatible, labeln reg and interrupts.
Fix this and add matching yaml binding file;
Fixes#10057
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When we fixed the missing reg property in the cpu node, we forgot to
add #address-cells & #size-cells for the node.
This fix the following warnings we get:
Warning (reg_format): "reg" property in /cpus/cpu@0 has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This change aims at fixing 'unit_address_vs_reg' warning in
stm32 *-pinctrl.dtsi files.
This warning pops up when a node name is made up with an address
(node_name@xx) but does not contain a reg property.
This case was encountered for led nodes for instance,
where a reg property has no meaning.
Fix this by changing node_name@xx to node_name_xx which removes the
guilty '@xx' syntax but preserves node_name uniqueness.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /soc/virtualcom@0:
node has a unit name, but no reg property
Fix by dropping the unit address from the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /flash: node has a reg or ranges
property, but no unit name
or
Warning (unit_address_vs_reg): /memory: node has a reg or ranges
property, but no unit name
Fix by adding unit address that is missing to flash & memory nodes.
Additionally the Silabs memory nodes didn't have a compatiable or
device_type, so add those properties as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/cpu@0: node has a
unit name, but no reg property
Fix by adding reg property to missing cpu nodes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/arcv2-intc@0:
node has a unit name, but no reg property
Fix by removing the unit address from the nodes. Some cases we had a
reg property and a unit address for such interrupt controllers, in those
cases remove both the reg & unit address in the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_format): /soc/uart@000003f8:
unit name should not have leading 0s
Fix these by remove the leading 0s.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_NRF51822_QFAA
CONFIG_SOC_NRF51822_QFAB
CONFIG_SOC_NRF51822_QFAC
CONFIG_SOC_NRF52810_QFAA
CONFIG_SOC_NRF52832_QFAA
CONFIG_SOC_NRF52832_CIAA
CONFIG_SOC_NRF52832_QFAB
CONFIG_SOC_NRF52840_QIAA
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
