Commit graph zephyr/dts
Author SHA1 Message Date
Damian Nikodem
2455436337 driver: ssp: update Intel SSP DAI driver to support dynamic SSP management
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the management
of the DAI part from the management part of the SSP IP.

Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
  approach.
- Update device tree bindings and instances to reflect the new SSP IP
  management mechanism.

Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
2024-04-25 12:14:50 +02:00
Jeff Daly
7e0a334060 drivers: sensor: ntc_thermistor: Add Murata NCP15XH103
Murata NCP15XH103 compensation table added.

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2024-04-24 15:56:23 -04:00
Daniel Schultz
5dbfbbcca2 dts: arm: ti: am62x_m4: Remove address-cells from gpio
An address-cells definition is not required for the gpio
node and therefore should be removed.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-04-24 15:56:01 -04:00
Daniel Schultz
d30cbe999a dts: arm: ti: Add dtsi for AM64x M4
This file is basically a copy of the AM62x M4 dtsi but an
additional mcu_uart1 interface.

The internal clock frequency feeded into the UART IP is
96 MHz instead of 48 MHz, which is different to the AM62x.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-04-24 15:56:01 -04:00
Daniel Schultz
59de472dab dts: arm: ti: am62x_m4: Use DT_FREQ_x fpr frequenies
We define two frequencies in the am62x_m4.dtsi file.

Use DT_FREQ_M for both frequency to make them more
human-readable and easier to understand.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-04-24 15:56:01 -04:00
Dominik Ermel
a14c69a52a dts/bindings/flash_simulator: Restrict erase-value
The commit restricts erase-value to either 0xff or 0x00.
On program-erase type devices writes can only change from
erase value of bit to opposite, ease usually consists of two
operations which is programming the opposite value to every bit
of erase range and then turning back all bits to the "erase-value";
above makes it impossible to have erase value of device to be other
than 0xff or 0x00.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2024-04-24 19:42:44 +00:00
Erwan Gouriou
a6f94f65a0 dts: stm32h5: Add SDMMC nodes
Add sdmmc1 and sdmmc2 nodes descriptions for STM32H5 SoCs.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-04-24 19:41:09 +00:00
Alvis Sun
c6763bd2ca drivers: i3c: npcx: introduce NPCX I3C driver
This implements basic driver to utilize the I3C IP block
on NPCX.

1. I3C mode: Main controller mode only.
2. Transfer: Support SDR only.
3. IBI: Support Hot-Join, IBI(MDB).
   Controller request is not supported.
4. Support 3 I3C modules:
   I3C1(3.3V), I3C2(1.8V, espi mode), (I3C3 1.8V or 3.3V)

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2024-04-24 19:40:28 +00:00
Alvis Sun
18f6a541f2 dts: arm: nuvoton: add I3C device nodes
Add I3C device nodes.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2024-04-24 19:40:28 +00:00
Ruibin Chang
1d74cb74d9 drivers/crypto/crypto_it8xxx2_sha_v2.c: implement sha v2 for it82xx2 series
Implement a new version crypto_it8xxx2_sha_v2 driver for it82xx2 series.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2024-04-24 09:55:46 +02:00
Ruibin Chang
a3f0ae9b0f dts/riscv/ite/dtsi: separate sha0 node
Chip it82xx2 series change the HW sha module and it82xx2 series
can't use original sha driver anymore, so move sha0 node from
it8xxx2 to it81xx2 series.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2024-04-24 09:55:46 +02:00
Fabio Baltieri
4a5fa01694 input: add a paw32xx driver
Add a driver for PAW32xx sensors.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-04-23 22:13:51 +00:00
Emilio Benavente
13735ff789 dts: arm: nxp: nxp_mcxn94x: updated dts for CTimer
Updated dts for MCXN94x with support for CTimer.

Signed-off-by: William Tang <william.tang@nxp.com>
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-04-23 21:25:38 +00:00
Laurentiu Mihalcea
799a456c25 nxp: imx8ulp: add audio-related nodes
Add DTS nodes for the IPs used in audio processing.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-23 15:36:01 +02:00
Nazar Palamar
62e6fbb9d8 board: cy8cproto_062_4343w: Enable HW Flow control for HCI H4
HW Flow control must be enabled for HCI H4 UART communication.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2024-04-23 15:35:53 +02:00
Marcin Szymczyk
2d52882647 dts: riscv: nordic: enable CLIC nodes
Interrupt controller driver requires those nodes to be enabled.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2024-04-23 15:35:12 +02:00
Najumon B.A
93421cefa8 board: x86: add acpi hid for gpio
add acpi hardware id for gpio driver

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2024-04-22 06:50:38 -07:00
Najumon B.A
4a973db3d4 drivers: gpio: gpio_intel: add acpi base resource enumeration
add gpio_intel driver with acpi based resource enumeration support.
Also updated test cases overlay with new dts entires.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2024-04-22 06:50:38 -07:00
Jan Kubiznak
030a8b1830 drivers: dac: dac_ad569x: Support for AD569x DACs.
Added support for Analog Devices AD5691 / AD5692 / AD5693 DACs.

Signed-off-by: Jan Kubiznak <jan.kubiznak@deveritec.com>
2024-04-22 06:50:01 -07:00
Wei-Tai Lee
e22e2263b4 dts: bindings: add andestech,l2c
To descibe the AndesTech L2 cache. Besides, remove
redundant property in dtsi.

Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2024-04-22 09:19:27 -04:00
Kai Vehmanen
45205f865e dts: xtensa: intel_adsp_ace20: correct SSP definition
The ace20 description has incorrect number of SSP instances
described. Correct number should be 3.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-04-21 03:28:17 -07:00
Kai Vehmanen
aecf19c3c1 dts: xtensa: intel_adsp_ace15: correct SSP definition
The ace15 description has incorrect number of SSP instances
described. Correct number should be 3.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-04-21 03:28:17 -07:00
Kai Vehmanen
bc63835ba2 dts: xtensa: intel_adsp_cavs25_tgph: correct SSP definition
The tgph description has incorrect number of SSP instances
described. Correct number should be 3.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-04-21 03:28:17 -07:00
Daniel DeGrasse
e396923198 dts: bindings: mipi-dbi: fix language describing mipi dbi modes
Update language describing mipi dbi modes to be more clear, removing a
run-on sentence

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-20 13:44:07 -04:00
Manuel Argüelles
5d2670ac1f drivers: pwm: mcux_ftm: allow to select clock source
FTM internal counter can be clocked by one of three clock sources
independent of the module bus clock. This patch introduces a DT property
to perform the clock selection from DT.

DT sources are updated to keep the current clock selection for all boards,
with exception of ucans32k1sic board which is migrated to use system
clock by default, as this seems to be a better choice for most cases.
Some PWM LED samples require slower clock so overlays are added for
those cases.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-04-19 10:08:53 +02:00
Manuel Argüelles
445110b306 dts: arm: nxp: s32k1xx: fix RTC clock source
Set RTC clock source to the internal 32 KHz LPO. Currently RTC clock is
used to source RTC counter and FTM counter.

Fixes #71289

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-04-19 10:08:53 +02:00
Steve Boylan
5b72665c47 drivers: spi: Add support for half-duplex (3-wire) SPI
Add support for half-duplex (3-wire) SPI operation using the Raspberry
Pi Pico PIO.  To allow control of the size of the driver, including
half-duplex support is optional, under the control of Kconfig options.

The original PIO source code is also included as a reference.

Corrected 3-wire tx/rx counts.

Enable half-duplex code based on DTS configuration

Replace runtime checks with static BUILD_ASSERT()

Remove too-fussy Kconfig options

Removed PIO source per review request

Signed-off-by: Steve Boylan <stephen.boylan@beechwoods.com>
2024-04-18 08:09:15 -07:00
Franciszek Zdobylak
f0f897da4a dts: sifive: Update SoC compats
Update compatible strings to make them consistent across SiFive SoCs.

Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
2024-04-18 14:56:00 +02:00
Declan Snyder
537d5c310c dts: nxp: Convert ENET DT default to new binding.
Convert all of the NXP SOCs with ENET to use the new
binding scheme, which is used by the new driver.

Convert any boards using this SOC to the new scheme as well,
and remove from the documentation the bit about the experimental
nature of the new driver and the overlay that shall no longer exist.

Some of the boards I do not have the hardware of, so apologies
if something breaks, as I have no way to know. All the boards
were made sure to at least build.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-18 11:18:31 +02:00
Declan Snyder
ac58f3abe6 drivers: nxp_enet: Generate MAC using eth.h
The MAC address macros are ridiculous in this driver.
Rewrite to be simpler and use eth.h common function.
Also, clarify the mac address generation on the DT overlays.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-18 11:18:31 +02:00
Zhaoxiang Jin
a30695b711 dts: nxp: Add LPADC clocks properities to SoC dtsi
Add LPADC clock properties to SoC dtsi on adc/lpadc node

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2024-04-18 11:16:45 +02:00
Eran Gal
e58dfac374 drivers: dac: Add TI DACx0501 driver
Adds a DAC driver for Texas Instruments DACx0501 family of devices

Signed-off-by: Eran Gal <erang@google.com>
Co-authored-by: Martin Jäger <17674105+martinjaeger@users.noreply.github.com>
2024-04-17 14:37:21 +02:00
Grzegorz Swiderski
163cacbe4b dts: nordic: nrf54h20: Add SysCtrl VEVIF node
Add a VEVIF node to be used for communicating with SysCtrl (cpusys).
This is the only part of the SysCtrl VPR exposed to local domains.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-04-17 14:36:12 +02:00
Daniel DeGrasse
7477636f0f drivers: mipi_dbi: allow MIPI mode to be set via devicetree
Enable MIPI mode to be set via devicetree, for displays that support
multiple MIPI DBI modes. This commit also adds new helpers for displays
that allow drivers to initialize the entire MIPI DBI configuration
structure from devicetree

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-17 14:30:05 +02:00
Tianshuang Ke
8ffefab29f dts: arm: st: Fix incorrect memory mapping and size for STM32L475Xe
This commit updates the SRAM configuration in the STM32L475 device tree:

- `sram0` size reduced from 128K to 96K.
- `sram1` added with 32K.

These changes correct memory settings to prevent initialization failures.

Signed-off-by: Tianshuang Ke <qinyun575@gmail.com>
2024-04-17 14:29:22 +02:00
Jakub Zymelka
bce52c8057 dts: add nRF54L15 FLPR core
Add nRF54L15 FLPR core support.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
2024-04-16 18:36:58 +01:00
Jun Lin
011b730b4c driver: reset: npcx: add driver support for reset controller
Nuvoton NPCX chips have reset registers which allow to reset the
peripheral hardware modules. This commit adds the support by
implementing the reset driver. Note that only the reset_line_toggle API
is supported because of the nature of the reset controller's design.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2024-04-16 09:09:13 +02:00
Tim Lin
36f1092ed7 ITE: dts: it82xx2: Add missing extend setting of alternate function
If I2C3 switches from GPH1/GPH2 to GPB2/GPB5, extend setting
is required.

Test: Accessing I2C is normal if I2C2, I2C3, I2C5 are switched.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2024-04-16 09:05:38 +02:00
Caleb Perkinson
2fc42054a5 doc: correct sparkfun,serlcd.yaml
yaml file did not match device tree bindings.

Signed-off-by: Caleb Perkinson <calebperkinson@gmail.com>
2024-04-14 15:39:34 -07:00
Mahesh Mahadevan
e37d1a5489 dts: nxp_mcxn94x: Add DMA channels for FlexComm nodes
Copy the DMA channel information to both UART and SPI
instances of the Flexcomm as only one of them can be
active.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-04-13 07:03:55 -04:00
Emilio Benavente
d2bfed764c dts: arm: nxp: nxp_mcxn94x: Add PWM Support
Added the dts node for FlexPWM Support.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-04-12 16:53:03 -04:00
Laurentiu Mihalcea
94d156c9c8 nxp: imx8ulp: enable serial interface
Enable serial interface on i.MX8ULP.

This also includes a SHA update for hal_nxp which
pulls in the following commits relevant to Zephyr:

* 3366f234ed47 build: hal_nxp: add TPM counter support
* 6544455fcf46 Compile in PXP driver if LVGL is set to use
PXP.
* 31463a848bcd devices: MIMX8UD7: add definition for
LPUART_RX_TX_IRQS

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-12 16:52:38 -04:00
Ederson de Souza
eeebb4d911 kernel: Device deferred initialization
Currently, all devices are initialized at boot time (following their
level and priority order). This patch introduces deferred
initialization: by setting the property `zephyr,deferred-init` on a
device on the devicetree, Zephyr will not initialized the device.

To initialize such devices, one has to call `device_init()`.

Deferred initialization is done by grouping all deferred devices on a
different ELF section. In this way, there's no need to consume more
memory to keep track of deferred devices. When `device_init()` is
called, Zephyr will scan the deferred devices section and call the
initialization function for the matching device. As this scanning is
done only during deferred device initialization, its cost should be
bearable.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2024-04-11 15:50:44 -04:00
Krzysztof Chruściński
8acc6a961a dts: common: nordic: nrf54: Add rx-delay property to SPI
Add rx-delay property to all SPI nodes.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-04-11 14:30:41 +02:00
Daniel DeGrasse
821ae15744 dts: arm: nxp_rw6xx: add USBOTG devicetree node
Add devicetree node for USBOTG device, the EHCI based USB controller on
the RW6XX.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-04-11 09:09:00 +02:00
David Leach
00b46686b1 drivers: lpc55s36: Remove deprecated CSS driver
CSS was deprecated from the mcu-sdk. Removing driver from lpc55s36
to clear build error.

This is a temporary patch to remove the build error.

Fixes #69961

Signed-off-by: David Leach <david.leach@nxp.com>
2024-04-10 14:11:34 -04:00
TOKITA Hiroshi
e678a6247d drivers: serial: rpi_pico: Migrate to pl011 driver
RaspberryPi Pico's UART can be operated with the pl011 driver.
Replace it with this.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-04-10 10:01:25 +02:00
Tomasz Leman
a200dd88d8 dts: xtensa: intel_adsp: Set soft-off state as disabled
Configure the 'soft-off' power state for manual selection only in the
DTS for Intel ADSP ACE 1.5 MTPM and ACE 2.0 LNL platforms.

Changes include:
- Setting 'min-residency-us' to 0 to indicate that the 'soft-off' state
  is not intended for automatic selection by the power management
  policy.
- Adding a 'status' property set to "disabled" to prevent the power
  management policy from using this state during its decision process.

The 'soft-off' state remains available for manual selection by calling
`pm_state_force`. This change ensures that the state can still be used
when explicitly requested by the system or application, providing
flexibility for power management operations.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-04-09 16:58:24 +02:00
Daniel Maslowski
6b495ceda9 dts: jh7110: fix memory definitions
The L2LIM is 2MB in size, see:
https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/u74_memory_map.html
Rename it since there are other memory blocks such as the DTIM for the S7.

Signed-off-by: Daniel Maslowski <info@orangecms.org>
2024-04-09 14:20:39 +02:00
Benedikt Schmidt
888d071fe7 drivers: sensor: implement output diagnostics sensor for TLE9104
Implement a sensor for the output diagnostics of the power train
switch TLE9104.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-04-09 11:07:27 +02:00