Define the xspi node instead of ospi. Note that RCC CCIPR4 register
keeps the OCTOSP1 for clock domain selection.
Change the header file to xspi for the stm32 devices with xspi
peripheral. Keep the flash_controller/ospi.h for bindings compatibilty.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The new bindings for the stm32 xspi is for new stm32 devices with
XSPI peripherals like the stm32h5 serie. This is close to the octo-spi.
Adapt the flash controller constants to the XSPI model especially.
This is done through a new xspi.h definition file.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add driver, together with the corresponding dts binding and node in
the nRF54H20 SoC definiton, for the nRF temperature sensor that cannot
be accessed directly but only through nRF Services (nrfs) layer.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit makes the devicetrees of the targets that are based on the QEMU
`virt` machine more consistent with the rest of the RISC-V targets in
Zephyr by:
* adding the `riscv,isa` property
* adding a compatible string which uniquely identifies the `virt` core
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Add USDHC0 node to the mcxn94x devicetree. This node describes the one
instance of the Ultra Secured Digital Host Controller IP present on the
MCXN94x series SOCs.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The CSI can connect to either a camera sensor (as on i.MX RT10xx) or
a MIPI CSI-2 receiver (as on i.MX RT11xx). To be generic, change the
naming from sensor to source.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Add initial HID device support. Unlike the existing HID implementation,
the new implementation uses a devicetree to instantiate a HID device.
To the user, the HID device appears as a normal Zephyr RTOS device.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add DT node entries to RW for DAC and ADC.
Support the SOC required initialization of the DAC and ADC on RW.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commits adds required pinctrl node to provide the corresponding SIO
clock selection for the Serial Port under the different VOSCCLK.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The clk, dqs and ncs pins can be remapped between OSPI instances, but the
driver doesn't support it, yet. Therefore replace hard coded numbers to
device tree optional properties.
Signed-off-by: Samuel Kleiser <s.kleiser@vega.com>
iMXRT1042 SOC should be clocked at 528 MHz maximum. Correct the clock
setup to use the system PLL.
Fixes#70755
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow configuration of the system pll on the iMXRT10xx series parts, via
a fractional pll node under the CCM module.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adding required flag to the current-speed as without this driver
does not compile.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This commit adds an ieee802154 node to the list of nRF54H20 application
core's peripherals. While it does not translate directly into a physical
RADIO peripheral, it represents the capability to use the ieee802154
radio indirectly through cpurad.
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Gives number of the Extended Interrupts and Event Controller (EXTI)
interrupt line connected to the RTC Alarm event.
Used on all series, except WBAX & U5X, where RTC Alarm interrupt is
routed directly to Nested Vectored Interrupt Controller (NVIC) and to
Power Control (PWR) wake-up pins.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Move the Domain IDs from `nrf54h20.dtsi` into its own header file.
Additionally, include another header with Owner IDs.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
This change allows to use DTR line driven from external serial port
that when active (low) will prevent UART device from going to sleep.
It will also wake up platform when DTR line becomes active.
DTR line is often activated in serial port connected to host computer
when operating system opens serial device like COMx for Windows
or /dev/ttyACMx /dev/ttyUSBx for Linux based systems.
DTR line (specified in device tree) will be used by WAKEUP and PDC
controllers (via GPIO driver) to handle DTR line changes.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This change allows to wake up UART from sleep mode when
low level on inactive UART is detected during platform sleep.
Timeout can be specified for each UART separately in device tree.
If one of the UARTs is selected as console sleep timeout is taken
from Kconfig same way other platform configure same functionality
using CONFIG_UART_CONSOLE_INPUT_EXPIRED_TIMEOUT
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
UART2 and UART3 (unlink UART) do support hardware flow control.
This simply add necessary flag that is already handled in the code.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Correction of the reg address of enet2 for nxp_rt1060.
Regression introduced at 537d5c310c
Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
This commit adds flash controller instance for Ambiq Apollo3 Blue SOC
and Apollo3 Blue Plus SOC.
Also create the partitions on this flash controller node for apollo3_evb
and apollo3p_evb.
Signed-off-by: Aaron Ye <aye@ambiq.com>
If no HSFLL needs trimming, then `trim_hsfll()` should be compiled out.
This makes it easier to reuse the rest of `soc.c` out of tree.
Furthermore, some HSFLL instances can be trimmed before booting Zephyr,
so the FICR client properties in the DT binding should not be required.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
The emulated GNSS driver behaves like a GNSS, implementing
device pm and the GNSS APIs, using only kernel features (
zephyr work queue and uptime) making it buildable on all
zephyr targets.
The purpose of this device driver is to tailor and validate
the gnss api test suite.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Add mfd_adp5585 and gpio_adp5585 driver. This driver enables ADP5585
as an GPIO expander.
This chip is used as an GPIO expander on i.MX93 EVK. GPIO pinctrl,
read/write and interrupt is supported.
Note that ADP5585 has 2 GPIO banks with 5 pins each. The driver combines
two group into a 16-bit port. Index 0~4 correspond to R0~R4 lines, index
8~12 correspond to C0~C4 lines. Index 5~7 is reserved unavailable.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
The counter driver needs to know what is the maximum
counting frequency of each timer peripheral.
Let's add it to its DT.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add binding for adi SDP-120 connector and header file
with marcos to map signals using signal names.
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Add driver for IS66WVQ8M4 PSRAM, using the MCUX FlexSPI interface to
write data to the PSRAM device.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some instances of the FlexSPI IP support a different clock source being
used for port B of the FlexSPI instance. Add a devicetree property and
driver support to enable configuring this property of the hardware.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
