Commit graph

8801 commits

Author SHA1 Message Date
Piotr Pryga
8dcf8c111f dts: bindings: net: wireless: Change dfe-ant-num property name
Change dfe-ant-num propert name to dfe-antenna-num.
The change is conde to keep the same naming style
for all properies, like dfe-pdu-antenna property.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-02-25 14:53:27 +01:00
Piotr Pryga
64cb4bbc37 Bluetooth: controller: LLL: DF add initialization of ant switching GPIOs
Add initialization of GPIOs that are used for antenna switching.
GPIOs provided to DFE extension in Radio peripheral, to drive
antenna switching, should be initialized in GPIO peripheral beforehand.
The initialization is optional and may be disabled by Kconfig.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-02-25 14:53:27 +01:00
Helge Juul
30dbc40909 drivers/flash: stm32: Extend qspi-nor support to F7 series
Add quadspi node in stm32f7.dtsi and quadspi support to boards
stm32f746g_disco and stm32f769i_disco.
Note! Does not support DMA.

Signed-off-by: Helge Juul <helge@fastmail.com>
2021-02-24 18:12:40 -06:00
Shlomi Vaknin
3b5906ce03 dts: stm32l4: Support sdmmc on stm32l4+
Add device tree bindings for sdmmc controller
on stm32l4+ devices.

Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
2021-02-24 18:10:09 -06:00
Pavlo Hamov
5ae781d7d0 drivers: watchdog: cc32xx: Add support
Impelement watchdog for ti_cc32xx family

Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
2021-02-24 08:35:27 -06:00
Bosch Sensortec
0cc640d27b dts: bindings: sensor added dts binding bmi270
Added device tree binding for the BMI270 IMU

Signed-off-by: Bosch Sensortec <github@bosch-sensortec.com>
2021-02-22 17:58:00 -05:00
Jun Lin
445ecaf8a4 dts/arm: npcx: fix the invert field of JTAG0/1 selection
NPCX chip allows firmware to select the JTAG0/1 via bit 2/1 in the
DEVALT5 register. However, the selection logic is reverse
(i.e. 0:select; 1:not select.)
This change fixes the wrong setting of the invert field.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I2c080feaa7647e940463d9491b61a342c84a6141
2021-02-22 17:57:11 -05:00
Jun Lin
818ef576a2 dts/arm: npcx: fix the size of scfg register
The size of System Configuration register cannot exceed 0x70. Otherwise,
it will overlap the Debug Interface register which starts from
0x400c3074.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-02-22 17:57:11 -05:00
Mulin Chao
7c9d3f44f0 driver: sensor: npcx: add tachometer sensor support.
In NPCX7 series, it contains two tachometer (TACH) modules that contains
two Independent timers (counter 1 and 2). They are used to capture a
counter value when an event is detected via the external pads (TA or
TB).

The CL also includes:
— Add npcx tachometer device tree declarations.
— Zephyr sensor api implementation for tachometer.
— Enable "tach1" device in npcx7m6fb.dts for testing.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-22 17:56:19 -05:00
Glauber Maroto Ferreira
74922049ba drivers: spi: esp32: add basic SPI master support
Include SPI master support for blocking and asynchronous calls.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-02-22 08:17:04 -05:00
Mulin Chao
1f731c6c02 driver: soc: power: npcx: Add power managerment support.
This CL introduces power management driver that improves the efficiency
of ec operation by adjusting the chip’s power consumption to the level
of activity required by the application in npcx series.

The following list summarizes the main properties of the various chip
power states. Please refer the power.c file for more detail.

Main power states in npcx series include:
- Active: Core, RAM and modules operate at the clocks generated by PLL.
- Idle: Enter this state when the Core executes WFI or WFE instruction.
- Sleep: clock is stopped for most of modules but PLL is enabled.
- Deep Sleep: As Sleep mode but PLL is disabled.
- Standby: All power rails are turned off besides standby and battery
  power rails.

And this CL implements one power state, PM_STATE_SUSPEND_TO_IDLE, with
two sub-states for Zephyr power management system.
Sub-state 0 - "Deep Sleep" mode with “Instant” wake-up if residency
              time is greater or equal to 1 ms
Sub-state 1 - "Deep Sleep" mode with "Standard" wake-up if residency
              time is greater or equal to 201 ms

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-19 22:39:53 -05:00
Mulin Chao
e5caae8e0a driver: timer: npcx: add system kernel timer support.
This CL introduces a kernel device driver implemented by the internal
64/32-bit timers in Nuvoton NPCX series. Via these two kinds of timer,
the driver provides an standard "system clock driver" interface.

It includes:
 - A system timer based on an ITIM64 (Internal 64-bit timer) instance,
   clocked by APB2 which freq is CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
 - Its prescaler is set to 1 and provide the kernel cycles reading
   without handling overflow mechanism.
 - A event timer based on an ITIM32 (Internal 32-bit timer) instance,
   clocked by LCLK which frequency is 32KHz and still activated when ec
   entered "idle/deep idle" power state for better power consumption.
 - Its prescaler is set to 1 and provide timeout event mechansim.
 - Compensate system timer which clock is gating for better power
   consumption after ec left"idle/deep idle" power state.

This CL passed starve, timer_api, and timer_monotonic test suites.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-19 22:39:53 -05:00
Alexandre Bourdiol
68f5626b64 boards/dts: add SPI support to nucleo_wl55jc board
Add SPI support to nucleo_wl55jc board

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-02-19 22:39:24 -05:00
Alexandre Bourdiol
d98ce0b9d4 boards/dts: add i2c support to nucleo_wl55jc
Add I2C support to nucleo_wl55jc

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-02-19 22:39:24 -05:00
Alexandre Bourdiol
7d11f300b7 dts: arm: st: add STM32WL support
Add STM32WL55Xc device tree

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-02-19 22:39:24 -05:00
Daniel Leung
78837c769a soc: x86: add Lakemont SoC
This adds a very basic SoC configuration for Intel Lakemont SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-19 18:51:04 -05:00
Pavlo Hamov
ee6ec8d4f3 drivers: adc: cc32xx: Add support
Support 4 channels in IRQ mode. Sync/Async

Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
2021-02-19 10:43:58 -06:00
Laczen JMS
decf521660 drivers: eeprom: add emulated eeprom in flash
Modifications to incorporate latest write to new flash area
Modification to avoid writing garbage to new flash area when compactor
is called during init.
Modifications to allow erase at partition size instead of eeprom
pagesize.
Modifications to better separate rambuf usage from flash usage.
Corrected some errors in compactor

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2021-02-19 14:06:15 +01:00
Laczen JMS
232272cff8 drivers: eeprom: EEPROM emulation in flash memory
This driver emulates a EEPROM device in flash.

Reworked implementation with modified flash layout.

The emulation represents the EEPROM in flash as a region that is a
direct map of the eeprom data followed by a region where changes to
the eeprom data is stored. Changes are written as address-data
combinations. The size of such a combination is determined by the
flash write block size and the size of the eeprom (required address
space), with a minimum of 4 byte.
The eeprom page needs to be a multiple of the flash page. Multiple
eeprom pages is also so supported and increases the number of writes
that can be performed.

The eeprom size, pagesize and the flash partition used for the eeprom
are defined in the dts. The flash partition should allow at least two
eeprom pages. For fast read access a rambuffer can be enabled for the
eeprom (by setting the option rambuf in the dts).

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2021-02-19 14:06:15 +01:00
Harry Jiang
f8251f3bde dts: arm: st: h7: Add the IWDG1 nodes to STM32H7xx SoC
Add the IWDG1 nodes to STM32H7xx Series Soc

Signed-off-by: Harry Jiang <explora26@gmail.com>
2021-02-17 16:19:21 -06:00
Erwan Gouriou
e987d51815 dts: stm32: Add exti nodes to stm32 series
Add exti node for each stm32 series and matching binding description.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-17 14:26:23 -06:00
Ioannis Glaropoulos
007c8539f6 dts: arm: nordic: add QDEC nodes for nrf5340
Add device tree nodes for QDEC peripheral instances
for nRF5340 Application core.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-17 22:34:20 +03:00
Gerard Marull-Paretas
cbc340c10c drivers: sensor: add support for MAX6675
Add support for MAX6675 cold-junction-compensated K-thermocouple to
digital converter.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-17 14:33:29 +01:00
Wealian Liao
24d9e31197 dts: npcx7: add support for npcx7m6fc & npcx7m7fc
Add support for Nuvoton npcx7m6fc & npcx7m7fc.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-02-17 14:33:03 +01:00
Kumar Gala
b275fec8c4 soc: stm32: convert to use DEVICE_DT_GET for clocks
Convert from device_get_binding to DEVICE_DT_GET.  In doing this we
no longer need the label in the devicetree node so we remove that.

Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 17:01:37 -06:00
Kumar Gala
ca5272f239 pinctrl: cc13x2_cc26x2: drop label property from pinmux node
We've removed the need for label properties from the pinmux devicetree
nodes on all other controllers and its not required for the TI one, so
remove it from the .dts and drop label being required in the binding.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 16:46:31 -06:00
Kumar Gala
942916e691 arm: nxp: kinetis: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 16:45:02 -06:00
Kumar Gala
c54005235c riscv: ite: it8xxx2: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 09:45:57 -05:00
Tomasz Bursztyka
32638183fd dts/bindings: Fixing x86 CPU compatibles by providing proper yaml files
Make compatible name following the rule as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-02-15 09:43:30 -05:00
Tomasz Bursztyka
16c4b65dce dts/x86: Add cache line size
There is a property for it so let's use it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-02-15 09:43:30 -05:00
Kumar Gala
f6b7dd09ec pinmux: sifive: Convert SiFive pinmux to be devicetree based
Add a simple pinctrl node for the IOF registers under the GPIO
controller node to be used by the pinmux driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:33:00 -05:00
Kumar Gala
d6b4995d6a riscv: rv32m1: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:32:41 -05:00
Kumar Gala
6e8eb53b51 arm: atmel: sam0: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:31:29 -05:00
Kumar Gala
4276d7d247 pinmux: hsdk: Convert ARC HSDK pinmux to be devicetree based
Add a simple pinctrl node for the CREG GPIO MUX register to be used
by the pinmux driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:29:56 -05:00
Kumar Gala
147bb6b9f3 arm: microchip: mec1501hsz: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:29:34 -05:00
Guillaume Paquet
143a776657 boards: arm: nordic: Add BG96 to RAK5010 board
Add BG96 in board description
Add W Disable Pin in BG96 descriptor

Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2021-02-15 08:25:46 -05:00
Scott Worley
2b926db4e1 drivers: espi: Microchip eSPI add SAF support
Add ESPI SAF features to the Microchip eSPI driver as
a separate file. ESPI SAF depends upon the core eSPI
driver adding the ability to attach the system SPI
flash to the EC eSPI endpoint instead of the host
eSPI controller.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-02-15 08:22:01 -05:00
Alexander Wachter
f725719cf1 dts: stm32g4: Add SPI4 node
This commit adds the SPI4 node on the stm32g4 SoC.

Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
2021-02-15 08:20:30 -05:00
Nicolas VINCENT
233162f113 dts: add lpuart1 node for stm32h7 devices
lpuart controller is available on stm32h7, add it to the corresponding
dts file.

Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
2021-02-15 08:20:06 -05:00
Ryan Holleran
b417bb85d2 dts: nxp_k2x: Correct and enable MCG clock controller binding
nxp_k2x.dtsi: Corrects Multipurpose Clock Generator binding
to utilize nxp,kinetis-mcg. Assign MCG to FlexTimer devices.
Enable FlexTimer clocks via System Integration Module clock
gate control registers.

Kconfig.defconfig.mk22f12: Enable default use of
CLOCK_CONTROL_MCUX_MCG when CLOCK_CONTROL is selected.

Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
2021-02-15 08:14:06 -05:00
Steven Daglish
5427d6bbc7 sensor: mcp9808: Adding temperature resolution to MCP9808 sensor driver
During the driver init, the function will set the sensor resolution
based on the driver's dts variable "resolution"

The driver's device tree has been updated to include the value
"resolution".

The default is set to the highest resolution of 0.0625C.

Moved mcp9808_reg_write from mcp9808_trigger.c to mcp9808.c

This allows resue of the same function in both the trigger and
resolution functions.

Function name changed to xxx_16bit to distinquish it from the 8
bit write function that will added.

Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
2021-02-15 08:13:17 -05:00
Mulin Chao
5e5dc358d9 dts/arm: npcx: move def_lvol_io_list node from board dts to dtsi file.
This CL moves def_lvol_io_list device-tree node from npcx7m6fb_evb.dts
to npcx7m6fb.dtsi. The benefit of it is that we needn't add
def_lvol_io_list node for each board dts file if there are no 1.8V
io-pads on the platform. If so, add them in the specific board dts file
directly.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-15 08:10:46 -05:00
Francois Ramu
27a3c953a5 dts: arm: stm32wb55 and stm32l4: Add cpu label
Add label to facilitate add cpu-idle-states later.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-02-15 08:07:12 -05:00
Gerard Marull-Paretas
fb01820760 dts: arm: st: h7: add definition for backup SRAM
Add DT definition for the backup SRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-15 08:04:24 -05:00
Gerard Marull-Paretas
51629bc6e4 dts: arm: st: f7: add definition for backup SRAM
Add DT definition for the backup SRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-15 08:04:24 -05:00
Gerard Marull-Paretas
98262aff91 dts: arm: st: f4: add definition for backup SRAM
Add DT definition for the backup SRAM. Only added to F4 models
supporting it.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-15 08:04:24 -05:00
Gerard Marull-Paretas
f92d125974 dts: arm: st: f2: add definition for backup SRAM
Add DT definition for the backup SRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-15 08:04:24 -05:00
Gerard Marull-Paretas
10532a5310 soc: arm: st_stm32: add support for STM32 backup SRAM
Add support for backup SRAM initialization found in multiple STM32
microcontrollers. Linker script facilities are also provided to make it
easy to define variables in the backup SRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-15 08:04:24 -05:00
Ioannis Glaropoulos
d0ed6916ef dts: nordic: remove support for deprecated nRF5340 Eng A SoC
In the wake of the removal of nRF5340 PDK board we also
remove the support for the nRF5340 Engineering A SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-15 07:59:43 -05:00
Armando Visconti
d2c5664ff1 drivers/sensor: iis2iclx: modify int-pin type in DT
Change int-pin property type to enum, as it may only
accept 1 or 2 as possible values.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-02-15 07:58:36 -05:00