Bits in the BBRAM status register (BKUP_STS) are write-1-to-clear bits.
The current driver writes 0 to clear those bits, which is incorrect.
Fix it in this commit.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
According to the nrfx peripheral resource sharing example in
samples/boards/nrf/nrfx_prs it should be possible to share a resource
and apply the pins on peripheral that share resource ID.
However the sample only works since it only demonstrates UART and SPIM,
and by enabling both another SPIM driver, and UART is enabled for the
console. It would not be possible to enable a TWIM driver in addition.
Instead allow the PSELs if the configuration for NRFX has been enabled.
Signed-off-by: Joakim Andersson <joerchan@gmail.com>
Some functions in the bmm150 driver were depending on a define
that was never used. Changed it to the one that is actually defined.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Confirming the Proximity Integration is an integer, we don't need to
pre-apply the Scaling factor to then be accounted for when the actual
meas_timeout_us is calculated.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Coverity found this legitimate issue: the datasheet specifies PS_IT
being 2-bits long (1, 2, 4, 8) and this driver assumes more steps are
available. Remove extraneous fields so the Proximity integration
setting fits in the expected 16-bit value.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
drivers/serial/uart_async_to_irq.c: In function 'get_rx_timeout':
drivers/serial/uart_async_to_irq.c:51:26:
warning: 'cfg.baudrate' may be used uninitialized
51 | baudrate = cfg.baudrate;
| ~~~~~~~~~^~~~~~~~~~~~~~
drivers/serial/uart_async_to_irq.c:45:28: note: 'cfg' declared here
45 | struct uart_config cfg;
Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
Renesas RA ICU driver requires to generate ISR tables.
Adding `select GEN_ISR_TABLES` to force enable it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
i3c config need has i2x/i3c baudrate configured first.
so in i3c init we shall set the baudrate first
fixing: #65153
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
When getting gpio info for a specific device with no line
names, invalid memory was accessed.
The check for the length of the line name array has been
corrected to avoid this.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The unreset of ACE PDM controllers is moved to beginning of
void dai_dmic_start() and done side-by-side. This change is done
for adhering to recommended hardware initialization flow to
avoid intermittent failures on ARL-S.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch removes the traces printed inside spinlock protected
code. The DMIC capture start code is timing critical. Traces
leave an unknown delay into start sequence, so it's better to not
produce them.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The dai_dmic_update_bits() function is used in start trigger
code dai_dmic_start() and in capture runtime to control DMIC
IP in unmute sequence. Especially the start sequence is timing
critical so it's better not produce additional delay in this
function.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
When device was resumed from sleep OUT endpoints were most
likely not enabled due to condition that checked pending transfer.
Configured OUT endpoints should be enabled (ready for RX)
if they were enabled by interfaces.
Now separate bit field enabled is added and check to
see if OUT endpoint should be ready for reception after
sleep is done.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Callback with USB_DC_EP_DATA_OUT was called directly from
interrupt handler (handle_ep0_rx()) while rest of the interrupt
conditions were not checked yet.
Some interfaces started next transfer directly from this callback
resulting in case where TX endpoint was still marked as busy
and transfer was eventually abandoned.
Now message is sent from all affected endpoints after every USB
pending interrupt is handled.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Switching from write to read on EP0 is done when data is
transmitted.
Additionally receiver is enabled when NAK is created in
response to OUT token. This may happen when host sent
ZLP before everything was transmitted.
This case flushed receiver FIFO which could lead to
setup packet corruption.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Add support for automatic control of PLL for USB subsystem.
This utilized virtual USB clock present in clock control.
USB driver enables PLL when device is attached or USB
sends resume signaling.
PLL can be turned off (if application does not requested it)
when device is detached (application request)
or USB host sends suspend request.
When VBUS is not present or application did not started USB yet
PD_DOMAIN_SYS is also not acquired that allows for deep
sleep. When USB is active deep sleep will never be activated.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
When EP0 was disabled EP0 was setup to ignore setup and
out packets.
In usb_dc_ep_enable() function mask was never cleared.
It resulted in USB stop functioning after application
disabled endpoint (usb_disable()) and then tried
to enable usb again.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Smartbodn does not have dedicated USB clock.
For USB to work PLL needs to be turned on.
To allow for flexible configuration artificial USB clock
is added that can be operated via clock_control subsystem.
This new clock turns on PLL when USB subsystem is enabled.
PLL can also be request in DT if application requires
more speed.
PLL can be automatically turned off when USB enters suspend
state and application did not requested it.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
The documentation recommends to read and then write-back the entire
register, when ending interrupts.
Signed-off-by: Mateusz Karlic <mkarlic@antmicro.com>
Validate the contents of `struct rtc_time` against the provided mask
when setting time or alarm.
Use the same names of function parameters as those in the RTC Interface.
Signed-off-by: Jakub Topic <jakub.topic@anitra.cz>
The shell tries to decode all channel types and sequential channel
indexes. Unfortunately when swapping to channel specs we forgot to reset
the channel index for the next channel type to look at.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Removed PM device runtime support from drivers in PD_SYS domain.
Update the rest device drivers to call pm_device_runtime_get/put()
functions when CONFIG_PM_DEVICE_RUNTIME is enabled.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
The following Kconfigs have been deprecated for more than 2
releases, remove them:
- `IEEE802154_CC13XX_CC26XX_SUB_GHZ_RADIO_TX_RETRIES`
- `CONFIG_IEEE802154_2015`
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Selection of these GIC Kconfigs have been deprecated
for more than 2 releases, users should use the devicetree
method instead, update the Kconfigs.
The SOCs below have been updated to not select `GIC_V3`, since
their devicetree already have the required compatible:
- fvp_aemv8r
- rzt2m
- rk3658
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The following Kconfigs:
- `CONFIG_ETH_STM32_HAL_RANDOM_MAC`
- `CONFIG_ETH_STM32_HAL_USER_STATIC_MAC`
- `CONFIG_ETH_STM32_HAL_MAC3`
- `CONFIG_ETH_STM32_HAL_MAC4`
- `CONFIG_ETH_STM32_HAL_MAC5`
have been deprecated for more than 2 releases, user should
have switched to the devicetree method now, remove them.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
These clock selection Kconfigs should have been deprecated for
more than 2 releases, remove them:
- `CONFIG_COUNTER_RTC_STM32_CLOCK_SRC`
- `CONFIG_COUNTER_RTC_STM32_CLOCK_LSI`
- `CONFIG_COUNTER_RTC_STM32_CLOCK_LSE`
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Update airoc_wifi_host_buffer_get function to set final
buff size based on input “size” param.
Update airoc_mgmt_send to use airoc_wifi_host_buffer_get
instead net_buf_alloc_len.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Fixed#74370, the issue is caused by the update to introduce MMIO
mapping, after MMIO mapping, should use data->base for device
base memory address.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
The current atmel,sam-tc-qdec sensor implementation shared the timer
counter node. This create issues when users wants define both modes.
The current proposal changes the qdec dedinition to be a child of
tc and refactor all the chain of definitions.
Fixes#71312
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Replaced the software `reverse` function, used for bit reversal, with
the intrinsic `__RBIT` function.
This utilizes the hardware bit-reversal instruction for improved
efficiency.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Implementation erroneously used a mask from the ROUTEPEN register
when writing the ROUTELOC register.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Series 2 uses DBUS for alternate function control, which directly uses
port and pin numbers for location selection. Configure pinout as part
of the I2C_SDA/I2C_SCL case, rather than the separate _LOC case,
as the port and pin are not available at this point.
Configure route register prior to enabling the route, to ensure that
the wrong pin is not temporarily claimed.
Fixes an issue where DBUS was always configured to port A and
pin given by the GECKO_LOC() macro, rather than the correct port/pin
pair.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
This commit addresses the issue related to the rtc.h API returning ENOSYS
for a driver not implementing alarm_set_callback when the ALARM
functionality is enabled but interrupts, and thus alarm callbacks, are not
supported by the current configuration.
The following drivers have been modified to return correct code:
- rtc_pcf8523
- rtc_pcf8563
- rtc_rv3028
Signed-off-by: Jakub Topic <jakub.topic@anitra.cz>
Use CAN_CALC_TDCO() macro to set TDCO. There is a minor change how the
tdco is calculated. In the macro the SYNC segement is taken into
account while it wasn't used before.
Fixes#73821.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Fill-in the mode field of the fd_entry so that the
implementation can be made aware that the specific file
descriptors created are sockets.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Implement absolute minimum necessary to get Buffer DMA working. Require
Data Cache to be disabled if DWC2 OTG has DMA enabled because the stack
does not currently guarantee cache line alignment for allocated buffers.
Set EPENA bit before disabling IN endpoints because it seems to be
necessary in Buffer DMA mode (without EPENA the wait for INEPNAKEFF does
time out). Setting EPENA should have no impact on Completer mode
operation (where EPENA is not necessary for INEPNAKEFF to trigger).
Programming Guide recommends programming SUPCnt to 3, but the only
advantage would be to be able to tell how many back-to-back SETUP packets
were received if there was no more than 3 back-to-back SETUPs. This
information doesn't seem to be useful. The disadvantage is that the
buffer needed for receiving SETUP packet must be able to hold SUPCnt
multiple of 8 bytes. Use SUPCnt 1 so the 8 bytes buffer is enough.
Make sure to clear StsPhseRcvd interrupt bit in Buffer DMA mode because
the DMA seems to prevent the SETUP Phase Done interrupt from triggering
if StsPhseRcvd is set. Clearing this bit doesn't seem to be necessary in
Completer mode. This bit is set on control transfers with data stage
from host to device.
Both Buffer DMA and Completer mode operation on nRF54H20DK was verified
using USB2CV Chapter 9 Tests and MSC Tests with Mass Storage sample.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Do not use sys_clear_bits() followed by sys_set_bits() on DCTL register
to avoid writing to DCTL register twice - first with zeroed out address,
and then with the new address. Change the code to write the address in
one DCTL register write.
Do not use sys_set_bits() to set test mode, but rather prepare the
correct value first.
Set DCFG and GUSBCFG registers in one go. There is no point in reading
back the value or doing multiple subsequent writes to these registers.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
This driver could end up doing a great deal of work inside the ISR when
large SPI transfers were in use, which could cause significant IRQ
latency. For the normal, non-async SPI transfer case, use events to
signal the calling thread to complete the work rather than performing
FIFO transfers inside the ISR.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
