Commit graph

23353 commits

Author SHA1 Message Date
Corey Wharton
d80174fadf drivers: dac: add checks for internal channel config
Return -ENOTSUP if these flags are specified but not supported.

Signed-off-by: Corey Wharton <xodus7@cwharton.com>
2024-09-17 05:23:56 -04:00
Corey Wharton
2b9ed72f9e drivers: dac_stm32: make pinctrl config in the device tree optional
Now that we support internally connected channels we should make the
pinctrl configuration optional.

Signed-off-by: Corey Wharton <xodus7@cwharton.com>
2024-09-17 05:23:56 -04:00
Corey Wharton
834cc98f39 drivers: dac_stm32: add support for internally connected channels
Adds support for configuring the STM32 DAC channel mode for internal
connections. This is only enabled for SOCs that support it.

Signed-off-by: Corey Wharton <xodus7@cwharton.com>
2024-09-17 05:23:56 -04:00
Pisit Sawangvonganan
7a59ebf6af drivers: i3c: shell: use shell_fprintf_normal instead of shell_fprintf
Due to the introduction of `shell_fprintf_normal` in PR #77192, we can
minimize caller overhead by eliminating direct `color` parameter passing.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-09-17 05:23:19 -04:00
Pisit Sawangvonganan
d539257a87 drivers: i3c: shell: align struct shell * argument name to sh
Aligned the `struct shell *` argument name from `shell_ctx` to `sh`
for consistency with other drivers' usage of `sh`, and to match
the `shell_cmd_handler` argument name.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-09-17 05:23:19 -04:00
Pisit Sawangvonganan
fdaaf3624c drivers: i3c: shell: fix unhandled <id> argument parsing
The `<id>` argument was included in `cmd_i3c_ccc_getvendor`,
`cmd_i3c_ccc_setvendor`, and `cmd_i3c_ccc_setvendor_bc` but
was not processed.

Utilized `shell_strtoul` for proper parsing of the `<id>` argument
in these functions.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-09-17 05:23:19 -04:00
Pisit Sawangvonganan
66bce34af2 drivers: i3c: shell: fix compilation error in cmd_i3c_ccc_getmxds
Resolved a compilation error where `maxwr`, `maxrd`, and
`max_read_turnaround` were incorrectly referenced.

The code was updated to correctly access these fields from
the `data_speed` structure.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-09-17 05:23:19 -04:00
Georgij Cernysiov
4ec67271ab drivers: flash: stm32 ospi correct lines on writes
Correct used lines based on write opcode
regardless of the data mode.

The write opcode is set during init for all
modes and can be overwritten in DT.

Add lines correction for PP_1_1_2.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2024-09-17 09:45:42 +02:00
Joakim Andersson
e67f629094 drivers: clock_control: Deprecate Kconfig for MCO configuration
Deprecate support for configuring the MCO source and prescaler from
Kconfig configurations.
This is now done by devicetree and an MCO driver instead, which also
configures the pin to be used by the MCO peripheral.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2024-09-16 20:19:57 +02:00
Joakim Andersson
929c4507fc drivers: Add driver for STM32 MCO peripheral
Add device driver for STM32 MCO peripheral which takes configures
the MCO clock source and prescaler, and outputs it on one of the GPIO
pins.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2024-09-16 20:19:57 +02:00
Joakim Andersson
807ccf5b03 drivers: clock_control: Add clock sources to common enabled_clock check
Add clock sources PLL2CLK, PLL3CLK and EXT_HSE.
Needed to check that these clocks are enabled in MCO code.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2024-09-16 20:19:57 +02:00
Joakim Andersson
3c3487ae07 drivers: clock_control: Expose enabled_clock for clock driver library
Expose the helper function enabled_clock so that it can be used in
other clock library sources.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2024-09-16 20:19:57 +02:00
Luis Ubieda
00abc5a661 spi: rtio: Move spi_rtio_copy to spi_rtio
To group all common APIs for SPI RTIO.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2024-09-16 20:19:51 +02:00
Luis Ubieda
bd8a23f719 spi: rtio: Extract common APIs into separate file
Extracted common SPI RTIO operations from the spi_mcux_lpspi driver
into spi_rtio, which should be common across RTIO drivers.

Tested with spi_loopback with and without CONFIG_SPI_RTIO. Ran on
mimxrt1010_evk.

Also, verified the other SPI RTIO driver (spi_sam) is not broken by
these changes (tested building for target: robokit1 with the same
conditions as above).

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2024-09-16 20:19:51 +02:00
Luis Ubieda
b135cc5e46 spi: spi_mcux_lpspi: Removed spin lock from iodev_start
Does not seem to be required. This allows hiding away the spin lock APIs.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2024-09-16 20:19:51 +02:00
Luis Ubieda
7510a17c18 spi: mcux_lpspi: Refactor driver to extract common RTIO functionality
As a step to make them common code: spi_rtio.c.
Verified this refactorization builds and passes spi_loopback, both with
CONFIG_SPI_RTIO enabled, as well as disabled. Tested on mimxrt1010_evk.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2024-09-16 20:19:51 +02:00
Lucas Tamborrino
4385785f02 drivers: i2c: esp32: Fix DT node instance.
DT_INST macros were not getting the info from the correct
node.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2024-09-16 20:19:43 +02:00
Sven Ginka
686cbc90f6 driver: timer: Add support for sy1xx
Add sys timer driver for Sensry's RISCV32 based SY1xx.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2024-09-16 20:19:31 +02:00
Sven Ginka
7443a2c703 driver: serial: Add support for sy1xx
Add uart driver for Sensry's RISCV32 based SY1xx.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2024-09-16 20:19:31 +02:00
IBEN EL HADJ MESSAOUD Marwa
ec08e1c0e8 drivers: ethernet: Modify RX thread creation and update KConfig
This change will allow users to configure the Ethernet RX thread
according to their specific real-time requirements.
Adding preemptive threading helps to reduce jitter and
the impact of Ethernet traffic on real-time performance.

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2024-09-16 20:19:16 +02:00
Nathan Olff
7a094e376f drivers: clocks: remove check for sysclock in h7 clocks
remove check for system clock frequency in clock_stm32_ll_h7 because of
addition of fracn (difficult to handle)

Signed-off-by: Nathan Olff <nathan@kickmaker.net>
2024-09-16 20:18:54 +02:00
Nathan Olff
f979252cea drivers: use fracn in clock stm32h7 driver
use fracn value if defined for each PLL 1, 2 and 3 based on stm32u5 code

Signed-off-by: Nathan Olff <nathan@kickmaker.net>
2024-09-16 20:18:54 +02:00
Sylvio Alves
0aec059630 drivers: sdhc: esp32: remove unused code
Removed unused entry in SDHC driver and initialize
variables accordingly.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-09-16 20:18:33 +02:00
Felipe Neves
a372220ade video: esp32_dvp: change default log level
to the recent CONFIG_VIDEO_LOG_LEVEL option.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2024-09-16 20:17:26 +02:00
Mathieu Choplain
3328d7cb01 drivers: adc: stm32: don't fail init if pinctrl is not provided
Commit 47187a9ec9 made the `pinctrl` property
of STM32 ADCs optional, to allow usage of internal channels without wasting
GPIO pins. However, the driver was not adapted to support this new usecase.

(The real bug comes from commit 93956b2073,
that transitioned from a custom `stm32_dt_pinctrl_configure` function to
the standard `pinctrl_apply_state`, without accounting for the fact that
the former returns 0 when pinctrl is empty, but the latter returns -ENOENT)

Modify the driver to work even if no `pinctrl` is present on the ADC node.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-09-16 13:50:42 +02:00
Maureen Helm
13ff70a6f9 drivers: sensor: tdk: Refactor cmake and kconfig to vendor subdirectory
Refactors the cmake and kconfig bits of the tdk sensor drivers into the
vendor subdirectory to make them consistent with other vendor-sorted
sensor drivers. The tdk driver implementations were previously moved
into the vendor subdirectory in commit
41f1c3a2b7.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2024-09-16 10:06:03 +02:00
Yong Cong Sin
475ff826d6 drivers: intc: plic: fix IRQ on every hart regardless of mapping
Allow IRQs to work on every hart regardless of the mapping
of the contexts.

Add a test to validate the hart-context mapping.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-16 10:02:08 +02:00
Anuj Pathak
1471c2f814 drivers: led: lp5562: Add PM Device support
- Add PM_DEVICE support for power management

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2024-09-13 13:43:33 +02:00
Anuj Pathak
c13eabb059 drivers: led: lp5562: Add enable-gpios control
- Add handling of enable-gpios control on init

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2024-09-13 13:43:33 +02:00
Kapil Bhatt
be295a7f02 drivers: nrfwifi: Get RTS threshold
Add api support to get RTS threshold.

Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
2024-09-13 13:42:26 +02:00
Jukka Rissanen
98a21a823c drivers: eth: native_sim: Fix error output when creating interface
The return value already contains the errno so use it when printing
the error message.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2024-09-13 13:42:20 +02:00
Tomasz Moń
57666d3eff drivers: udc_dwc2: Send isochronous data on next SOF
Do not schedule isochronous data on current frame. While doing so can
work at Full-Speed, it is pretty much impossible to do it quickly enough
at High-Speed.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2024-09-13 09:21:58 +02:00
Damian Nikodem
8c997b35ab driver: ssp: add support for blob30 on PTL
Adding support for SSP blob handling in version 3_0 for PTL.

Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
2024-09-13 09:17:56 +02:00
Ryan McClelland
f209e0aecf drivers: i3c: shell: add getmxds helper
Add a shell command for the CCC GETMXDS.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2024-09-12 13:11:37 -04:00
Ryan McClelland
10a0f01b4b drivers: i3c: add getmxds ccc helper
Add a CCC helper function for getmxds. Also include it with getting
the i3c basic info.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2024-09-12 13:11:37 -04:00
Lauren Murphy
474431b24e drivers: sensors: bme280: clang format files
Clang formats decoder and header files.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2024-09-12 13:04:18 -04:00
Lauren Murphy
3ef81feb2c drivers: sensor: bme280: use int math in decode q31 conv
Fix decoder to use integer math when converting readings to Q31.

Fixes #77295

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2024-09-12 13:04:18 -04:00
Felipe Neves
35c0cc7bf1 video: gc2145: add GC2145 sensor
support and basic controls.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2024-09-12 13:02:18 -04:00
Yong Cong Sin
3f3e37a68e drivers: intc: plic: refactor lock in plic_irq_enable_set_state()
Move the lock out from the `plic_irq_enable_set_state()` function
to cover the entire configuration process, so the whole of
enable/disable is atomic.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-12 13:01:37 -04:00
Matthew Mulloy Steinborn
f777030898 drivers: i3c: i3c_cdns Fix null pointer issue in i3c cadence driver.
Fixing a bug where during the bus_init routine, when a slave is
initialized, the target hardware can get an interrupt, and this can occur
before the target_config structure is assigned; the generic IRQ handler
attempts to use this structure to grab callback function pointers, but
with no target config it attempts to access the structure member from a
null pointer. Fix works by adding ternary operation during IRQ that first
checks if target_config is null or not.

Signed-off-by: Matthew Mulloy Steinborn <mulloystmatthew@meta.com>
2024-09-12 13:01:06 -04:00
Michal Smola
60c1c50895 drivers: pwm: Fix NXP TPM without combine channel feature
TMP variant without combine channel feature is used in some NXP SoCs.
Build error occurs for such socs because of accessing unavailable
struct member in hal.
Fix it by adding #if directive to check the feature presence.

Signed-off-by: Michal Smola <michal.smola@nxp.com>
2024-09-12 14:48:32 +02:00
Adrian Warecki
311ddf90e2 ace: mm: tlb: Check tlb translation enabled before flushing cache
Before unmapping a memory page, the cache is flushed. If the given memory
page is not mapped, this operation ends with a cpu exception on the
ptl platform. Add check if tlb translation is active before flushing.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2024-09-12 14:47:33 +02:00
Mathieu Choplain
1530c98a77 drivers: hwinfo: stm32: mark STM32WB0 series as incompatible
The existing hwinfo driver for STM32 is incompatible with STM32WB0 series.
Prevent compiling the driver if the target's series is STM32WB0.
This fixes the build failure on the drivers.hwinfo.api test.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-09-12 10:03:37 +02:00
Mathieu Choplain
e322fa9781 drivers: flash: stm32: add STM32WB0 flash controller
Adds a basic driver for the STM32WB0 flash controller (read/erase/write).
Extended operations are not supported by this driver.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-09-12 10:03:37 +02:00
Mathieu Choplain
263b03feeb drivers: gpio: stm32: add support for STM32WB0
Adds support for the STM32WB0 series in the existing STM32 GPIO driver.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-09-12 10:03:37 +02:00
Mathieu Choplain
32a1b0cc54 drivers: intc: add STM32WB0 GPIO interrupt controller
Adds a driver for the STM32WB0 series GPIO interrupt controller.
This driver implements the STM32 GPIO INTC API, along with an extension
function used to check if a specific line is available on current board.

This also extends the GPIO INTC API to support level-sensitive interrupts,
as this feature is available on STM32WB0.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-09-12 10:03:37 +02:00
Mathieu Choplain
20c45fe10a drivers: clock: add STM32WB0 clock control
Add control driver for STM32WB0 series, with support for all clock sources.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2024-09-12 10:03:37 +02:00
Sadik Ozer
bfb21ced8d drivers: counter: Add MAX32xxx counter driver
Common counter driver based on timer for MAX32xxx MCUs
To use as wakeup source wakeup-source parameter shall be
defined as below

&lptimer0 {
	status = "okay";
	clock-source = <ADI_MAX32_PRPH_CLK_SRC_ERTCO>;
	wakeup-source;
	counter {
		status = "okay";
	};
};

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-09-11 20:18:33 -04:00
Krzysztof Chruściński
ffdf9a978d drivers: serial: nrfx_uarte: Use ENDTX_STOPTX short if possible
Use short which is available on some devices.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-09-11 20:14:30 -04:00
Sylvio Alves
b4117f97d3 drivers: wifi: fix esp32 build error
There is a regression caused by #76177, which
causes build to fail due to missing includes and others.
This wraps it with proper checks and fixes wifi scan call.

This also remove unused variable present in the same driver.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-09-11 20:14:07 -04:00