Remove SoCs part dependency of CLOCK_STM32_PLL_PREDIV1 config since
it will only be used on parts having an HSE oscillator, ignored
otherwise.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The shared irq support doesn't really require its own dir, lets merge it
into drivers/interrupt_controller.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
So far, DT did not support the flash driver name.
Any flash-controller should have the appropriate
flash driver that should be identified by its name.
This path adds generic support for extract the description
from the flash-controller node,
adds implementation of this property for all nrf5x targets.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The generic library provided by ST in ext/hal/st/lib/sensor/vl53l0x
needs to be adapted to the platform. In this case, the main
modification is the way to use I2C. This is now using the Zephyr
I2C API.
Signed-off-by: Vincent Veron <vincent.veron@st.com>
Add driver for ST vl53l0x time of flight sensor.
This driver can be used in 2 modes :
* proximity sensor :
configure VL53L0X_PROXIMITY_THRESHOLD
will return 1 if target is between sensor and threshold,
else, 0
* distance sensor :
will return the distance in millimeters from sensor to target
This driver use the official STMicroelectronics library for vl53l0x.
(in ext/hal/st/lib/sensor/vl53l0x)
Signed-off-by: Vincent Veron <vincent.veron@st.com>
Add gpio mcux driver which can be used for lpcxpresso54114 and other lpc
socs. In this driver, CMSIS register access is made for GPIO.
Option for access by GPIO Pin is provided as of now.
Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add usart-yaml in dts.
Build fsl_lpc_usart and fsl_lpc_flexcomm in
ext/hal/nxp/mcux/drivers/Makefile.
Only polling mode is implemented in usart now. Interrupt can be added in
future.
Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new pinmux driver for lpcxpresso54114 based on mcux.
Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Use "select USE_STM32_LL_SPI" to select the needed STM32 LL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use "select USE_STM32_LL_USB/USE_STM32_HAL_PCD/USE_STM32_HAL_PCD_EX"
to select the needed STM32 HAL files, instead of editing
ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use "select USE_STM32_LL_RNG" to select the needed STM32 LL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use "select USE_STM32_HAL_TIM" to select the needed STM32 HAL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use "select USE_STM32_LL_I2C" to select the needed STM32 LL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use "select USE_STM32_HAL_ETH" to select the needed STM32 HAL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use "select USE_STM32_LL_UTILS" to select the needed STM32 LL files,
instead of editing ext/hal/st/stm32cube/CMakeLists.txt
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The CMakeLists lost the config for uart_mcux_lpsci.c, which is the
console driver for board frdm_kl25z. So just add "uart_mcux_lpsci.c"
into drivers/serial/CMakeLists.txt to make it work.
Signed-off-by: Jason Wang <jason.yanping.wang@hotmail.com>
In flash driver init, write_block_size could be initialized
with FLASH_WRITE_BLOCK_SIZE which is generated from device
tree parsing (dts property: "write-block-size")
Fixes#5305
If not defined, generate a compilation error.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
CC1200 is a sub-ghz chip supporting 6 ISM & SRD bands: 169, 433, 470,
868, 915 and 920 MHz, with features dedicated to IEEE 802.15.4(g).
Current driver enables CC1200 against actual IEEE 802.15.4 Soft-MAC. 'g'
version support in the Soft-MAC will follow later.
The chip itself is closer to a bare metal radio modem than to a usual
15.4 chip: up to the user to provide the right RF settings for the
carrier band. Such settings can be generaten through TI's SmartRF tool.
Hopefully, for channel selection, this driver will be clever enough to
compute the proper register change without any special input from the
user. This will work for all the bands supported by the chip.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Wrong buffer assigned for receiving the last 2 bytes in multi
byte reception of STM32F4 i2c driver. Change the buffer to
correct one.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This reverts commit 2a7efb7419.
"choice" section in board Kconfig.defconfig introduces a dependency
from the sensor to the board. As a consequence a warning was generated
whenever the sensor was used on another board.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This reverts commit 2e20f49167.
"choice" section in board Kconfig.default introduces a dependency
from the sensor to the board. Then a warning was generated
whenever the sensor is used on another board
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The SAM0 series has up to 6 SPI ports. Add Kconfig options to match.
Similar to the 9033fb2f01, this patch
only defines the fields that are currently used and skips ones like
GPIO and IRQ priority that aren't.
Signed-off-by: Michael Hope <mlhx@google.com>
It appears the STM32F411XE doesn't support RNG so remove enabling it
from the SoC defconfig and flag an error if attempting to build the
driver on that SoC.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
According to STM32F4 reference manual, software should wait for BTF=1
before reading N-2 data byte.
Reference:
"For N >2 -byte reception, from N-2 data reception" section, page
853 of STM32F4 Reference manual.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
The SAM0 has a 64 byte page (the programing unit) with 4 pages to a
row (the erase unit). This driver implements a read/modify/write to
emulate the byte level writes used by NFFS.
Signed-off-by: Michael Hope <mlhx@google.com>
In STM32 family, RNG IP is available only on F4 and L4 series.
Besides STM32F401 does not support is neither.
Get entropy driver available on STM32 devices supporting it and
generate a compilation issue on STM32 devices that do not own
the RNG IP.
Solves #5448
Signed-Off-By: Erwan Gouriou <erwan.gouriou@linaro.org>
On STM32L4 SoCs RNG is clocked by 48MHz domain.
Hence, besides clock activation, it requires 48M
domain to be enabled.
Tested on:
*nucleo_l476rg
*stm32l476g_disco
*disco_l475_iot1
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
SPI_MODE_GET() returns a bitfield. It is thus wrong to test if a bit is
set using the equality operator. The bit-wise AND operator must be used
instead.
This can be tested by setting the SPI in mode 3 (CPOL + CPHA). Currently
both tests will fail and the result is a SPI configured in mode 0. This
was confirmed using an oscilloscope. Applying the patch fixes the
polarity.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
We can have a spurious error while performing a transfer using IRQ. This
happens when the last message of the transfer is a read with a STOP
condition. We must disable the RX interrupt while waiting for the STOP
interrupt, otherwise we will get a spurious RX interrupt which will lead
to an error.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
STM32 UART driver uses a macro for clock initialization, that
is difficult to read and incompatible with needed changes to
fix STM32F0 series UART problems.
This change switches to using the full clock bus names in UART
init functions removing the macro-magic and increasing
readability.
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
The combination of
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL and
CONFIG_CLOCK_STM32_PLL_SRC_HSI
on SOCs with PREDIV1 support made use of the LL define
LL_RCC_PLLSOURCE_HSI_DIV_2, which is not defined for SOCs with
PREDIV1 support.
This exchanges LL_RCC_PLLSOURCE_HSI_DIV_2 with LL_RCC_PLLSOURCE_HSI
which is the appropiate source according to stm32f0xx_ll_rcc.h
line 473 and stm32f3xx_ll_rcc.h line 795.
Tested by compiling hello world for nucleo_f091rc board with HSI as
PLLSOURCE.
Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
Instead of accessing the environment variable ZEPHYR_BASE every time we
require accessing the source code root, use an intermediate variable
that has OS path separators correctly set to '/' to avoid issues on
Windows.
Note: This removes the ZEPHYR_SOURCE_DIR CMake variable. External
applications using that will need to change to use the new ZEPHYR_BASE
variable.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Old reference on driver's specific raw mode was still lurking around.
Removing those.
Fixes#5270
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
A very old reference to former net stack was still lurking around.
Removing it.
Taking the opportunity to clear up dependencies.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Amend stm32 ethernet driver with small changes:
*Provide HAL_ETH_Init return value in error message,
return on error and move it before thread creation
*Provide computed MAC address in debug message
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
