Commit graph

25,525 commits

Author SHA1 Message Date
Kumar Gala
dfbb8fa5f1 drivers: gpio_imx: Add gpio_driver_data to driver data
Add gpio_driver_data as the first element in the driver data as the gpio
core expects this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
bd06f0835a drivers: gpio_ht16k33: Add gpio_driver_data to driver data
Add gpio_driver_data as the first element in the driver data as the gpio
core expects this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
22042ad75c drivers: gpio_esp32: Add gpio_driver_data to driver data
Add gpio_driver_data as the first element in the driver data as the gpio
core expects this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
bcdc057503 drivers: gpio_dw: Add gpio_driver_data to driver data
Add gpio_driver_data as the first element in the driver data as the gpio
core expects this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
5a34407daa drivers: gpio_cmsdk_ahb: Add gpio_driver_data to driver data
Add gpio_driver_data as the first element in the driver data as the gpio
core expects this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
be17245419 drivers: gpio_cc32xx: Add gpio_driver_data to driver data
Add gpio_driver_data as the first element in the driver data as the gpio
core expects this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
f30e4efd7a drivers: gpio_cc13xx_cc26xx: Add gpio_driver_data to driver data
Add gpio_driver_data as the first element in the driver data as the gpio
core expects this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
3231b22767 drivers: gpio_nrfx: Update for handling local layer in core
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
7e6d9ffb31 drivers: gpio_sam: Update for handling local layer in core
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
31139f834a drivers: gpio_gecko: Update for handling local layer in core
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
bd8141832e drivers: gpio_mcux: Update for handling local layer in core
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do
that in gpio_pin_interrupt_configure and gpio_pin_configure.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Kumar Gala
7989f5cd6b drivers: gpio_mcux: Fix interrupt handling
Change when we clear interrupt status to happen before we handle the
callbacks.  As the callbacks might manipluate the GPIO state and cause
a GPIO interrupt.  If we clear interrupt status after than we might
miss an interrupt.

Also only clear interrupts for interrupts that are we have enabled and
that were reported when we read from the interrupt status.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-05 12:00:36 +01:00
Piotr Mienkowski
30a97ce28e drivers: gpio_mcux: update to use new GPIO API
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.

Tested on frdm_k64f board.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-02-05 12:00:36 +01:00
Piotr Mienkowski
ff90b2c1d6 drivers: gpio_nrfx: update to use new GPIO API
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.

Tested on nrf52840_pca10056 board.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Piotr Mienkowski
39effb4397 drivers: gpio_sam: update to use new GPIO API
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.

Tested on sam_e70_xplained board.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-02-05 12:00:36 +01:00
Piotr Mienkowski
1fdc3bed14 drivers: gpio_gecko: update to use new GPIO API
Update driver code and board files to use new GPIO configuration flags
such as GPIO_ACTIVE_LOW. Also add implementation of new port_* driver
API as well as gpio_pin_interrupt_configure function.

Tested on efr32_slwstk6061a board.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
48b674b570 gpio: use named types to distinguish pin sets from pin values
Both pin sets and values encoding pin values are ultimately represented
by 32-bit unsigned integers. Provide typedefs that make the role of a
parameter explicit.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-02-05 12:00:36 +01:00
Piotr Mienkowski
33193a57eb gpio: add gpio_pin_interrupt_configure function
This commit moves interrupt configuration for a single pin from
gpio_pin_configure to gpio_pin_interrupt_configure function.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-02-05 12:00:36 +01:00
Piotr Mienkowski
d6191b5781 gpio: add new functions to set/get pin/port values
This commit adds following functions which work with pin logical levels
(take into account GPIO_ACTIVE_LOW flag):
- gpio_port_get, gpio_port_set_masked, gpio_port_set_bits,
  gpio_port_clear_bits, gpio_port_set_clr_bits
- gpio_pin_get, gpio_pin_set
Functions which work with pin physical levels:
- gpio_port_get_raw, gpio_port_set_masked_raw, gpio_port_set_bits_raw,
  gpio_port_clear_bits_raw, gpio_port_set_clr_bits_raw
- gpio_pin_get_raw, gpio_pin_set_raw
As well as functions:
- gpio_port_toggle_bits, gpio_pin_toggle_bits

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-02-05 12:00:36 +01:00
Jukka Rissanen
1474b4ea14 drivers: modem: gsm: Use modem log level instead of ppp
Use the same log level as the other modems.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-02-05 10:19:15 +02:00
Kumar Gala
6d1a32a60d drivers: dma: stm32: Fix compiler warning
When building the i2s tests on 96b_argonkey we get the following
warnings:

drivers/dma/dma_stm32.c: In function 'dma_stm32_configure':
drivers/dma/dma_stm32.c:181:2: error: 'periph_addr_adj' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
  181 |  switch (increment) {
      |  ^~~~~~
drivers/dma/dma_stm32.c:161:2: error: 'memory_addr_adj' may be used
   uninitialized in this function [-Werror=maybe-uninitialized]
  161 |  switch (increment) {
      |  ^~~~~~

Fix by initialzing periph_addr_adj and memory_addr_adj to 0.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-02-04 15:49:48 -06:00
Carles Cufi
1a37baf24a drivers: ieee802154: rf2xx: Enable sub-GHz L2 conditionally
Enable the sub-GHz L2 only if the main L2 is enabled too.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-02-04 15:49:35 -06:00
Gerson Fernando Budke
b1b60ac1d8 drivers: spi: sam: Add support to samv71 soc
Add depends on SOC_SERIES_SAMV71 to enable spi driver for samv71 soc.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 14:55:45 -05:00
Gerson Fernando Budke
7422cff736 drivers: spi: sam: Enable generic config
The current sam spi driver uses soc dependent name which duplicate
configuration to enable other platforms. This refactor current
definitions to a generic way to reuse symbols by multi soc definitions.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 14:55:45 -05:00
Gerson Fernando Budke
17ccd9ee1b drivers: usb: sam: Add support to samv71 soc
Add depends on SOC_SERIES_SAMV71 to enable usb driver for samv71 soc.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 14:02:59 -05:00
Ismael Fillonneau
84a0b32210 drivers: spi: nrfx: factorise spi_context_lock()
spi_context_lock() & spi_context_release() are called in transceive()
function for a better readability.

Signed-off-by: Ismael Fillonneau <ismael.fillonneau@stimio.fr>
2020-02-04 20:58:05 +02:00
Gerson Fernando Budke
4a1bb71694 drivers: gpio: Add samv71 defines
Enable samv71 MCU gpio specifics.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 13:56:42 -05:00
Jim Shu
baa72d8c32 riscv_machine_timer: optimize MTIME/MTIMECMP registers access in riscv64
riscv64 CPUs can access full 64-bit memory-mapped register by a single
instruction, so we can directly access these registers.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2020-02-04 17:42:48 +02:00
Oane Kingma
dc5c242223 drivers/watchdog: Add support for SiLabs Gecko Watchdog
Watchdog type is found on e.g. Pearl/Jade Gecko, often
more than 1 is present.

Driver supports timeout and (minimum) window configuration
and reset or timeout interrupt support for now.

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-02-03 11:25:40 -08:00
Peter A. Bigot
4420c5ed40 adc: provide API to help with conversions
Gain values are specified with enumeration values that can't be used
to reverse the effects of scaling the input signal.  Provide a
function that reverses the effect of the gain by scaling a measured
value.

Also provide a function that converts a raw measurement captured with
a reference voltage and specific gain and resolution to the
corresponding voltage in millivolts.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-02-03 16:26:51 +01:00
Maureen Helm
6382f06aa0 drivers: kscan: Introduce ft5336 touch panel driver
Introduces a new ft5336 touch panel driver for the keyboard scan (kscan)
interface. The driver currently uses a timer to periodically poll touch
data in the system work queue, but later it can be enhanced to use a
gpio interrupt instead of a timer.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-02-01 08:50:16 -05:00
Carlo Caione
6f36300219 drivers: timer: Add per-core ARM architected timer
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.

This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).

So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Anas Nashif
aa14022c8a intel_s1000: various fixes for build errors
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-31 14:51:37 -05:00
Anas Nashif
0358d707b0 usb: dw: fix undefined callback variable
Add missing declaration of variables for callbacks.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-31 14:51:37 -05:00
Johann Fischer
c68ac431cc drivers: display: add support for GD7965 display controller
Add support for GD7965 display controller.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-01-31 11:37:35 -05:00
Robert Lubos
aa17850455 drivers: wifi: eswifi: Rework offloading mechanism
Switch to `NET_SOCKET_REGISTER` mechanism over the offloaded API
registration.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-01-31 11:36:02 -05:00
Robert Lubos
e434725bdf drivers: modem: ublox-sara-r4: Rework offloading mechanism
Switch to `NET_SOCKET_REGISTER` mechanism over the offloaded API
registration.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-01-31 11:36:02 -05:00
Robert Lubos
ece552c644 drivers: wifi: simplelink: Rework offloading mechanism
Switch to `NET_SOCKET_REGISTER` mechanism over the offloaded API
registration.

Including the following fixes from the review:

* The fd returned by the socket accept call needs to be finalized,
  similar to how it is done for socket creation.

* sl_RecvFrom() in TI SimpleLink Host driver does not support NULL
  pointers for 'from' address and address length, and sl_SendTo() does
  not ignore the destination address when in connection mode, so passing
  NULL would cause a failure. These issues have been reported to TI
  (CC3X20SDK-1970, CC3X20SDK-1971).

  Let's use sl_Recv and sl_Send to implement recvfrom/sendto in the case
  of NULL addresses.

* simplelink_poll() should not process negative file descriptors in the
  fds array after sl_Selecti() returns. A negative fd value indicates
  that the entry is invalid and should be ignored.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-01-31 11:36:02 -05:00
Ivo Clarysse
fe9025aafb drivers: can: stm32: Support CAN_2 interface
Add support for the CAN_2 interface.

Simultaneous use of CAN_1 and CAN_2 is not supported yet.

Signed-off-by: Ivo Clarysse <ivo@bcdevices.com>
2020-01-30 14:27:28 -05:00
Ivo Clarysse
29d2a438ab drivers: pinmux: stm32f4: add CAN_2 pins
Add pinmux definitions for CAN_2 RX/TX pins on PB5/PB6 and PB12/PB13.

Signed-off-by: Ivo Clarysse <ivo@bcdevices.com>
2020-01-30 14:27:28 -05:00
Peter van der Perk
11ef49b65c drivers: can: Add SocketCAN support to mcux flexcan driver
Used the SocketCAN initalization code from the can_stm32.c driver which
successfully initializes SocketCAN for the Flexcan driver

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2020-01-30 16:03:34 +02:00
Jukka Rissanen
92481765a2 drivers: ethernet: Set the context iface ptr to main interface
If the Ethernet driver has VLAN enabled (only native_posix, mcux
or gmac has VLAN supported), then the iface pointer in ethernet
context should contain the main network interface. This is needed
so that the interface will get link address set to it properly.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-01-30 09:42:07 +02:00
Erwan Gouriou
dbd054fbd3 drivers/flash: stm32: Fix faulty register access
Merge of conflicting PRs lead to compilation issue.
Fix this.

Fixes #22297

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-01-29 15:14:22 -06:00
Mieszko Mierunski
971c27af0d drivers: sam: UART async API change timeout to signed value.
Change timeout to signed value.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2020-01-29 19:37:31 +01:00
Mieszko Mierunski
20444869e3 drivers: nrf: Fix forever timeout handling in UART async API.
Current implementation directly passes timeout value to workqueue/timer
which results in assertion or instant timeout in case when K_FOREVER is
passed. This fix ensures that no timer or workqueue is called with
K_FOREVER.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2020-01-29 19:37:31 +01:00
Mieszko Mierunski
dc3c906d12 drivers: uart: Switch timeout values to s32_t in UART async API
Use signed values for timeout in UART asynchronous API, to be consistent
with timeout type in timer and workqueue values.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2020-01-29 19:37:31 +01:00
Krzysztof Chruscinski
dcdc61cfdb drivers: serial: nrf_uarte: Allow TX only instance
Extended nrf_uarte driver to support TX only UARTE instances.
When RX pin is not provided then RX is not started at all. This
allows to achieve low power with logging/console enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-01-29 12:03:05 -06:00
Krzysztof Chruscinski
510102dd71 soc: arm: nordic_nrf: nrf52: Add workaround for anomaly 132
Added delay before starting low frequency clock for the first time to
ensure that anomaly conditions are not met. Delay is configurable and
might be disabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-01-29 15:38:55 +01:00
Kamil Lazowski
5b4f4253c1 drivers: flash: add Nordic JEDEC QSPI NOR flash driver
Most JEDEC NOR flash devices uses not only typical SPI mode
(MISO,MOSI,SCK and CS), but also QSPI mode (IO0,IO1,IO2,IO3,SCK and CS).
QSPI mode uses more data lines and as a result provide higher
throughput. If this were not enough, Nordic chips provide
hardware acceleration for read/write/erase functions, what
gives significant performance boost.
It does a lot of things "behind the scene", i.e when user has written
some data to the flash and would like to read them back, it has to wait
until the flash is ready by reading WIP bit in Status Register.
This driver does it automatically.

Signed-off-by: Kamil Lazowski <Kamil.Lazowski@nordicsemi.no>
2020-01-29 15:15:49 +01:00
Andrzej Głąbek
7899b1f5b6 modules: hal_nordic: Update nrfx to version 2.1.0
Update the hal_nordic module revision, to switch to nrfx 2.1.0.

Because the list of peripherals for nRF5340 has changed as follows:
- SPIM2 has been renamed to SPIM4
- SPIM2-3, SPIS2-3, TWIM2-3, TWIS2-3, and UARTE2-3 have been added
a couple of related corrections needed to be applied in dts and Kconfig
files, plus the spi_nrfx_spim driver has been extended with the support
for SPIM4.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-01-29 15:00:45 +01:00