Adapted driver to clock_control changes (usage of onoff manager).
Since timer is permanenty requesting the clock, it is using API
dedicated for that: z_nrf_clock_control_lf_on().
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Updated nrf clock control driver to use onoff service for managing
multiple users.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
FLASH_TYPEERASE_PAGES is null and doesn't represent a bit in the
register, thus this instruction has no effect.
It must be replaced by FLASH_CR_PER which is the bit that should
be cleared.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Added function read_non_aligned that reads data under
non-aligned flash addres to non-aligned read buffer of any size.
Signed-off-by: Mateusz Syc <Mateusz.Syc@nordicsemi.no>
Add support for wsen-itds 3-axis accel sensor, provides acceleration,
temperature data reading and supports configuring of output data rate,
operating mode and scale.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
This gets a little complicated as the driver could be
using PCI-E MMIO, MMIO specified by DTS, or I/O ports.
This driver doesn't use struct uart_device_config any
more.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Good example of the NAMED variants of the MMIO macros, since
an existing inheritance mechanism already took the first-member
slot of the dev_data/config structs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fairly straightforward example of how to deal with PCIe.
The code considers whether a particular instance is PCIe
or not on a per-instance basis, so DEVICE_MMIO_ROM is not
conditionally defined.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
A hack was required for the loapic code due to the address
range not being in DTS. A bug was filed.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The ethernet driver no longer continues to try to initialize
itself if PCIe probing fails.
This device is always PCIe so we don't need to reserve ROM MMIO
storage.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fix typo in logged Kconfig option name that is missing in used
configuration. This one was mostly problematic for developers wanting to
find such option in source tree using grep - NET_SOCKET_OFFLOAD was not
found in Kconfig files.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
With this refactoring of pcie directory, RC drivers are placed under
host/ directory, EP drivers are placed under endpoint/ directory and
they are completely independent of each other.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
The antenna control GPIO was incorrectly initialized to active. This
is unnecessary since the HAL will activate the antenna switch when the
chip enters an active state.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The new sx1276 pin configuration helpers can be used by the sx126x
driver as well. Move them to sx126xx_common.{c,h} to facilitate reuse.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Fixed AF for USART 6 on PC6/PC7 PG8/PG9/PG12/PG13/PG14/PG15
All RTS/CTS/RX/TX pins now have correct AF7 instead of wrong AF8.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
The wdt CLEAR register is a write synchronized register.
To avoid bus stall, check the status of SYNCBUSY before
accessing the register.
Use SYNCBUSY register for SAM E.
If the wdt is syncing, return -EAGAIN to avoid bus stall.
Signed-off-by: Steven Slupsky <sslupsky@gmail.com>
Add support to STM IIS2DH the ultra-low-power highperformance
three-axis linear accelerometer.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add option to concatenate i2c transfers. If concatenation buffer size is
provided then transfers will be concatenated as long as there is space
left in buffer.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Added a build-time assert to check if heap memory configuration to
make sure that it can accomodate RPMsg queue allocations.
Ref: NCSDK-5479
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
In case of control register lock, driver should return the error
immediately. Otherwise, error is later overwritten by
'rc = flash_stm32_wait_flash_idle(dev);'
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
ep_idx is common used designator for endpoint index,
rename ep_num to ep_idx in usb_dc_sam0 driver.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This commit adds a dependency on the TRNG resource in the TI Power
module, prevents the system policy from entering standby when TRNG is
active, and adds support for device PM.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Abort I2C transfers through the MCUX HAL if a transfer fails to avoid
deadlock in the driver/HAL.
Fixes#25098
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reset gpio is configured during driver initialization. There is no
reason to do it repeat that process later, so replace
gpio_pin_configure() with gpio_pin_set().
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Introduce sx1276_configure_pin() helper macro, which hides lots of
boilerplate preprocessor and C code. Doing so allows to uncover
inconsistent gpio initialization flow and prevent such in future. Also
add error log whenever gpio_pin_configure() fails.
It seems like output of gpio_pin_configure() for several
gpios (antenna_enable, rfi_enable, rfo_enable) was assigned to variable,
but its values was never checked. Return value from gpio_pin_configure()
of tcxo_power gpio was even not catched. The only output gpio
configuration that was handled properly was actually reset gpio.
Fix that inconsistent behavior by always checking return value of
sx1276_configure_pin().
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Fix flash operation timeout due to incorrect use of
secondary ticker to abort any radio in use. Ticker id 0
is reserved for split controller's pipeline preempt timeout.
Using the same ticker id caused the secondary ticker to
not be started if controller is using the same ticker id
for pipeline preempt timeout.
Fixes#26333.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Suppress -Wchar-subscripts warnings when building with Newlib, by
casting isdigit() parameter to unsigned char.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
LPC55xxx SoCs don't allow reading erased areas, the flash memory
controller (FMC) will trigger an ECC error for that area. To prevent
reading unwritten areas the low level FMC command of margin checking is
used, this will fail if the area to be read is not correctly written
(margin_check) or area is erased (blank_check).
In the case of an erased page, we return dummy data so the application
can program that area.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The generic SPI GPIO chip select support now respects devicetree flags
for signal active level. This pass DT information to driver instance to
ensure proper behavior.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Unit tests were failing to build because random header was included by
kernel_includes.h. The problem is that rand32.h includes a generated
file that is either not generated or not included when building unit
tests. Also, it is better to limit the scope of this file to where it is
used.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Since the i2c init structure is moved from config_info to the stack,
this change requires 12 bytes more stack during driver initialization.
This fixes#25255
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
wifi-reset-gpios flags were not respected so far. This means that
setting reset as active low (which is required in most cases for ESP
modules/chips) was done inside esp driver with inverted logic. Use dts
flags instead, so "active low" property is configured the same way as
for other drivers (i.e. in device-tree instead of driver).
This change also allows to configure reset as active high, in case where
ESP's nRST signal is somehow inverted on the board (behaving as RST
signal instead).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
PCI devices on 64 bit systems can be mapped anywhere, not just in the
lower 4G of memory. Remove pointer size assumptions.
Also this removes the use of a struct uart_device_config to store the
(runtime) BAR address. That struct has other stuff in it, and the
only thing we need is the single MMIO address. It's also REALLY
confusing to have two "devconf" fields in the device storing values of
the same struct type, some fields of which are used from one of them
but some from the other!
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The PCI API was originally limited to 32 bit addresses. Even though
it had code to skip over the high word in 64 bit BAR entries, it
refused to use it and returned a 32 bit value. Some devices in the
wild have default mappings from the firmware for devices above 4G.
Also remove the "iobar" API. It's dead code, we don't call it and we
don't test it. IO space BAR entries are a legacy feature from way,
way back in PCI history (I genuinely have never heard of a real device
that uses them!). And there's no difference in format between one of
these and a 32 bit "memory" BAR anyway, someone who actually had this
requirement could just use the existing API without worry.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
