The callback is not used anymore, so just delete it from the pm_control
callback signature.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
the device PM callback is not used anymore by the device PM subsystem,
so remove it from all drivers/tests using it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Armv8-A and Armv8-R both support PSCI. So PM_CPU_OPS_PSCI's
dependency should be "ARM64" rather than "ARMV8-A".
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
There is a name clash when using G4 series LL TIM driver depending on
the inclusion order of the LL TIM and pinmux headers. If the LL headers
are included after pinmux is included, AF1 and AF2 definitions used by
pinmux clash with the AF1 and AF2 TIMx register names.
In order to solve this problem with minimum impact, the following has
been done:
1. Prefix the AFx and ANALOG definitions with STM32
2. In order to avoid changing all *-pinctrl.dtsi files, the STM32_PINMUX
macro contatenates STM32_ with the provided mode.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit adds a new Kconfig option CLOCK_CONTROL_NPCX_EXTERNAL_SRC.
With this option enabled, the internal 32.768 KHz clock (LFCLK) is
generated by the on-chip Crystal Oscillator (XTOSC). Otherwise, the
LFCLK is generated by the Low-Frequency Clock Generator (LFCG).
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
refactor flash_page_get_info to simplify and to avoid using mixing the
usage of an off_t (offs) and an uint32_t (page_index).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
In stm32l5xx soc, the LL_DMA_InitTypeDef has 2 more fields
(DoubleBufferMode and TargetMemInDoubleBufferMode) that must be
initialised with 0 else the configuration is wrong and gives
wrong values to the LL_DMA_Init function. Due to this the test
tests/drivers/dma/loop_transfer too would fail.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Fix some leftovers from the pm_device_state changes.
Fixes build problem introduced in
cc2f0e9c08.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This change ensures the CPU won't get an interrupt number which is
being generated.
it8xxx2 has a limitation for interrupt vector register.
CPU may read incorrect interrupt number in ISR.
The following is an example that got incorrect interrupt number:
1. Register IVECT = 0x10. (no interrupt pending/IVECT_OFFSET_WITH_IRQ)
2. Chip INT6 interrupt occurs (IVECT = 0x16) and jump to ISR.
3. Read interrupt vector register to determine interrupt number.
4. Higher priority interrupt occurs (for example: INT158, IVECT = 0xAE)
while the CPU is reading the interrupt vector register for EC INT6,
CPU may end up with an incorrect interrupt number between 0x16 and 0xAE.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
__LL_RCC_CALC_HCLK1_FREQ is only available for WL and WB series,
for other series __LL_RCC_CALC_HCLK_FREQ should be used.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The nRF QSPI has a configurable delay from the rising
clock signal to the actual sample point measured in
clock cycles. This commit exposes that delay as a DTS
parameter without modifying existing behavior.
Signed-off-by: Abram Early <abram.early@gmail.com>
The definition of qspi_flash_get_parameters, that implements
the mandatory get_parameters API call for the driver, was incorrectly
placed within block conditionally compiled when
CONFIG_FLASH_PAGE_LAYOUT is defined.
The commit fixes the issue that was causing compilation error
when the config has not been set.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
This commit selects LL_RCC_RNG_CLKSOURCE_CLK48 as a clock source
to rng peripheral. LL_RCC_RNG_CLKSOURCE_CLK48 is CLK48 divided by 3.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Add basic support for TI HDC20XX series (e.g. HDC2010, HDC2021, HDC2022,
HDC2080). It is able to get temperature and humidity in the default
14-bit resolution. Triggers, resolution selection, interrupt line, auto
measurement mode are currently not supported.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
For esp32c3 related ROM located functions instead
of esp32c3_rom.
Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
by adding the soc specific files such: soc initialization code,
linker scripts and support for esp32c3 devkitm
Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
hal_espressif repository was updated from esp-idf v4.2
to esp-idf v4.3 to allow latest Espressif chips integration.
As a consequence, it added a few changes in drivers
and peripherals. To maintain bisectability, changes in this
PR cannot be split. Here are some details:
wifi: update linker script by adding libphy and new attributes.
spi: update some APIs and fixed missing wait_idle check
west.yml: esp32: update hal to new version
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Move all PM_DEVICE_STATE_* definitions to an enum. The
PM_DEVICE_STATE_SET and PM_DEVICE_STATE_GET definitions have been kept
out of the enum since they do not represent any state. However, their
name has not been changed since they will be removed soon.
All drivers and tests have been adjusted accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If stream socket is marked as pending close, make sure that send()
caller gets notified about it, so that application layer can decide to
stop trying to send anything more.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far send errors were silently ignored. This is okay for
UDP (datagram) sockets, as there is no guarantee that packets will
actually be sent successfully. In case of TCP (stream) stream sockets
however, application layer expects network stack to send requested data
as stream, without losing any part of it.
In case of send errors on stream sockets mark that socket to be closed
and stop sending any subsequent network packets, so that data stream
won't have any holes.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Fix for Issue#35658.
Update the custom vector table to add the OS Event timer
interrupt which is used on RT685 as the kernel system timer
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit removes the huge if condition section and is
replaced with DT APIs to get the maximum erase time of a
stm32 flash from dtsi.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Commit c045cbd336 added support for internal voltage reference source,
but in practice only the temp sensor is supported. Fix that.
Also change the code to keep the existing paths so that VREFINT and
TEMPSENSOR can be used at the same time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Fix i2c emulated bus initialisation code to use children of specific i2c
bus DTS node instead of first i2c bus instance.
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
The patch fixes driver compile errors and ADC management for the f3x
series. It was developed and tested for the stm32f373 variant.
Tested-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Add the lptim1 device node definition and enable the corresponding
exti interrupt in sys_clock_driver_init().
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Converts the spi_nor flash driver to use `spi_dt_spec` as a
demonstration of the simplifications that the API enables.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Replace device_get_binding() with DEVICE_DT_GET to obtain the PS/2
controller and clock control device objects. It helps to improve the
efficiency for driver initialization as DEVICE_DT_GET is processed
at the link time rather than run time.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The PS/2 module in npcx provides a hardware accelerator mechanism
including an 8-bit shift register, a state machine, and control logic
that handle both the incoming and outgoing data. The hardware
accelerator mechanism is shared by 4 PS/2 channels. To support it,
this CL separates the PS/2 driver into channel and controller drivers.
The controller driver is in charge of the PS/2 transaction. The channel
driver is in charge of the connection between the Zehpyr PS/2 API
interface and controller driver.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Promote the "edac mem" shell subcommand to a generic "devmem" root shell
command. This command is useful for poking around registers and memory
outside of the EDAC drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Using helper functions decreases function complexity numbers reported
by static code analyzers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Check errors returned by edac_ecc_error_log_clear() and
edac_parity_error_log_clear().
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
