Commit graph

25,525 commits

Author SHA1 Message Date
Tomasz Leman
f659d46e9d drivers: dmic: enable runtime power mgmt in intel dmic
Enable Zephyr device runtime power management mechanisms in Intel DMIC
driver. This allows Zephyr to track usage reference for power domain
gating.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-30 17:46:17 -05:00
Tomasz Leman
d9a416f38d power_domain: intel_adsp: code update
This patch contains several small changes to the intel adsp power
domain.

- include missing header,
- replacing sys_write32/sys_read32 with sys_write16/sys_read16 since
  DfPWRCTL is a 16 bit register,
- renaming struct to be more representing what it is,
- passing register address, not a value to the sys_read/sys_write
  functions,
- pd_intel_adsp_init is now returning actual status.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-30 17:46:17 -05:00
Peter Maxwell Warasila
55ce3026c9 drivers: flash: stm32l5_u5: refactor flash_stm32_page_layout() for clarity
While diagnosing a problem on the STM32U585 in this function in
flash_stm32l5_u5.c, I had difficulty sussing out the flow of the
function and conditional logic.

This refactor seeks to improve clarity through a simplified flow control
using an early return to short circuit logic on subsequent calls to the
function and slightly more thorough comments.

Tested using tests/drivers/flash on the b_u585i_iot02a and in a
proprietary application and board which uses the STM32U585 and littlefs.

Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
2022-11-30 17:30:36 +01:00
Peter Maxwell Warasila
ed3ad75a7a drivers: flash: stm32l5_u5: fix L5/U5 difference in FLASH_PAGE_NB
In flash_stm32_page_layout, the FLASH_PAGE_NB macro is used to set the
page count in the flash layout returned to the caller. On STM32L5
platforms this is defined in stm32l5xx_hal_flash.h to be (FLASH_SIZE /
FLASH_PAGE_SIZE). However, on STM32U5 platforms the macro is defined in
the soc headers (such as stm32u585xx.h) define the macro as
(FLASH_BANK_SIZE / FLASH_PAGE_SIZE). This results in the flash layout
only reflecting the first bank on STM32U5 platforms with the maximum 2
MB of flash.

This commit resolves this discrepancy by directly calculating the number
of pages by dividing FLASH_SIZE by FLASH_PAGE_SIZE.

Tested on a proprietary board using the STM32U585 which mounts a
littlefs partition in the last 256 kB of its 2 MB of flash.

Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
2022-11-30 17:30:36 +01:00
Gerard Marull-Paretas
a29bdc262c drivers: regulator: drop async enable
Drop the async enable function. This feature is rarely/never used,
complicates driver design, and doesn't really follow the sync/async API
design/naming used in other areas. In the future we can introduce
regulator_enable_async if needed, with support from the driver class (no
onoff). Note that drivers like PCA9420 did not implement any
asynchronous behavior. regulator-fixed implemented in the past
asynchronous behavior using work queues, an overkill for most GPIO
driven regulators. Let's keep things simple for now and extend the API
when needed, based on specific usecases.

In the current implementation, reference counting is managed by the
driver class. \isr-ok attribute is dropped, since calls are potentially
blocking. Note that drivers like PCA9420 already violated such rule.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-30 15:49:30 +01:00
Gerard Marull-Paretas
e0c8de1e39 drivers: regulator: fixed: simplify implementation
Remove regulator-fixed-sync specialization, create a single driver that
is always synchronous. The asynchronous part is rarely/never used, so
let's keep things simple for now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-30 15:49:30 +01:00
Sylvio Alves
831ecd4096 driver: wifi: esp32: disable optimization by default
Do not set wifi optimizations by default in order
to free up IRAM room region. In case higher throutput
is necessary, one can enable this flags to optmize it.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-11-30 13:40:10 +01:00
Sylvio Alves
b7b8830c7c driver: wifi: esp32: remove build warning
Removes strnlen implicit declaration when newlibc
is enabled.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-11-30 13:40:10 +01:00
Manuel Arguelles
4fbf940019 drivers: counter: support NXP S32 System Timer Module
NXP S32 System Timer module includes a 32-bit count-up timer and four
32-bit compare channels with a separate interrupt source for each
channel. The timer is driven by the module clock divided by an 8-bit
prescale value.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-11-30 11:29:39 +01:00
Jay Vasanth
38ad230aec drivers: pinctrl: Microchip XEC PINCTRL add invert pin
Microchip XEC GPIO pins support inverting the output of
alternate pin functions. This feature may be useful for
those peripherals that do not implement output inversion
in the peripheral. GPIO control register pad input and
parallel input register values are not affected by the
function output invert feature. GPIO interrupt detection
of an output is inverted if the invert polarity is enabled.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-11-30 11:29:22 +01:00
Jonas Otto
d3415e2ce1 drivers: spi_mcux_lpspi: fix baudrate change when switching devices
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.

Fixes #51177

Signed-off-by: Jonas Otto <jonas@jonasotto.com>
2022-11-30 11:28:22 +01:00
Gaël PORTAY
ffed8388e7 drivers: spi_context: fix some LOG_DBG warnings
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.

Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
2022-11-29 22:52:40 -08:00
Adrian Bonislawski
a45caf868f drivers: dai: add Intel HDA dai
add Intel HDA DAI driver
Long device list in dtsi needs to be refactored in the future

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-11-29 19:42:33 -05:00
Ederson de Souza
9c55195235 drivers/mm: Only remap unused RAM on Kconfig on Intel ADSP MTL
Remapping by default can confuse things that dynamically manage RAM,
such as newlib heap - since unused memory will be powered off by
default. So this patch shields this behaviour behind a non-default
Kconfig.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-11-29 18:03:09 -05:00
Gerson Fernando Budke
e68f568f86 drivers: counter: Enable support to stm32l5 mcu
Add driver entries to enable stm32l5 rtc driver.

Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2022-11-29 13:40:27 +00:00
Georgij Cernysiov
2b0727d550 drivers: clock_control: stm32h7: add PLL2 support
Adds PLL2 support.

The driver configures and enables PPL2 when
it is enabled in the DTS.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-11-29 11:54:52 +01:00
Gerard Marull-Paretas
a78bdbce89 dt-bindings: regulator: pca9420: reorganize headers/macros
pca9420_i2c.h has neem remamed to pca9420.h (device only has I2C, so
it's kind of redundant to have i2c in the header name).

pmic_i2c.h was again not generic but designed specifically for PCA9420.
All its macros have been renamed, s/PMIC/PCA9420, and moved to the
pca9420.h header.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
709f7c88f7 drivers: regulator: pca9420: store common config in parent device
Store all common configuration settings in the parent device. This
change should save ROM, since it avoids duplication.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
9219d3d2b5 drivers: regulator: pca9420: fix VIN current limit setting
The driver had a conceptual issue regarding current limitation. PCA9420
is able to limit the current flowing through VIN, ie input current. This
is a global setting, not individual to each regulator. This patch
creates a new DT property: nxp,vin-ilim-microamp to specify such limit.
It is applied when the device is initialized.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
dcd63d288f drivers: regulator: pca9420: refactor voltage range handling
Voltage ranges were hardcoded in Devicetree, however, things can be
significantly simplified by using the recently introduce linear ranges
API. All values are now computed using information stored in the driver,
so there is no need to store any lookup table in ROM. Code should now
both be faster in average and consume less ROM.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
1caedf12dd drivers: regulator: pca9420: do not expose registers in DT
Regulator registers were set for each BUCK/LDO in DT, likely because of
the way the devices were instantiated. When using a generic iterator,
ie, DT_INST_FOREACH_CHILD, there's no way to differentiate the child
being _parsed_. Since instantiation happens now based on child node
names, we are able to know which registers each devices gets assigned at
the driver level. This greatly simplifies Devicetree, and it actually
removes information that is not strictly hardware description from it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
9235ab90cc drivers: regulator: pca9420: remove unused modesel offset
The property was not used, and not defined in the bindings either.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
f4713fb7fb drivers: regulator: pca9420: fixed child instantiation
Right now the PCA9420 driver instantiates by iterating over all
children. This is somewhat problematic, for a few reasons:

- Since instantiation is generic code, we're forced to put internal
  details on Devicetree, e.g. reg-masks. After this change, this will no
  longer be necessary.
- We take all children, regardless of what is defined in DT.

While we have no means to validate Devicetree node names as in Linux
dtschema, this approach allows us to have per-child specific
initialization code. This is somewhat similar to the Linux approach.

Note: nodelabels have been removed, since they were not used.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
9f1d25a2d1 drivers: regulator: pca9420: do not use DT_PROP_OR for booleans
DT_PROP() will evaluate to 0 when a boolean property is missing, so
there is no need to use DT_PROP_OR(..., false). Using _OR also has
side-effects, such as no errors when property is not defined in the
bindings.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
f89405ca8d drivers: regulator: pca9420: use standard regulator-min|max-microvolt
regulator.yaml provides now standard properties for minimum/maximum
voltage.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
d4566ce2b6 drivers: regulator: pca9420: sort includes
Sort includes: stdc, Zephyr.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
ac7c8c810a drivers: regulator: pca9420: fix voltage|current_range types
- voltage/current needs to be stored using int32_t
- reg_val is a 8-bit unsigned register value
- Also removed __packet, it is not required here

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
7569de6af9 drivers: regulator: pca9420: rename some internal structs/funcs
Rename some internal structures/functions to clearly indicate they
belong to the PCA9420 driver.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Gerard Marull-Paretas
af590c4500 drivers: regulator: pca9420: improve instantiation code
- Constify configuration and curr. limits/voltage range/modes arrays
- Use common argument names: node_id, inst to make code more readable
- Improve macro names to make things clear

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-11-29 11:54:31 +01:00
Francois Ramu
acd582e456 drivers: flash: stm32 ospi flash driver for stm32l4plus mcus
Adaptation of the ospi nor flash driver for stm32l4 plus
where the peripheral is slighty different.
Configure the OSPIM peripheral for mcu embeddingthis peripheral
in front their octospi instances.
Add LOG for read access command like for write access.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-29 09:32:22 +00:00
Patryk Duda
b9f495282e drivers: flash: Do not unlock CR at the end of initialization
Unlocking CR at the end of initialization was added in commit
a9183cd518. It was probably copied
from previous flash driver implementation.

Unlocking and locking CR in write and erase functions was added in
commit 6e4cdb0c99. Since we always unlock
the register before writing or erasing, and lock it after the operation
is finished, there is no need to unlock it after initialization.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-11-29 09:50:28 +01:00
Arsen Eloglian
3659c2db4b intel_common: clean up & rename cavs_* to adsp_*
ADSP common definitions has been fixed
and changed from CAVS_* to  ADSP_*

Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com>
2022-11-28 17:45:20 -05:00
Evgeniy Paltsev
d2488d2160 ARC: control shared (common) interrupts via IDU
Control shared interrupts enabling/disabling via IDU.
With that we can easily enable and disable them for all cores
in one place.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-11-28 17:44:54 +01:00
Jaska Uimonen
f13b6bc125 drivers: dai: intel: dmic: fix periodic start
This fixes an issue with periodic_start feature that is only
present in newest dmic hw (starting from ACE).

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-11-28 17:43:58 +01:00
Andrei Emeltchenko
c0440c4706 drivers: eth_e1000: Allow several instances
Allow to enable several e1000 instances.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-11-28 13:19:51 +01:00
Andrei Emeltchenko
54bb10cf20 drivers: eth_e1000: Remove zero hadrcoded TDBAH, RDBAH
Though at the moment the driver works with high registers initialized
to zeroes it does make sense to do it right way. The double 16 shifts
are used to suppress warnings with 32 bit shift.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-11-28 13:19:51 +01:00
Mulin Chao
0893ca8c2f driver: gpio: npcx: correct the usage of npcx voltage flags
In npcx ec series, two detection levels, 3.3V (default) and 1.8V are
supported during gpio configuration. But the current implementation
always selects default detection level whether NPCX_GPIO_VOLTAGE_1P8 is
set. This PR is a fix for this issue.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-11-28 09:56:33 +00:00
Attie Grande
5f9cab9e80 drivers: flash: sam0: Resolve write issues in the first row
Previously, while writing close to the start of flash (i.e: in the first
row), the write was never committed - due to zero being used as the
"empty buffer" marker.

This patch also incorporates some performance improvements, as well as
observing any errors reported by `flash_sam0_commit()`.

Fixes #52309

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2022-11-28 10:49:09 +01:00
Dawid Niedzwiecki
2d93f03c25 driver: gpio: rt1718s: Add RT1718S GPIO driver
RT1718S is an i2c-based TCPC chip that supports 3 additional GPIOs.
The pins can be used for USB-C operations e.g. handling FRS, but they
can also work as usual GPIOs.

Add a driver for the RT1718S GPIO and a handler for an alert signal from
the chip. The handler reads the alert register once asserted and calls
the GPIO interrupt handler if needed(Vendor-defined alert).

gpio_rt1718s.c file and "richtek,rt1718s" node collect common properties
and data for all RS1718S functionalities. The file can be extended for
TCPC driver. rt1718s.h file also defines inline functions with i2c
operations common for all drivers. The common header and source files
can be moved to tcpc directories once the tcpc driver is added since it
is the main functionality.

Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
2022-11-28 10:48:53 +01:00
Brian Dunlay
a9ac0a884e drivers: wifi: eswifi: Offload sockets regression
This change fixes a regression from commit 1cbc0acd.

Socket offload uses a dummy socket context, and setting
the socket state in this dummy context is invalid.

Fixes #52317

Signed-off-by: Brian Dunlay <brian@nubix.io>
2022-11-28 10:48:10 +01:00
Armando Visconti
20ea61be35 drivers/sensor: lsm6dso: Add drdy_pulsed property in DT
Add drdy_pulsed property in Device Tree in order to select how
data ready irq should behave (either pulsed or latched mode).
Moreover change/fix the API called to set drdy irq mode.
(fix #51944)

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2022-11-25 20:03:21 +01:00
Artur Lipowski
c88e157c46 clock_control: stm32: Add extern C to allow including from C++.
The stm32_clock_control_init is needed for implementation of custom
pm_state_exit_post_ops.

Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
2022-11-25 20:03:10 +01:00
Tomasz Moń
12e244b184 drivers: usb_dc_native_posix: Allow endpoint disable after detach
There is no reason to prevent endpoint disable after detach.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2022-11-25 20:02:42 +01:00
Tomasz Moń
460ca86527 drivers: usb_dc_nrfx: Always allow endpoint disable
There is no point in allowing endpoint disable only when device is
attached and ready. Remove the pointless check as it is actually harmful
and prevents endpoints disable on USB stack disable.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2022-11-25 20:02:42 +01:00
Théo Battrel
e458f5aae6 Bluetooth: Use Zephyr standard log system instead of bluetooth/common/log
The `bluetooth/common/log.h` and `bluetooth/common/log.c` files have been
removed. Files that were using them have been updated to use
`zephyr/logging/log.h` instead.

Those replacement have been done consequently:
- `/BT_DBG/LOG_DBG/`
- `/BT_ERR/LOG_ERR/`
- `/BT_WARN/LOG_WRN/`
- `/BT_INFO/LOG_INF/`
- `/BT_HEXDUMP_DBG/LOG_HEXDUMP_DBG/`
- `/BT_DBG_OBJ_ID/LOG_DBG_OBJ_ID/`

Also, some files were relying on the `common/log.h` include to include
`zephyr/bluetooth/hci.h`, in those cases the include of `hci.h` has
been added.

For files that were including `common/log.h` but not using any logs,
the include has been removed and not replaced.

Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
2022-11-25 17:08:36 +01:00
Andrzej Głąbek
02653e13cf drivers: clock_control_nrf: Fix releasing/stopping of HFCLK
Routines called by users to release (and perhaps stop) the HFCLK
cannot synchronize with only the `hfclk_users` atomic variable,
because a thread can be preempted right after it clears the proper
bit in that variable but before the HFCLK is actually requested to
stop, and another user can then request the HFCLK to start. This can
result in HFCLK being stopped right after it was requested to start
and in `hfclk_users` holding an incorrect value.
Fix this by locking interrupts in those routines until the HFCLK is
stopped.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-25 10:45:50 +01:00
Johan Hedberg
7feb7ef914 pcie: shell: Use pcie_scan() for scanning for devices
Use the new pcie_scan() API instead of doing a brute-force scan.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2022-11-24 15:23:28 +01:00
Johan Hedberg
e4b8e97c1a pcie: Convert pcie_bdf_lookup() to use pcie_scan()
Use the commmon scanning framework instead of doing a custom brute-force
scan.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2022-11-24 15:23:28 +01:00
Johan Hedberg
b7343b28ac pcie: Convert PCIe device scanning to use pcie_scan() API
Take advantage of the new PCIe scanning API for doing the initial lookup
of PCIe devices specified for a given board.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2022-11-24 15:23:28 +01:00
Johan Hedberg
57c150af0c pcie: Add API for scanning for available endpoints
This adds a generic API to be used for scanning for available PCI
endpoints. It takes a more detailed approach than the "brute force"
based scanning that's so far been used in Zephyr, buy inspecting the
host controller node and bridge nodes, and only scanning for busses and
devices that are actually expected to exist.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2022-11-24 15:23:28 +01:00