Remove gpio_clock_names and gpio_mcux_lpc_config->clock_ip_name from
drivers/gpio/gpio_mcux_lpc.c.
The drivers/gpio/gpio_mcux_lpc.c file did not compile with xt-clang
RI-2021.8-win32, as the gpio_clock_names was initialised with a
reference to a static const array. The clock_ip_name member was
initialised from this variable, but it isn't used anywhere else.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
When the I2C is in the target mode and encounters the bus error, the
driver has to reset the bus to recover the I2C hardware. However, when
the hardware is disabled, the interrupt enable bits are also cleared
automatically by design. As a result, we need to enable the interrupts
after resetting the I2C hardware.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Add driver for NXP nx20p3483 power path controller that can be used
to control and protect sink and source path of USB-C connector.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add support for ppc shell command with subcommands that can print
the status of PPC (dead battery, sinking, sourcing, vbus detected),
dump registers and request the PPC to exit dead battery mode.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit adds an API to the Power Path Controllers (PPC) that
may be used with USB-C subsystem to control the current paths,
enabling and disabling sourcing and sinking VBUS and protect against
shorts, overvoltage and overcurrent.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
According to the clic specification
(https://github.com/riscv/riscv-fast-interrupt), the mnxti register has
be written, in order to clear the pending bit for non-vectored
interrupts. For vectored interrupts, this is automatically done.
From the spec:
"If the pending interrupt is edge-triggered, hardware will automatically
clear the corresponding pending bit when the CSR instruction that
accesses xnxti includes a write."
I added a kconfig `RISCV_SOC_HAS_CUSTOM_IRQ_HANDLING` to allow custom
irq handling. If enabled, `__soc_handle_all_irqs` has to be implemented.
For clic, non-vectored mode, I added a `__soc_handle_all_irqs`, that
handles the pending interrupts according to the pseudo code in the spec.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The mechanism for hardware vectoring has changed in the clic spec
(https://github.com/riscv/riscv-fast-interrupt) in 2019. Before
vectoring was enabled via `mode` bits in `mtvec`. Support for this was
added in fc480c9382.
With more current clic implementations, this does not work anymore.
Changing the `mode` bits is reserved. Vectoring can be enabled
individually in the `shv` bit of `clicintattr[i]`.
Since the old mechanism is still used, I added a new Kconfig for it.
If this Kconfig is not set, we use the `shv` bit for harware vectoring.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The trig field of clicintattr is indeed in bits 2:1. However, the mask
`CLIC_INTATTR_TRIG_Msk` is only applied directly to the bitfield
`INTATTR.b.trg`. Therefore it doesn't have to be shifted additionally.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
Add support of voltage control to Renesas PFC driver. Voltage register
mappings have been added to r8a77951 and r8a77961 SoCs.
Allow 'power-source' property for 'renesas,rcar-pfc' node. This property
will be used for configuring IO voltage on appropriate pin. For now it
is possible to have only two voltages: 1.8 and 3.3.
Note: it is possible to change voltage only for SD/MMC pins on r8a77951
and r8a77961 SoCs.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Modify the sequence of pinctrl setting. Default setting as input mode
prevents leakage during changes to extended setting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When device runtime pm is enabled on console device, do not suspend
device synchronously on each char transmission, but rather use asynchronous
suspension request.
This will save useless and costly suspension/resumption procedure, which
can involve uart device clock suspension but also pin configuration
to sleep state (which itself involves gpio clock activation ...).
On STM32, using asynch device suspension allows to divide by 3 the
transmission time of a character chain.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This change marks each instance of the 'i2c_driver_api' as 'static const'.
The rationale is that 'i2c_driver_api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The place where TF-M places its non-secure api header files has changed
Therefore changing it for for all applications that use it.
Signed-off-by: Markus Swarowsky <markus.swarowsky@nordicsemi.no>
This change renames the RX message buffer from g_hciRxMsg to rxmsg,
as it does not follow the Zephyr coding style.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This change relocates the tx/rx message buffer from the .bss section
to the .noinit section. This adjustment is aimed at reducing boot time by
lowering the size of the .bss section, without impacting the operational
functionality of the buffer.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add driver for NXP DMIC peripheral. This peripheral is present on the
iMX RT5xx and iMX RT6xx parts, as well as some LPC SOCs. The following
features are supported:
- up to 2 simultaneous channels of L/R PCM data (4 channels are not
supported due to limitations of the DMA engine)
- individual configuration of gain and filter parameters for each DMIC
channel input
The driver has been tested with up to 4 PCM data streams (2 L/R channels),
as well as the MEMS microphones present on the RT595 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add definition for DMIC clock source to LPC SYSCON clock control driver.
This constant allows drivers to get the DMIC bit clock frequency.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow the driver to compile without `CONFIG_NET_NATIVE_IPV4`. This can
happen if the driver is only desired for SSID scanning.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Master Inter-Data Idleness and Master SS Idleness
can configure with STM32 low level spi driver apis.
Signed-off-by: Mustafa Abdullah Kus <mustafa.kus@sparsetechnology.com>
Use proper errno.h error codes in pd_intel_adsp_set_power_enable()
instead of -1.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The write protect register (PWPR) found on RA Microcontrollers is an 8-bit
register at an odd address. It was being accessed using a pointer to a
uint32_t which causes a fault on some devices in the series.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
Add RGPIO gpio driver. This driver is used for i.MX93 and i.MX8ULP.
GPIO pinctrl, read/write and interrupt is supported. Runtime mmio
configuration is enabled, so no need for region definition in
mimx9/mmu_region.c
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Increase the busy wait time granularity while runing in simulation
for poll mode. In this mode, the driver spends a *lot* of time
waiting for the UART to be done. The smallest frame time is
~10µs @ 1Mbps, so busywaiting in very small increments
is very wastefull as we keep shuting down and turning on the simulated
MCU.
Let's increase the busy wait time increments of the driver to 3 micros,
which should not change much the behaviour.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
After #63289, multi-level interrupts are now encoded using macro
magic. This means that using the generic DT_INST_IRQ_BY_IDX() to
fetch the INTID is no longer an option as the queried INTID will
be the one specified through the node's `interrupts` properties.
To fix this, switch to using DT_INST_IRQN_BY_IDX() which will
return the correctly encoded INTID.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit implements parsing of the CESQ extended signal quality AT
command, extracting RSRP and RSRQ which is relevant for LTE connections.
It's used in the U-blox SARA-R5 modem instance. Furthermore, the IMEI,
IMSI is extracted in the same modem.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Now that STM32_LPTIM_CLOCK choice symbol is defined from device tree,
remove the prompt which was defining it as a user selectable entry.
Remove the warning related to possible symbol misalignment with
device tree setting.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The receiver ready flag of the (channel) status register
for the sam controller was not being interpreted correctly
for both the uart and usart implementation,
according to the uart api.
Tested and confirmed using the sam4sa16ca.
Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
As an example, when the gyro range is set to 250 deg/sec the scale
was set to 133 where it really should be 133.160058662. This leads
to a 0.12% error in the value returned. By separating the numerator
and denominator, we're able to drastically reduce the error.
Signed-off-by: Yuval Peress <peress@google.com>
The range map was sorted wrong since the function
bmi160_range_to_reg_val() that uses it checks for the user value less
than the range component of the bmi160_range struct. This means that
no matter what range is set, the value will always end up 2000dps.
Signed-off-by: Yuval Peress <peress@google.com>
Adding a hook for tests to inject a mock transport and migrating the
accel test to test bmi160 specific things. The old version of the test
which checks for read values is now covered by the generic test in
the sensor build_all target.
Signed-off-by: Yuval Peress <peress@google.com>
Add support for getting the following attribute values:
- SENSOR_ATTR_OFFSET
- SENSOR_ATTR_SAMPLING_FREQUENCY
- SENSOR_ATTR_FULL_SCALE
Signed-off-by: Yuval Peress <peress@google.com>
The logic in the driver was not aligned to the datasheet. Also,
temperature reading was not being done in fetch, but in channel_get.
There was also some extra conversions from SI->register->SI when
setting the range, this was causing the register value calculation to
produce an incorrect scale in some cases.
Tests were added to cover these cases.
Signed-off-by: Yuval Peress <peress@google.com>
Update the backend for sensor emulators to include a function for
setting the offset as well as a function to query an attribute's
metadata such as bounds and increment size. Additionally, add
backend support for setting the _xyz channel values.
Make the appropriate test changes to accomodate.
Signed-off-by: Yuval Peress <peress@google.com>
Ignore communication faults of the TLE9104 which are reported
before the communication watchdog is configured.
Fixes#67370
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Reduce some of the arithmetic required to decode a sample. Math is
documented in bma4xx_convert_raw_accel_to_q31.
This improved the accuracy from roughly 0.865mm/s2 to 0.001mm/s2 when
stationary and using a range of 4g.
Signed-off-by: Yuval Peress <peress@google.com>
ssize is a POSIX.1-2001 extension, which may or may
not be provided by the C library, or may be defined
to a different size in the host and embedded C library.
Two internal functions were returning ssize.
As these functions were just trampolines
into the same host API, which are already provided
by the native simulator let's just use those.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
ssize is a POSIX.1-2001 extension, which may or may
not be provided by the C library, or may be defined
to a different size in the host and embedded C library.
Two internal functions were returning ssize, but
one of them was a trampoline into the same host API,
which is already provided by the native simulator
so let's just use that instead.
The other is only carrying data that fits into an
int and is anyhow being cast in/to ints, so let's just
avoid the trouble by defining it as returning int.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The current driver initializes the IADC with the default configuration
(IADC_INITSINGLE_DEFAULT), which aligns the data to the right.
To correctly read the 12-bit sample, it should be masked from the right
instead.
Signed-off-by: Paulo Santos <pauloroberto.santos@edge.ufal.br>
Calling I2S write with less bytes than I2S TX memory block size makes it
possible to synchronize the time when next block is used against some
other, possibly externally sourced, signal. Example use case includes
USB Audio where audio sink and/or source has to be synchronized against
USB SOF. In Asynchronous synchronization type the rate matching is
achieved by varying the number of samples sent/received by 1 sample
(e.g. for 48 kHz audio, 47 or 49 samples are transmitted during frame
instead of 48).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Fix the log level of two LOG_ERR() statements which should have always
been LOG_INF(). As confirmed by the author Adrian in #60172
Fixes commit 3fbaed4de9 ("dai: intel: ace: dmic: Refactor of
dai_nhlt_dmic_dai_params_get function")
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
