Commit graph zephyr/drivers
Author SHA1 Message Date
Stefan Kraus
73eb7bb18a drivers: led_strip: ws2812_gpio: fix overwriting in loop
Due to the alias of ptr on pixels, one iterates over the same area
one reads from to set values. Therefore, if the strip is not 'RGB' but
GBR, one would overwrite the pixels 'r' value with the 'g' value in the
first loop, leading to a wrong read afterwards.

By writing to a temporary variable, we have a clean, unmodified copy
of the original values.

Additionally, this removes the dependency on 'LED_STRIP_RGB_SCRATCH',
as the scratch part (that masked most error cases) is not necessary
anymore.

Signed-off-by: Stefan Kraus <dev@stefankraus.org>
2025-09-29 09:58:19 +02:00
Sylvio Alves
49355813d3 drivers: entropy: espressif: enable TRNG in driver, not clock init
Move the TRNG peripheral enable from the clock/SoC init path to the
Espressif entropy driver init.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-09-29 05:50:56 +02:00
Sherry Li
d90d71c42c drivers: smbus: stm32: implement smbus_block_read
Smbus implementation for stm32 lacks of smbus_block_read(), so add the
functionality.

Fix some indentations.

Signed-off-by: Andrew Lewycky <alewycky@tenstorrent.com>
Signed-off-by: Sherry Li <xiaoruli@tenstorrent.com>
2025-09-28 14:14:35 -04:00
Marcin Niestroj
7fc8051b0f drivers: wifi: esp_at: return WIFI_STATUS_* connect error codes
Return `enum wifi_conn_status` after failed connection attempt. Parse
`+CWJAP:` messages to get failure reason.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2025-09-27 14:00:09 -04:00
Pisit Sawangvonganan
601f2fde6e drivers: serial: pl011: reduce device's base address accesses
In several functions, the UART registers are accessed multiple times
through the `get_uart(dev)` inline function. This results in repeated
dereferencing of the device's base address.

This commit caches the UART register struct pointer in a local variable
`uart` at the beginning of each relevant function.

For registers where repeated access is not needed, the value is read once
into a temporary variable. Modifications, if any, are applied to
the temporary copy, and the result is written back once.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-09-27 13:59:43 -04:00
Johann Fischer
4fe2c5bd5f drivers: udc: allow to use timeout Kconfig option on nRF54LM20A SoC
Kconfig option UDC_DWC2_USBHS_VBUS_READY_TIMEOUT depends on services
exclusively available for nRF54H20, but the option can also be used for
nRF54LM20A, where there are no service dependencies, and VREG can be
accessed by the driver directly. Let depend the option on the SOC
series, as the controller can be used by the different CPUs on the SOC.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-09-26 20:48:32 -04:00
Johann Fischer
0018e8d600 drivers: udc: cleanup depends in Kconfig.dwc2
Factor out UDC_DWC2 dependency.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-09-26 20:48:32 -04:00
TOKITA Hiroshi
c6608fcd80 drivers: virtio: Separate macros into a common header
Move macros derived from the VIRTIO specification to a shared include.
This change allows the VIRTIO standard definitions to be referenced
from outside the driver implementation.

The following definitions have also been added:

- VIRTIO_F_VERSION_1
- VIRTIO_F_ACCESS_PLATFORM
- VIRTIO_RING_F_INDIRECT_DESC
- VIRTIO_RING_F_EVENT_IDX
- VIRTQ_AVAIL_F_NO_INTERRUPT
- VIRTQ_USED_F_NO_NOTIFY

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-09-26 20:45:00 -04:00
Vincent Tardy
dc89803697 drivers: ieee802154: add support of 802.15.4 for STM32WBA
Add the driver itself and Kconfig/CMakeLists/dts/bindings related to it.
Other files and libraries needed are in ST's dedicated folder
hal_stm32 (modules/hal/stm32).

Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
2025-09-26 20:44:45 -04:00
Titouan Christophe
3993a739e9 drivers: i2s: ll_stm32: fix missing implementation for i2s_config_get
This fixes system crashes in `i2s_buf_write`, because this function
internally calls `i2s_config_get`, which resulted in a NULL pointer on
stm32 i2s devices.

Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
2025-09-26 16:02:02 -04:00
Chris Friedt
bc02f34f16 drivers: smbus: stm32: send block write byte count
Send "count" byte. The SMBus block write protocol requires this byte.

Use I2C_MSG_WRITE named flag instead of 0.

Signed-off-by: Andrew Lewycky <alewycky@tenstorrent.com>
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-09-26 16:01:44 -04:00
Shreehari HK
aa50860712 drivers: i3c: add open-drain speed support
Add SHELL support for configuring I3C open-drain speed modes.

Implementation:
- Include open-drain timing configuration inside cmd_i3c_speed function.

Signed-off-by: Shreehari HK <shreehari.hk@alifsemi.com>
2025-09-26 16:00:42 -04:00
Shreehari HK
c81b029fca drivers: i3c: configure open-drain speed
Add support for configuring I3C open-drain speed modes to handle
different timing requirements during bus initialization and operation.

Implementation:
- Fetch current controller configuration
- Invoke configure api inside bus_init to configure
  I3C open-drain high period for proper bus
  initialization and device compatibility.

The slow speed mode is essential for the first broadcast address
transmission to ensure visibility to all devices on the I3C bus,
particularly those in I2C mode that need to disable their spike
filters when switching to I3C mode. This requirement is specified
in "Table 49 I3C Basic Open Drain Timing Parameters" of the MIPI
ALLIANCE Specification for I3C Basic Version 1.2.

Signed-off-by: Shreehari HK <shreehari.hk@alifsemi.com>
2025-09-26 16:00:42 -04:00
Shreehari HK
4d6673bc69 drivers: i3c: dw: enhance open-drain timing configuration
This commit improves the I3C handling of open-drain
timing configurations with the following changes:
- Add OD minimum high_ns and low_ns DT properties
- Implement dw_i3c_init_scl_timing for runtime timing updates
- Initialize scl_od_min configuration from device tree
- Maintain backward compatibility with existing configurations

Requirement (MIPI Specification for I3C Basic v1.2 (16-Dec-2024),
             Section 4.3.11.2 & Table 49):
- The MIPI I3C specification mandates different open-drain speeds during
  bus initialization as defined in
  "I3C Basic Open Drain Timing Parameters".
- The first broadcast address (7'h7E+W) must be transmitted at a slower
  open-drain speed to ensure visibility to all devices on the I3C bus,
  including legacy I2C devices. This slow speed (minimum 200ns Thigh)
  allows I2C devices to properly detect the I3C mode transition and
  disable their spike filters before switching to I3C mode. After the
  initial broadcast, normal I3C open-drain speeds can be used for
  regular operation.

Signed-off-by: Shreehari HK <shreehari.hk@alifsemi.com>
2025-09-26 16:00:42 -04:00
Andrzej Głąbek
828bde8213 drivers: flash_mspi_nor: Add support for CONFIG_MULTITHREADING=n
Add possibility to use the driver in configurations with disabled
multithreading. It may be useful in bootloaders, for example.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-09-26 13:23:34 +02:00
Andrzej Głąbek
c8e3bfac1c drivers: mspi_dw: Add support for CONFIG_MULTITHREADING=n
Add possibility to use the driver in configurations with disabled
multithreading. It may be useful in bootloaders, for example.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-09-26 13:23:34 +02:00
Muhammed Asif
67a25f245d drivers: pwm: sam0: Add support for tc 32 bit mode
- Added logic for updating the registers for 32 bit when
   32-bit counter size is selected.

Signed-off-by: Muhammed Asif <asifp3104@gmail.com>
2025-09-26 13:23:07 +02:00
Yangbo Lu
bdb5c3072a drivers: eth_nxp_imx_netc: add promisc mode support
Added promisc mode support for eth_nxp_imx_netc.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-09-26 11:07:34 +02:00
Sean O'Connor
8115d9b453 drivers: i2s: nrfx: Allow MCK bypass for proper LRCK and MCK Ratios
nRF53 series SoCs have a dedicated configurable audio PLL and the ability
to enable MCK bypass via a register value CONFIG.CLKCONFIG. This can
enable higher MCK/LRCK ratios that some I2S peripherals require the host
to generate. Allow an application developer to choose if they want to
initially look for a bypass ratio and, if found, enable bypass in the
NRFX driver. If not, the standard MCK calculation is conducted as normal.

Signed-off-by: Sean O'Connor <sean@standalone.tech>
2025-09-26 11:07:12 +02:00
Hou Zhiqiang
7476c5278d drivers: scmi: nxp: fix build warning
When none of the configs is enabled, it will reports the following build
warning:

CMake Warning at zephyr/CMakeLists.txt:1096 (message):
  No SOURCES given to Zephyr library: drivers__firmware__scmi__nxp

  Excluding target from build.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-09-26 06:40:56 +02:00
Cla Mattia Galliard
31b067482a drivers: power_domain: gpio: Use k_timepoint_t for absolute time
Use k_timepoint_t instead of k_timeout_t for absolute time to avoid
ambiguity and ensure the code works even when CONFIG_TIMEOUT_64BIT=n.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-09-25 14:19:04 -04:00
Cla Mattia Galliard
52f1133806 drivers: gnss: quectel lcx6g: Fix overflow by using timepoint-API
Make use of the timepoint-API to fix a potential 32-bit unsigned int
overflow in this driver.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-09-25 14:18:54 -04:00
Declan Snyder
1481755acb drivers: uart_mcux_flexcomm: Refactor low power state handle
Refactor low power state handling to not tie to zephyr,disabling-states
and define it's own separate "low power states" property in DT instead.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-09-25 14:18:05 -04:00
Franck Duriez
cfbe64934e driver: pwm/pca9685: remove unimplemented misleading property
Invert property was not implemented and is now redundant with the flag
pwm-cell which is more flexible in case you want some IO to be inverted
and some not

Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>

# Conflicts:
#	doc/releases/migration-guide-4.3.rst
2025-09-25 14:17:15 -04:00
Franck Duriez
ae889020bc driver: pwm/pca9685: handle POLARITY flag
Handle polarity flag in pca9685 driver

Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>
2025-09-25 14:17:15 -04:00
Nikodem Kastelik
376ca571b0 drivers: i2c: nrfx_twis: fix missing SoC header include
In case of nRF TWIS i2c shim, SoC header include is needed
for memory region property presence checker macro.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-09-25 12:01:40 +01:00
Krzysztof Chruściński
e1f9de7842 drivers: clock_control: nrf: Fix missing clock started callback
804e502484 fix got reverted as it introduced a bug where callback
with HFCLK started indication was not called because state is not
correctly indicated. BT-dedicated API does not set state and does
not expect to get the callback when HFCLK is started. 804e502484
was intended to fix the bug that was visible on nrf54lx. It was not
visible on nrf52 because of a errata workaround which was calling
HFCLK started callback only when state was set to STARTING and that
was not the case when BT-dedicated API was used. Applying this
`workaround` approach to all cases.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-09-25 11:00:28 +02:00
Krzysztof Chruściński
04464f5d60 Revert "drivers: clock_control: nrf: Add missing flags clearing"
This reverts commit 804e502484.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-09-25 11:00:28 +02:00
Mario Paja
f52855b048 drivers: memc: add driver for stm32 ospi psram
Add a driver for STM32U5 OSPI PSRAM in memory mapped mode.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-09-25 09:24:59 +02:00
Michał Stasiak
50195f82ac drivers: i2c: i2c_nrfx_twim: add conditional PM ISR safety
Requesting/releasing TWIM device may be ISR safe, but
it cannot be reliably known whether managing its power
domain is. Is is then assumed that if power domains are used,
device is no longer ISR safe. This macro let's us check if
we will be requesting/releasing power domains and determines
PM device ISR safety value.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-09-25 09:22:45 +02:00
Michał Stasiak
63a03c6306 drivers: spi: spi_nrfx_spis: add conditional PM ISR safety
Requesting/releasing SPIM device may be ISR safe, but
it cannot be reliably known whether managing its power
domain is. Is is then assumed that if power domains are used,
device is no longer ISR safe. This macro let's us check if
we will be requesting/releasing power domains and determines
PM device ISR safety value.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-09-25 09:22:45 +02:00
Michał Stasiak
a0b008bef4 drivers: sensor: qdec_nrfx: add conditional PM ISR safety
Requesting/releasing QDEC device may be ISR safe, but
it cannot be reliably known whether managing its power
domain is. Is is then assumed that if power domains are used,
device is no longer ISR safe. This macro let's us check if
we will be requesting/releasing power domains and determines
PM device ISR safety value.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-09-25 09:22:45 +02:00
Peter Wang
769f73bf17 drivers: reset: nxp: add nxp_mrcc_reset driver
1. the MCXA family use MRCC to reset peripheral
2. MRCC register, 0: hold in reset, 1: release from reset
3. usage as blow
syscon: syscon@xxx {
    ...
    reset: reset {
        compatible = "nxp,mrcc-reset";
        #reset-cells = <1>;
    };
};

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-09-25 09:22:06 +02:00
Zhaoxiang Jin
5447679c03 drivers: regulator: Enable nxp vrefv1
Enable nxp vrefv1 driver

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-09-25 09:21:18 +02:00
Zhaoxiang Jin
16db983408 drivers: sim: Enable vref clock through sim driver
Enable vref clock through sim driver

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-09-25 09:21:18 +02:00
Zhaoxiang Jin
bf12516cb4 drivers: adc16: Enhance ADC16 driver.
1. Add new 'has-differential-mode' property to indicate
whether the ADC16 instance supports differential mode.
2. Enabled ADC16 differential mode.
3. Enabled ADC16 reference voltage selection.
4. Enabled ADC16 acquisition time configuration.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-09-25 09:21:18 +02:00
Khoa Nguyen
2d661e1c19 drivers: mbox: Add support MBOX driver for Renesas IPC
Add support MBOX driver for Renesas IPC hardware IP

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-09-25 09:19:57 +02:00
Jason Kridner
1f03dcfa0c cc13xx_cc26xx: select CRC with SubG driver
This was previously only selected when the 2.4GHz driver was
enabled, but SubG can be enabled without the 2.4GHz driver.

Build tested using:

```
west build -b beagleconnect_freedom -d \
 build/bcf/ot_coap samples/net/openthread/coap
west flash -d build/bcf/ot_coap
```

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
2025-09-24 19:20:49 -04:00
Gerard Marull-Paretas
4a4a94bbff drivers: clock_control: sf32lb_rcc: add support for DLL2
Add support for configuring and enabling DLL2. A few things have been
simplified (common PMUC, just store frequency, etc.).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-09-24 19:19:58 -04:00
Aksel Skauge Mellbye
d52ff0894a drivers: entropy: gecko: Configure for all xg27 socs
Use cryptoacc variant on all xg27 socs.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-09-24 19:19:16 -04:00
Thomas Schmid
bab5484ed8 sensor: mcp9600: extend driver functionality
Add support for runtime and devicetree configuration of themocouple
type, ADC resolution, filter coefficient and cold junction temperature
resolution. Extend device specific sensor channels to include cold
junction temperature, delta tempereature, hot junction temperature and
raw ADC values while still maintaining backwards compability with the
existing SENSOR_CHAN_AMBIENT_TEMP channel.

Signed-off-by: Thomas Schmid <tom@lfence.de>
2025-09-24 19:18:43 -04:00
Zhaoxiang Jin
ece35a420b drivers: adc: Add DT properties to lpadc binding
Introduce new binding properties for the LPADC DT
and update the driver to consume them.
Users can use these properties to obtain the opamp
device bound to the ADC and dynamically adjust the
opamp gain so that the opamp output is within the
ADC ideal sample range.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-09-24 19:18:11 -04:00
Zhaoxiang Jin
bb73dd0b3a drivers: opamp: Add NXP opamp driver implementation
This commit includes the following changes:
1. Add top level CMakeLists.txt entry and Kconfig.
2. Add bindings for opamp-controller.
2. Add bindings for nxp,opamp and nxp,opamp_fast.
3. Implemented NXP opamp and opamp_fast device driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-09-24 19:18:11 -04:00
Zhaoxiang Jin
b47fbbb434 drivers: clock: Add opamp clock to syscon
Add opamp clock to syscon

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-09-24 19:18:11 -04:00
Johan Alfvén
ec72295251 drivers: misc: ethos_u: add fast-memory-region support
Add optional fast-memory-region property to the Ethos-U driver. When
present in the devicetree, the driver passes the region base and size
to ethosu_init(), allowing platforms to use dedicated SRAM for improved
NPU performance.

If the property is not specified, the driver falls back to using NULL/0,
keeping existing behavior unchanged.

Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
2025-09-24 15:51:24 +01:00
Hake Huang
30e31fa0d0 drivers: WM89xx: fix a dts prop naming issue
1. the clock-source is wrongly typed as clk-source,
which happen to pass the build and function check.
2. and should use DT_INST_ENUM_IDX for index enumrate
as string.

Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-09-24 15:50:49 +01:00
Alain Volmat
297eb52fde drivers: mbox: stm32-hsem: build driver if DT enabled
Default to building the driver if its node is enabled in
the device-tree, avoiding the need to manually set
CONFIG_MBOX_STM32_HSEM.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-09-24 15:50:40 +01:00
Andrzej Głąbek
30c4130b24 drivers: mspi_dw: Add option to offload handling of FIFOs
Provide a Kconfig option that allows offloading handling  of the SSI
FIFOs, which the driver normally executes in the interrupt handler,
to the system workqueue.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-09-24 11:29:44 +01:00
Bjarki Arge Andreasen
9a6dba9bd6 drivers: power_domain: nrfs_gdpwr: depend on multithreading
The NRFS GDPWR device driver requires NRFS which requires
multithreading. Add dependency to Kconfig for the device driver
to exclude it when building for single threaded apps like
mcuboot.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-09-24 11:29:27 +01:00
Kamil Krzyżanowski
bd344be413 drivers: serial: stm32: use hardware rx timeout interrupt when available
Use the RTO interrupt for RX timeouts when using the async API.
The workqueue based approach is sensitive to load and has a higher latency
than using hardware timeouts.

Signed-off-by: Kamil Krzyżanowski <kamnxt@kamnxt.com>
2025-09-24 09:42:33 +02:00