Fix the scope of some variables in various STM32 drivers including:
- SDMMC
- DMA
- OSPI/QSPI Flash
- Interrupt controller
The variables are set static instead of global and const if appropriate.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The IEEE 802.15.4 radio driver encodes attributes in:
* little endian for everything that is close to the protocol as
IEEE 802.15.4 frames are little endian encoded.
* mixed big and little endian in its configuration where extended
addresses are being represented. These inconsistencies are unfortunate
but cannot be easily fixed in a backwards compatible way so will be
left untouched in this change.
Endianness was almost nowhere documented which explains these
inconsistencies and led to several bugs where assignments of different
byte order are not converted (or sometimes converted, sometimes not).
This change documents intended endianness within the realm of the
IEEE 802.15.4 radio driver code. Conversion bugs are fixed in a separate
commit.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
STM32F107 has an Ethernet MAC but no PTP clock, so remove hard requirement
on PTP clock definition in preparation for STM32F107 Ethernet MAC support.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Add support for setting the target mode for a PMIC regulator. Some
regulators support multiple modes, each with distinctive voltage and
current configuration data. This function allows the consumer to switch
the PMIC into a new mode. The PMIC can then be configured to use a new
set of voltages.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move I2C register reads to regulator_read_register in regulator driver,
to enable better abstraction of regulator I2C reads
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor binding to use root PMIC IC, so that properties can be shared
between regulator devices. Each individual regulator output is still
created as an individual device, since the regulator API aligns with
these devices better than the PMIC IC itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The code was missing #include <zephyr/kernel.h> which
caused a compilation error. Missing header has been added.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Propagate vendor specific events that are not handled by the SPI driver
up the host stack, so that `bt_hci_register_vnd_evt_cb` can work
correctly.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
For 32 bit processor to read the 64 bits hpet counter, the HPET spec
2.4.7 suggest to read HPET counter high and low then checking the
high bits to decide if it rollovers or not.
But this logic seems to cause problem for 64 bits processor under SMP,
there is a possible one tick earier under tickless mode. It is likely
to be the cache coherence issue, because a mfence instruction before
reading the timer works.
So we change to read the 64 bits counter by sys_read64 on 64bit
processor to prevent this issue.
Fixes#49611
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
The `ARCH` init level was added to solve a specific problem, call init
code (SYS_INIT/devices) before `z_cstart` in the `intel_adsp` platform.
The documentation claims it runs before `z_cstart`, but this is only
true if the SoC/arch takes care of calling:
```c
z_sys_init_run_level(_SYS_INIT_LEVEL_ARCH);
```
Which is only true for `intel_adsp` nowadays. So in practice, we now
have a platform specific init level. This patch proposes to do things in
a slightly different way. First, level name is renamed to `EARLY`, to
emphasize it runs in the early stage of the boot process. Then, it is
handled by the Kernel (inside `z_cstart()` before calling
`arch_kernel_init()`). This means that any platform can now use this
level. For `intel_adsp`, there should be no changes, other than
`gcov_static_init()` will be called before (I assume this will allow to
obtain coverage for code called in EARLY?).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previously, the build was failing due to implicit declaration
of `IRQ_CONNECT`. Simply include `<zephyr/irq.h>` to fix.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
MTL is just one platform and this code is going to be used in multiple
platforms currently under development, so reduce the confusion and move
to a common namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Cleanup soc.h and move interrupt defines into own headers. Rename some
of the defines for ACE to have a unified namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The DW register block was duplicated into the ACE header while we had
the same thing in the driver. Move everything to the driver as the first
step with further improvements planned on top of this.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
mcux HAL pollutes namespace with stuff like ARRAY_SIZE, MIN, MAX, etc.
Luckily it only defines them if not already defined, so we can play with
include order to "fix" the problem. Move the infamous soc.h (which
includes HAL) after other Zephyr includes.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Register definition header was missing, SoC common header as well (for
ite_intc_get_irq_num).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some headers made use of types defined in sys_clock.h (e.g. k_timeout_t)
without including it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some files using time_units.h API did not include it, e.g. for
sys_clock_hw_cycles_per_sec.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some files were using arch interfaces (e.g. arch_curr_cpu) without
including necessary headers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some SoCs define stuff in soc.h, used in drivers or SoC code. Note that
soc.h is not introduced here as a catch-all header. soc.h optimizations
or removal is out of the scope of this patch.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
With the incoming removal of kernel.h/types.h from init.h, lots of files
start to show compile errors because they relied on indirect
definitions, including errno.h.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previous commit removed pinmux from the platform but neglected to
remove the dependency in this Kconfig resulting in build failures
when target application configures GPIO support.
Fixes#51144
Signed-off-by: David Leach <david.leach@nxp.com>
This was all done as part of the soc and called from the soc. Define
this type of console under drivers/console and use it in the SoCs
supporting that via SYS_INIT instead of calling the console code
directly.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fixes a compiler error in eth_xlnx_gem_stats() caused by the
automated replacement of device run-time data pointer accesses
by #41918. The device run-time data access in eth_xlnx_gem_stats()
was likely missed as this function is not usually compiled - its
existance depends on CONFIG_NET_STATISTICS_ETHERNET being set.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
If the flash is used in 4-byte addressing, reading SFDP will fail after
a system reset if the flash isn't power cycled or hardware reset, since
Zephyr will try to use 3-byte addressing while the flash (still) expects
4-byte addressing.
This commit adds the ability to send a reset command to the flash as part
of initialization, which complements the existing reset-gpio
functionality, and is useful on low-pincount flashes which do not have a
hardware reset.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
The build of this driver fails when `CONFIG_NO_OPTIMIZATIONS=y` is set:
error: expression in static assertion is not constant
98 | BUILD_ASSERT(steps > 0, "only positive number valid");
error: expression in static assertion is not constant
99 | BUILD_ASSERT(steps <= 2048, "overflow possible");
Fix this by using a simple macro to avoid the compiler from getting
confused.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Change reduces time consumed when a block needs to be erased.
The change was tested on a mimxrt1060_evk board.
Signed-off-by: Dipak Shetty <dipak.shetty@zeiss.com>
Add shell for interacting with regulator devices, to enable
users to test power management settings quickly and verify that their
regulator is functioning as expected. Also allows users to interact with
regulator PMIC devices
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The #48905 introduce a regression on gmac ethernet driver. The GMAC
driver matches two compatibles. This add missing compatible for SAM0
variant.
Fixes: #50970.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Clean up and refactor x86 SoC headers in preparation of adding
new platforms in the future.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
add common mec_gpio.h to allow access to common gpio_regs
structure for both mec15xx and mec17xx, used in pinctrl driver
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
It is better to use 64-bit variable types for calculating the number
of elapsed ticks than 32-bit variable types. This guards against the
propagation of calculation errors should the lower 32-bits of the timer
counter roll over multiple times before the timer ISR is serviced.
(Such a scenario can easily occur when pausing the system for an
extended period of time with a debugging device such as a Lauterbach.)
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Instead of using "select" on certain EC configurations, which is
considered unsafe for various reasons, use a "depends on" and rely on
the user to set a proper configuration in the config file.
Update the respective project configurations to comply with the new
configuration scheme.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Added support for the AMS AS621x series of temperature sensors as a
variant of the TI TMP108 temperature sensor.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Signed-off-by: James Johnson <james.johnson672@t-mobile.com>
Host interface interrupts should be enabled explicitly via eSPI API
after the eSPI configuration and callbacks are set.
If we enable them during driver initialization and the host sends a eSPI
transaction before the eSPI configuration and callbacks are set, we may
encounter unexpected behavior.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Implements dynamic configuration for the atmet,sam-usart driver and
enables the new API calls if CONFIG_UART_USE_RUNTIME_CONFIGURE is set.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Implements dynamic configuration for the atmet,sam-uart driver and
enables the new API calls if CONFIG_UART_USE_RUNTIME_CONFIGURE is set.
Signed-off-by: Nick Kraus <nick@nckraus.com>
This commit adds two new commands to flash shell tools: flash load and
flash page_info.
Signed-off-by: Franciszek Zdobylak <fzdobylak@internships.antmicro.com>
Some files still manage to get into the tree without the zephyr/ include
prefix (likely because they lack CI coverage).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use fifo address from device tree to create the device structs.
Also modify shim initialization as it was changed from array to
int. Fix cosmetic tab in device init macro.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Previously, the I2C bus would have an extended idle period on write
operations, and a spurious trailing byte on read operations (after a
final NACK).
This patch relocates the issuance of the stop condition from the driving
thread's context, into the ISR.
Thanks to @benediktibk for discovery and initial patch.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
espi_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
gpio_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
pwm_set_chan_level uses slice channels A(=0) or B(=1) and not Zephyr
channel (0..15). So PWM doesn't work for channels > 1. There is already
a function (pwm_rpi_channel_to_pico_channel) which does the right thing,
but it isn't used for pwm_set_chan_level.
Signed-off-by: Jan Hilsdorf <jan.hilsdorf@gmail.com>
Rename Z_DEVICE_DT_DEV_NAME to Z_DEVICE_DT_DEV_ID to make it more clear,
as the macro is generating a token that identifies the created struct
device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace the hardcoded kPWM_Prescale_Divide_128
driver prescaler with the ones defined in the dtsi file
that allow overriding them by the user.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Add a new Kconfig and build this code conditionally, so we do not end up
with this file being built for each zephyr app.
Partial fix for #50654
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit adds a driver to simulate GPIO state and interrupts
using the keyboard when using SDL.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add 2 properties to configure the "any movement" event.
* Ability to disable the interrupt latch
* Select movement mode
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
It's useful for RAMABLE_REGION to have a uniform name when
CODE_DATA_RELOCATION is supported, because otherwise the build system
needs to be aware of how the region name differs between architectures.
Since architectures tend to prefer one of 'SRAM' or 'RAM' for that
region, prefer to use 'RAM' as the more general term.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Some systems may need to query the available memory regions in runtime.
For those, this patch adds a simple API that memory management drivers
can implement to provide such discovery.
A small test also added to exercise the default, empty implementation.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This will use DW_CFGH_DST instead of DW_CFGH_DST_PER
to correctly setup cfg_hi. This is critical for ALH transfer.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
This will trigger link commit immediately after start
to fix hda start flow.
Applies to link out only.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
For HDA link suspend is exactly the same as stop
but the same api is used also to control gpdma with unique suspend
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Zephyr encodes multi-level interrupts in a certain way, and
the driver is not utilizing the encoding correctly. So fix
it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Input pins in ESP32 (34 to 39) have no pull-up / pull-down internally.
Current behavior is that gpio driver fails when "disabling it", which
should not happen. It need to fail only when enabling this feature.
Fixes#50615
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Remove modem_cmd_handler_tx_lock lock when CONFIG_GSM_MUX
is disabled, as modem_cmd_handler_tx_unlock is under the same
conditions.
Signed-off-by: GUITTER Pierrick <pguitter@silicom.fr>
Those Kconfig options are no longer used after ESP32 WiFi driver was
converted to Zephyr WiFi mgmt and the removal of platform specific
`samples/boards/esp32/wifi`.
Fixes: d524015f82 ("samples: boards: remove esp32 wifi sample code")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Driver is not ready to handle NET_REQUEST_WIFI_CONNECT wifi_mgmt events
before ESP32_WIFI_EVENT_STA_START event is received. Revert back to setting
NET_IF_NO_AUTO_START flag for interface and call net_eth_carrier_on() after
ESP32_WIFI_EVENT_STA_START event is received. This makes it possible for an
application to wait for network interface to be ready, e.g. with:
while (!net_if_is_up(iface)) {
k_sleep(K_MSEC(100));
}
before making a connect request with:
net_mgmt(NET_REQUEST_WIFI_CONNECT, iface ...).
Fixes: 7d9edc8bf0 ("wifi: esp32: add support to wifi api mgmt")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Abort any pending transmissions before entering configuration mode and
notify the senders.
Poll for mode change completion instead of assuming mode changes take
immediate effect. This is needed for successfully entering configuration
mode with recently aborted transmissions.
Fixes: #50545
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Abort any pending transmissions before entering freeze mode and notify the
senders.
Fixes: #50545
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
This saves approximately 500 bytes of SRAM on the lpcxpressso55s16 board
when running in default configuration.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
This saves approximately 500 bytes of SRAM on the frdm_k64f board, while on
the mimxrt1024_evk board the saving is approximately 2.5 kbytes of SRAM,
both when running in default configuration.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Provide a default, internal callback to CAN controller drivers
implementation of can_send() if no callback was provided by the caller.
This allows for simplifying the CAN driver implementations of can_send() as
these no longer need special handling for callback/no callback operation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set the synchronous clock mode to HCLK/1 (DIV1) or HCLK/2 (DIV2)
Both are valid common clock setting values.
The HCLK/1 (DIV1) is possible only if the ahb-prescaler = <1>
in the RCC_CFGR (see DTS).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On power on reset, after disable advanced power safe mode,
you need to wait a delay before write again in the device.
The missing wait produce random initialization failure.
See §4.4 of the datasheet "bst-bmi270-ds000.pdf"
Signed-off-by: William MARTIN <william.martin@power-lan.com>
SAM V71 Xplained Ultra failed to re-enumerate on the bus after device
detach-attach sequence. The device was recognized by the host, but it
was not responding to control transfers, i.e. it was not acknowledging
SETUP data. Make device acknowledge SETUP data by reconfiguring EP0
when necessary.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Device physically detaches when the DETACH bit is set. Fix the
assignment to actually set the bit instead of clearing it.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
If the thread that submits data over spi is interrupted by a higher
priority thread while pushing data to the tx fifo the hardware pushes
data to spi and frees up space in the fifo. In this case more than
8 Bytes are written to the tx fifo and bytes in the rx fifo get lost
before they are collected in the rx while loop.
To avoid this, the tx loop is exited after a maximum of 8 bytes and the
rx loop will run until it collected all bytes from the rx fifo.
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
This Commit makes the adc configuration correct
for using the adc with 12b conversion on the stm32wl.
TriggerSource must be set to SW.
The ADC clock must be disabled by clock gating during CPU1 sleep/stop.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. To explicitly set the MSG_START flag on the first message.
2. Remove redundant declare.
3. Using data->msgs->flags is the correct address instead of
msgs->flags.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The note refers to the wrong API, that has been replaced by a pinctrl
call, update the comment.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add code to handle parsing the gpio-reserved-ranges property present on
iMX GPIO controllers, so that gpio controllers with gaps in their pin
indexing can still have pinmux settings applied correctly.
Fixes#50142
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
A specific check is implemented lptim driver in order to ensure global
platform clock/tick configuration is in line with recommendations.
To respect portability principles, don't error out when a config
conflict is detected but generates a warning instead.
Also, since these are only recommendations, provide an option to override
the check. Besides automatically override when ZTEST is enabled, as some
kernel tests specifically configure tick freq to 100.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 qmspi. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 adc. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 pwm. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 espi. Update board dts, pinmux and espi driver
files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Introduce a function to do the matching job. Add the config for some
platforms to match the mpdir with aff0 only.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Some platforms only use aff0 to match mpdir and GICR.aff. Introduce
GIC_V3_RDIST_MATCHING_AFF0_ONLY to set the matching method only using
aff0. With this config enabled, the matching function will find the
target redistributor by comparing the aff0 only.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Sometimes it is desired for the USB device to detach and reattach itself
to the host. USB device controller driver interface supports detach with
usb_dc_detach() function. Subsequently the device can be reattached to
the bus by calling usb_dc_attach().
USB device stack sets the control transfer callbacks in usb_enable().
Nordic usb_dc_detach() implementation inadvertedly overwrote registered
callbacks with zeroes by clearing endpoint configuration structure. This
lead to a NULL pointer dereference during enumeration after device has
reattached inself to the host.
Preserve the callbacks by removing the eps_ctx_uninit() function.
Endpoints runtime data is initialized in usb_dc_attach() so this should
pose no problems.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The cast for the offset variable will make incorrect register
access when it is over 0x80. Change the char cast to unsigned
char to fix it.
Fixes#49803.
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
The ADC of the stm32U5 should also waits for the ready Flag
before enabling the peripheral, then wait for the ready Flag
set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The receive path for the Renesas R-Car CAN controller supports two RX
FIFOs, which are currently configured for standard 11-bit CAN ID data
frames in FIFO0, and extended 29-bit CAN ID data frames in FIFO1.
As this leaves no room for matching remote transmission request (RTR)
frames, have the driver return -ENOTSUP instead of silently accepting RTR
filters.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
In STM32U5 as well it is required to enable VDD before use.
Difference is that U5 enables this under PWR_SVMCR_IO2SV flag.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The usb_dc_sam0 driver is leaking memory when the usb device is detached
using usb_disable().
When a device is detached, the driver does not reliably deallocate the
descriptor bank memory. Therefore, upon the next attach and configure,
another block of memory is allocated. After several connect /
disconnect sequences, the usb interface becomes unresponsive.
This commit adds a static function to release all memory allocated
to the ep descriptors when usb_dc_detach() is called. Since detach is
called from usb_disable(), this releases the memory when the
interface is disabled.
Avoid calling k_free() if buffer pointer is already
set to NULL.
Fixes#49177
Signed-off-by: Steven Slupsky <sslupsky@gmail.com>
... so that the pin keeps the inactive state of the CSN line when it is
not controlled by the QSPI peripheral and the driver is not suspended.
Currently, the nrf_qspi_nor shim deinitializes the nrfx_qspi driver
after each operation, what leaves the pin uncontrolled until a new
operation is requested (and the nrfx_qspi driver is initialized again)
or the driver is suspended (and the pin is put into low-power state).
This can cause the flash chip to needlessly consume current when there
is no pull-up resistor on its CSN line and the line appears active.
Prevent this by keeping the pin in a defined (inactive) state.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is a follow-up to commits 9974bb043f
and 00ecc66677.
Add one missing `#ifdef CONFIG_PINCTRL` and remove a no longer needed
one to restore the possibility to use this driver without PINCTRL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the FSL_FEATURE_MCG_FFCLK_DIV define to decide if we should
call the api to get Fixed Frequency Clock.
This fixes Issue #49924
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Missing include to compile correctly when the
CONFIG_PM && IS_UART_WAKEUP_FROMSTOP_INSTANCE are defined
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add BUILD_ASSERT to check max val of ngpios. If someone sets ngpios to
more than 32, and acts on pin 32 or higher, memory corruption will
result. This is only a problem with the emulator, real hardware
will have limits that are probably much smaller.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
The return values of esp_wifi_set_mode(), and esp_wifi_set_config() were
overwritten once esp_wifi_start() is executed.
This commit fixes that by ORing the return value to the others.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
PR #49550 missed adding proper RTCIO pin mapping
in a few rtcio functions calls, which causes board
to crash. This fixes it.
Closes#50238
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
With the move to start/stop functions the transceiver is not expected
to be enabled after driver initialization.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The USART or LPUART, especially on stm32wl, must set the EXTI
lines corresponding to the wakeUp source.
This LL_EXTI_LINE_xx is given by the Device Tree property.
This makes the system exiting lowpower stop mode on EXTI irq.
The LL_EXTI_LINE_x is exactly the bit(X) set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix the issue that the initialization will fail when both
CONFIG_SPI_NOR_SFDP_RUNTIME and CONFIG_SPI_NOR_IDLE_IN_DPD are enabled.
The cause of this problem is simply calling the wrong function.
Fixes#33015
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Previously, the lora_send() function would have returned zero regardless
of any error encountered while waiting for the transmit to complete.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Up until now, the Zephyr CAN controller drivers set a default bitrate (or
timing) specified via devicetree and start the CAN controller in their
respective driver initialization functions.
This is fine for CAN nodes using only one fixed bitrate, but if the bitrate
is set by the user (e.g. via a DIP-switch or other HMI which is very
common), the CAN driver will still initialise with the default
bitrate/timing at boot and use this until the application has determined
the requested bitrate/timing and set it using
can_set_bitrate()/can_set_timing().
During this period, the CAN node will potentially destroy valid CAN frames
on the CAN bus (which is using the soon-to-be-set-by-the-application
bitrate) by sending error frames. This causes interruptions to the ongoing
CAN bus traffic when a Zephyr-based CAN node connected to the bus is
(re-)booted.
Instead, require all configuration (setting bitrate, timing, or mode) to
take place when the CAN controller is stopped. This maps nicely to entering
"reset mode" (called "configuration mode" or "freeze mode" for some CAN
controller implementations) when stopping and exiting this mode when
starting the CAN controller.
Fixes: #45304
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds a very basic driver to utilize the I3C IP block
on MCUX (e.g. RT685). Note that, for now, this only supports
being the active controller on the bus.
Origin: NXP MCUXpresso SDK
License: BSD 3-Clause
URL: https://github.com/zephyrproject-rtos/hal_nxp
Commit: 2302a1e94f5bc00ce59db4e249b688ad2e959f58
Purpose: Enabling the I3C controller on RT685.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds support for a global workqueue so drivers can defer
IBI callbacks instead of doing it in interrupt context.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Currently, the sdhc_card_busy function is unimplemented in the
SDHC SPI-driver. This causes some functions which rely on f_sync(),
such as fs_close(), to fail as it will timeout the busy-check. This PR
implements sdhc_card_busy by checking if the MISO-line is kept high to
check if the SD-card is idle (not busy).
Solves https://github.com/zephyrproject-rtos/zephyr/issues/49982
Signed-off-by: Ivan Herrera Olivares <ivan.herreraolivares@uantwerpen.be>
1. enable timer5 on dts
2. Replace all BTMR_Type with struct btmr_regs, to make it compatiable
on both mec 15 and 17
3. As MEC15 and MEC17 have different ways to access the register, use
"#if defined" to access counter_cfg->girq_id on different board.
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
Ensure that the FIFO of each endpoint is initialized during endpoint
configuration, to prevent a NULL FIFO from being encountered during the
first call to usb_dc_ep_write() for a given endpoint.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Add the flash channel support by implementing the controller attached
flash sharing APIs, including flash_read, flash_write, and flash_erase.
For flash_read, the max data payload the module can support is 64 bytes
in one transaction.
For flash_write, the max data payload the module can support is 16
bytes in one transaction.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
DT node "st,stm32f105-pll2-clock" already exists but was not actually used
and PLL2 was not being configured.
PLL2 is available on STM32F105/F107 and should be turned off after turning
off PLL and turned on before turning on PLL again since PLL2 can be
used as a source for PLL. Source for PLL2 is always HSE.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Fixes an issue with outgoing mcumgr frames that are larger than the
transport MTU size whereby they would wrongly be split up into multiple
frames with multiple start frame headers, which affected SMP over
console transports.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add support to at86rf212[b] sub-giga devices. This work enables use of
pages 0, 2 and 5 in accordance with IEEE-802.15.4/2003/2006/2011. The
proprietary speeds can be object of future work.
Note: It is recommended that user define a power table for better
performance, low emissions and to save power. A reference power table
can be found in the datasheet and should be used for tests only and
not on a final product.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current version of power table is hardcoded in the driver which is a
problem when use devices in production. This change remove all hardcode
from driver and reimplement the feature to allow people create a table
which is defined in devicetree. The big advantage is that each board can
define their own table based on lab tests and allows use of FEM devices
inclusive.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
In old way, gic_rdists[cpu] is calculated via MPIDR_TO_CORE(), but in
real hardware, MPIDR_TO_CORE() isn't a value increment from 0 one by
one, and that will lead gic_rdists[cpu] to point to a wrong address.
GICv3 provides the register GICR_TYPER[1] and it has a field named
Affinity_Value. This field can help to determine where gic_rdists[cpu]
should point.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
1. Move the defines from usb_dc_mcux.h to usb_device_config.h
and fsl_os_abstraction.h. These headers are used by
the SDK USB driver. usb_dc_mcux.h header file is not longer
needed and hence deleted.
2. Delete the Zephyr implementation of the usb_device_struct
driver and use the one implemented inside the SDK USB
driver. This requires updating the references to
usb_device_struct inside the USB driver
3. Move defines and structures used by the driver
out of the header file that is included by the SDK and
into the MCUX USB driver.
4. Use end point defines provided by Zephyr instead of adding
them locally.
5. Add a Kconfig to set the thread stack size
6. Move code to enable interrupts back to usb_attach function.
Interrupts should be enabled after the init is successful,
else we see errors of the ISR getting called before the
init is complete causing Faults
6. Update west.yml to update the NXP HAL to get the updated
SDK USB driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit introduces the 1-wire master driver for maxim ds2485.
The ds2485 master has nearly the same (1-wire) feature set and
i2c-interface as the ds2477.
Therefore the common parts are extracted, but to avoid
any nda troubles only the ds2485 specific part is included.
Compared to older 1-wire masters, the ds2485 supports higher level
commands, supporting multi byte operations, search next, automatic crc
calculation.
In this driver only basic read and write operations are supported,
further hardware features are not yet utilized by the driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In some configurations, a udf instruction may be generated
when compiling code where static global variable lptim_clock_freq is
used as a divisor.
To avoid this, initialize variable on declaration so that compiler
could see that it can't be used uninitialized in this division.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Enable hardware flow control on Kconfig
* Enable HSI48 clock on sdmmc_stm32 driver
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
On some stm32 mcus, the LSE is enabled as system clock (LSESYS)
only when the LSEON and LSERDY are both set.
The bit LSESYSEN is set in the RCC BDCR register
and the driver is waiting for the LSESYSRDY to be set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The baudrate register (BRR) of a stm32 USART cannot be lower than 16.
The baudrate register (BRR) of a stm32 LPUART cannot be lower than 0x300
and greater than 0xFFFFF.
Add assertion to check the range.
This could be the case when configuring a baudrate of 9600 on usart
clocked by LSE (32768Hz).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
USBC port (Port 0/1/2/3) OCP (Over Current Protection) status
should be sent to PCH over eSPI VW index 0x50h. But there is
no dedicated VW register mapped to VW index 0x50h.
In this patch, configuring spare VW register SMVW06 to OCP VW
index 50h.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
This driver provides an interface to SocketCAN interfaces of the Linux
system running a Zephyr application with the native_posix board. These
interfaces may be virtual or actual CAN buses.
Signed-off-by: Martin Jäger <martin@libre.solar>
An `ifdef CONFIG_SOC_SERIES_INTEL_ACE1X` currently always evaluates to
true, as `drivers/mm/mm_drv_intel_adsp_mtl_tlb.c` is only built when
`CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB=y`, which depends on
`CONFIG_SOC_SERIES_INTEL_ACE1X`. So remove the ifdef.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Migrate information to DTS and get it from there on the code. Note that
for CAVS 15, the information is not migrated as there's no DTS entry for
it. It can be brought back (in the DTS) if TLB support is enabled for
it.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using SoC versions, define the information about base and
extended ports on Kconfig, and use this information from there.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using version of the SoC, declare on Kconfig the need for it,
and use this information to decide upon enabling the code or not.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Update the GPIO-controlled CAN transceiver driver to use the
DT_HAS_CAN_TRANSCEIVER_GPIO_ENABLED Kconfig symbol to expose the driver and
enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add emulator functionality to the serial_test driver, so that it can be
used to simulate a device on the other end of the uart.
If you don't set the buffer-size property in the dts node, there should
be effectively no change from the previous behavior.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Introducing the dma transfer (also through dmamux)
to transfer data to/from the NOR octo-flash
With a DMAMUX, the DMA channel is given by the DTS.
Note that STM32U5X does not support DMA here.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This supports three types GD32 FMC flash memory. GD32 FMC v1,
GD32 FMC v2 and GD32 FMC v3.
GD32 FMC v1 for small flash memory, flash size can be up to 512KB.
GD32 FMC v2 for large flash memory, flash size can be up to 3072KB.
GD32 FMC v3 not use page but sector as minimum block, flash size can
be up to 3072KB.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
According to i.MX RT1060 Reference Manual:
While the OR flag is set, no additional data is stored in the data
buffer even if sufficient room exists. To clear OR, write logic 1 to
the OR flag.
Clear OR (Overrun) flag whenever it is set, so that data continues to be
received after potential data overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Add R-Car Gen3 PWM driver.
Clock diviser is automatically adjusted according to requested period
and duty-cycle in order to obtain as much accuracy as possible.
Indeed, in order to improve PWM accurancy, the PWM clock has to fit
the requested period. So use the given period_cycle to define if the
clock as to be adapted. In such case, increase/decrease the clock
diviser to adapt the period_cycle and be sure that it fits into the
10 bits counter of the PWM controller.
Tested on H3ULCB on pwm0 and pwm4.
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
For some stm32 devices, the SDMMC clock selection is HSI 48MHz
by default (reset value). It must be enabled before acccessing
the peripheral.
The ErrorCode is reported when Init fails.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is the adaptation of the stm32 SPI driver with DMA
transfer for the stm32u5 soc.
Use the DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
also valid for the stm32U5 serie.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit implements shell support for 1-Wire.
Commands for bus-reset, bit-, byte-, and block- communication,
as well as search and configuration are implemented.
- write_byte, and write_block perform a reset before,
in case the option "-r" is passed.
- using read_io_options() function to parse the reset option,
as this allows to easily add further options in the future.
- configuration type can be specified either as number or as name.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Introducing RaspberryPi Pico ADC driver.
This driver was created with reference to the adc_emul implementation.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
MCO1 is also available on STM32F1 series (on top of STM32F4), allow
selection of MCO1 source with CLOCK_STM32_MCO1_SRC_* Kconfig parameters.
Available MCO1 sources are slightly different between STM32F4
(LSE, HSE, HSI, PLLCLK) and STM32F103 (HSE, HSI, PLLCLK/2, SYSCLK), and
STM32F105/F107 have a few more (EXT_HSE, PLL2CLK, PLLI2SCLK, PLLI2SCLK/2).
MCO1 on STM32F1 does not have a configurable divider (unlike STM32F4),
HAL call only configures source.
STM32F1 do not have MCO2.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Use the clock control API to enable peripheral clocks. Note that both
GPIO and pinctrl drivers are updated at once since they share some IP
blocks.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Use the clock control API to turn on ADC clocks. Note that clock
selection is not yet implemented, so we still rely on custom rcu
properties for that.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This patch adds a clock control driver for GD32 platforms. It is
important to note that the driver is only able to handle peripheral
clocks, but not "system clocks" (e.g. PLL settings, SYS_CK, etc.). On
some similar platforms (STM32) this task is embedded in the same clock
driver, performed at init time but with no options to do any
manipulation at runtime via the API calls. The clock control API as-is
is really orthogonal to "system clocks", and it is arguably a bad idea
to embed system clock init code in a clock control driver. It can be
done at SoC level still using Devicetree as a source of hardware
description/initial configuration.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Ticker stop callback are executing in ULL_HIGH priority,
correct the value to 1U instead of 0U which is for LLL
execution context of the Bluetooth Controller.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix usage fault due to spurious ticker timeout expiry post
enqueuing of ticker stop operation.
Use ticker operation callback to handle completion of ticker
stop operation and then give the semaphore to thread to
notifying the completion of flash operation.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Due to Zephyr's WiFi updates, common private
enums used in `hal_espressif` are now being used.
This updates private internal values to meet hal_espressif
changes.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ESP32 wifi connection uses Zephyr's net stack. Once WiFi connects
in station mode, is requires the application to handle DHCPv4
negotiation. This PR adds support to automatic negotiation by
handling the dhcpv4 calls in driver layer.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Moved all MBEDTLS dependencies from prj.conf
to Kconfig as WiFi depends on it.
Update esp32 wifi driver to enable `samples/net/wifi`
to work. Commands as such as `wifi connect` and `wifi scan` are now
available.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Remove the CAN_STM32FD_CLOCK_DIVISOR configuration option,
and add configuration via dts property clk-divider instead.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The configurable CAN clock divider CAN_STM32FD_CLOCK_DIVISOR
was not applied during initialization, because write protection
was not disabled.
While the clock divider was not applied, it was still used in clock rate
calculation, therefore resulting in incorrect bus speed setup.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use domain clocks if they are defined in dts.
Until now domain clock sources could be selected via kconfig.
STM32 platform now can configure domain clock sources via
clock control driver, therefore this commit makes use of it.
The configuration is shared between canfd instances, so a domain clock
has to be defined for only one instance. Otherwise, only the
configuration from the latest initialized instance will remain.
The dependency on clock source PCLK1 for CAN_STM32FD_CLOCK_DIVISOR
was removed, because the divider also divides other clocks.
Note that setting that divider does not work at all at the moment,
because the write protection is not disabled.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
* reduced cyclomatic complexity
* group validation by family to make the validation easier to understand
and extend
* change preprocessor markup where possible to allow for complete code
elimination when features (esp. IP) are disabled
* renamed net_context_get/set_ip_proto() to net_context_get_proto()
While the latter is formally part of the public API and might therefore
have to be deprecated rather than renamed, it is considered internal API
by the net developers, see
https://github.com/zephyrproject-rtos/zephyr/pull/48751#discussion_r942402612
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In case SFDP table is provided via device tree, take care not reading
more than expected by the function caller as the result is written
in a structure which size is predefined by one specific byte in the
table, and could be smaller than the table size.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Changes to code:
1. Renamed CAVS_IPC API from common/include/cavs_ipc.h to
common/include/intel_adsp_ipc.h. Renamed all API functions and structs -
added "intel_adsp_" prefix.
2. Moved definitions from intel-ipc-regs.h and ace-ipc-regs.g to SOC
specific headers include/<soc_name>/adsp_ipc_regs.h.
3. Added new common intel_adsp_ipc_devtree.h header with new
macros to retrieve IPC and IDC nodes and register addresses.
Put those new macros in code replacing hardcoded values outside of
devicetree.
4. Changed documentation of IDC and renamed IDC register struct
to have common name between all intel adsp socs.
5. Removed excessive docs description on cAVS IPC protocol.
Changes to Devicetree:
1. Renamed in all CAVS boards .dtsi files content in IPC nodes:
- "cavs_host_ipc" node labels to "adsp_ipc" labels.
- compatible "intel,cavs-host-ipc" renamed to
"intel,adsp-host-ipc".
2. Added (previously missing) yaml file for "intel,adsp-host-ipc"
compatible.
3. Renamed in all CAVS boards .dtsi files content in IDC nodes:
- "idc" node labels to "adsp_idc" labels.
- compatible "intel,cavs-idc" renamed to "intel-adsp-idc"
4. Renamed intel,cavs_idc.yaml file to intel,adsp_idc.yaml
so it is suitable for both CAVS and ACE SoC family.
Moved it from ipm bindings to ipc bindings where it belongs.
Changes to Kconfig:
1. Renamed existing Kconfig option CONFIG_CAVS_IPC to
INTEL_ADSP_IPC.
2. For renamed INTEL_ADSP_IPC addded default value based on
status of the "adsp-ipc" and "adsp-ipc" node.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Convert the device to be Devicetree based. Adjusted tests and other
areas that were using old Kconfig properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
config/data accessors have been removed from all (or most) in-tree
drivers, do the same here.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The "framebuf" driver was an incomplete driver expecting _clients_ to
implement missing functionality (i.e. init and device definition)
outside of the driver. This pattern of scattering driver code throughout
the tree is not common (if used at all). If certain drivers share
functionality, one can create a common module within the subsystem (see
e.g. ILI9XXX drivers).
The _generic_ framebuffer code was only used to implement the Intel
Multiboot framebuffer driver. This patch centralizes all the scattered
code in the subsystem and adjusts the driver name to "intel_multibootfb"
to make things clear. If there's ever another framebuffer driver that
shares code, it can be split into multiple modules.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
On L0 series, LSI runs at 37KHz while LPTIM driver only supports speeds
up to 32768Hz (to avoid counter overflow). Consequence is a time running
faster than reality (x1.13)
Solution to this is the implementation of the LPTIM prescaler support.
While moving driver configuration from Kconfig to DT, this case was
not taken into account and the effect was LPTIM counter overflow which
consequence is worse than the slightly faster timer.
Reproduce the initial behavior with this piece of code that will be
removed once prescaler support is available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When using LPTIM as tick source, tick freq (SYS_CLOCK_TICKS_PER_SEC)
needs to be adapted to get a precise tick to LPTIM freq ratio.
This adaptation was done easily using Kconfig up to now (under
soc/st_stm32/common/Kconfig.defconfig.series).
Since driver is configured using device tree, this method should
be adapted. For the LSI case (default Kconfig case), rely on the
existing mecanism, which is also still used by OOT users.
For the LSE case, force the value manually in boards forlder.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following transition of lptim timer configuration from Kconfig to DT,
a warning message was set to inform users about this deprecation.
Due to errors in CI this message had to be removed while fixing the related
issues.
Now these issues are fixed, set the deprecation message again.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to other drivers, use auto generated DT_HAS_<COMPAT> Kconfig
symbol to control use of STM32 lptim driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Last HAL udpdates came with a fix on two ethernet flags:
- ETH_PTPTS*S*R_TSSARFE > ETH_PTPTS*C*R_TSSARFE
- ETH_PTPTS*S*R_TSSSR > ETH_PTPTS*C*R_TSSSR
Update driver to be aligned with these changes.
Fixes#49763
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Added code to enable platform specific Virtual Wire GPIOs. With this
change, able to send the USB-C overcurrent Virtual Wire event to
Meterolake SOC.
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
The UC8176 doesn't automatically copy writes to the buffer containing
the old SRAM contents. In this case, we need to manually copy data to
the back buffer.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some custom refresh profiles need to set the PLL and VDCS
registers. Add them as optional DT properties.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add support for overriding display LUTs in the UC81xx driver. This
makes it possible to use different LUTs for the full and partial
refresh profiles.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add a separate profile for partial refreshes. This makes it possible
to specify a separate refresh configuration for partial and full
refreshes.
The driver now transitions to full refresh mode when blanking is
turned on. It transitions back to partial refresh mode when there is a
write while blanking is off.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Introduce the concept of refresh profiles which are specified as a
child node in the device tree. This makes it possible to use different
overrides for different types of refreshes (full/partial).
The only profile that is currently supported is the "full" profile.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some commands need to signal that the chip is busy using the busy
pin. We generally need to wait for the chip to exit the busy state
before issuing a new command. Call uc81xx_busy_wait() from
uc81xx_write_cmd() just before issuing a new command instead to avoid
sprinkling wait calls everywhere.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC81xx driver prints a debug message on every iteration of its
busy wait loop. This makes debug output almost useless. Modify this
code to print a debug message on entry and exit instead.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
west.yml: update hal_espressif to use latest v4.4.1 updates.
This change needs to be insync with esp32c3 timer changes, otherwise it
breaks it.
drivers: timer: update esp32c3 systimer to meet API changes.
Systimer API was refactored in hal v4.4.1, which
requires updates in esp32C3 systimer. Timer behavior is maintained
as is.
mcpwm: add v4.4.1 include reference, which was refactored as well.
driver: spi: esp32: update internal structs to meet API changes.
cmake: updated esp32 board to use HAL_ prefix as from west blobs
requirement.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Supplicant start call is part of esp_wifi_init, which
would become duplicated if kept in here.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updates ESP32 to use hal interrupt funcions provided by 4.4.1
release. Removed redefinition of interrupt FLAGS.
This also includes interrupt definitions for ESP32C3
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add device specific clock initialization, which uses
reset reason cause information to proper define
peripherals clock state.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
NSEC_PER_MSEC should be defined along with the rest of the
per-sec macros in sys_clock.h. Currently, it's defined
multiply in a few separate locations.
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
To reduce energy consumption for accel and gyro frequencies 52 Hz and
lower, disable high performance mode by default.
It doesn't affect for higher frequencies.
Signed-off-by: Adrian Wojak <adrian.wojak@grinn-global.com>
1. Use #ifdef around CONFIG_HTS221_TRIGGER instead of #if
2. According to binding (which is in line with datasheet), name of the pin
used for trigger mode should be drdy, not irq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Internal channel should be torn after ADC read, this is
especially the case for VBAT, where the connection of internal
channel will introduce current drainage.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Add I2C driver for Andes atciic100. Driver supports I2C target mode and
tested on adp_xc7k_ae350 in runtime.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
Update dai drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update lora drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update intc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update Wifi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
This change applies the newly introduced consistent MTU definition to
all IEEE 802.15.4 radio drivers.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Adjust the names of the operating modes to match them
with the datasheet and INA230 pattern. While at it add
the missing INA237_OPER_MODE_TEMP_TRIG mode.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This adds flash driver for Renesas SmartBond(tm) family.
This technically uses QSPI controller but since default and most
commonly used configuration is to boot from external QSPI flash (DA1469x
do not have built-in flash) and that flash is mapped into memory space,
it can be represented as internal flash.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds serial driver for Renesas SmartBond(tm) family. Both polling
and interrupt APIs are supported.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds GPIO driver for Renesas SmartBond(tm) family.
Driver supports pin configuration (input/output) and interrupts on edge.
Interrupts on level are not supported by hardware.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
The commit 4c20403629 updated the
`spi_psoc6_transceive` function signature but forgot to update its
usages.
This commit updates the `spi_psoc6_transceive` function invocations
to properly provide the callback and user data parameters.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the SiFive SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Microchip MSS QSPI SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the LiteSPI SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Gecko SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the GD32 SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
prev_temperature was only used if USE_TEMP_SENSOR is true. Make its
definition conditional.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The temperature sensor was only needed when
CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_MAX_SKIP > 0. Implementation did
not reflect this dependency correctly, and sensor sampling code was
always compiled. Also removed CONFIG_MULTITHREADING checks, since this
driver is only compiled if CONFIG_MULTITHREADING=y.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit replaces API that became deprecated with the release
of nrfx2.9 - see CHANGELOG in zephyrproject-rtos:hal_nordic repository
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Simplify driver by using DT_INST_FOREACH_CHILD_STATUS_OKAY_SEP (avoids
DT_DRV_INST and auxiliary macro).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver by using DT_INST_FOREACH_CHILD_STATUS_OKAY_SEP (avoids
both DT_DRV_INST and auxiliary macro).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add I2C bus recovery support by emitting 9 SCL clock pulses.
It implements the equivalent logic of the i2c_unwedge function in the
ChromiumOS legacy-EC.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
hts221_trigger.c is pulled in by the CMakeLists.txt file when
CONFIG_HTS221_TRIGGER is defined. Therefore make the source in hts221.c use
the some define.
This removes also the (wrong) warning
<inf> HTS221: Cannot enable trigger without drdy-gpios
even when "drdy-gpios" is defined in the device-tree.
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
wifi drivers that depends on native ethernet stack cannot perform
wifi API calls missing availability. This changes adds the ethernet_api
interface in wifi_mgmt so that it becomes possible.
Naming "offload" in "struct net_wifi_mgmt_offload" is kept because
Zephyr still has no supplicant to handle a full non-offloaded driver.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a new reset driver for GD32 platforms. This driver controls the
reset registers from the RCU peripheral. It can be used to restore
peripherals to their initial state when initializing a device.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Current implementation misses disabling input/output mux
once GPIO has already been configured. It means that after 1st
configuration, if GPIO is reconfigured, it won't disable previous
definitions, causing unexpected behavior.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update DMA drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Adds a new spi_transcieve_cb API which enables asynchronous
SPI transactions with callback notification.
The exist spi_transcieve_async API remains and uses the new
spi_transcieve_cb API to provide a k_poll_signal notifier.
The driver API changes to provide a callback and userdata
parameter to async transcieve. All drivers in the tree
have been updated to the change.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
It was not possible to disconnect a pin using the nRF pinctrl driver.
That is, it was not possible to set PSEL to 0xFFFFFFFF (indicating pin
is not connected). This can be useful in certain scenarios, e.g. a
bootloader configures all signals of a certain peripheral but
application then needs to disconnect certain signals.
A new DT macro has been introduced to accomplish this:
NRF_PSEL_DISCONNECT. It can be used like this to explicitely disconnect
a peripheral signal:
```
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 1)>,
<NRF_PSEL_DISCONNECTED(UART_RX)>;
};
};
};
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use SHELL_CMD_ARG() for argument check and add help, looking like:
...
$ pcie -h
pcie - PCI(e) device information
Subcommands:
ls :List PCIE devices
Usage: ls [bus:device:function] [dump]
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The command uses 1 optional parameter and this parameter can be at
maximum MAX_I2C_BYTES.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
When configuring the octo-flash in SPI/STR mode, the address size
must be on 24bits (and not on 32bits).
Despite the dev_data->address_width which is always seen as 4, the
erase command must reduce the AddressSize for this transfer mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Update I2S drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit enables the SoC's flash memory controller.
- added lpc55s36 specific code in the NXP MCUX driver
to take advantage of the SoC's check-before-read
capability
- enabled the FMC node in the SoC's dtsi (iap)
- added the flash controller chosen node to the board's dts
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add support for LPC54xxx IAP flash driver to soc_flash_lpc.c
Driver is tested on M4 core only, and is therefore disabled on the M0 core.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use correct printf format specifier for LOG_DBG calls using offsets, as
these offsets are long int and thus require the %lx format specifier rather
than %x.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update usb device drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Following 4806e1087e ,
the following warning appears for some boards (e.g. `qemu_cortex_a53`)
```
CMake Warning at /zephyr/CMakeLists.txt:798 (message):
No SOURCES given to Zephyr library: drivers__cache
Excluding target from build.
```
Allow this driver to have no sources.
Signed-off-by: Henri Xavier <datacomos@huawei.com>
Commit d556a0c8a6
("drivers: entropy: Add entropy driver for MCUX CAAM")
added a shim entropy driver whose initialization function
always returns 0, even when the underlying HAL API fails.
This is wrong; if the device initialization function fails, it must
return nonzero by contract. Papering this over with an assert is not
enough. Fix it by returning -ENODEV on error.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The sleep pin is optional and the driver checks for availability during
runtime. Currently the logic is inverted and therefore the driver exits
early if the pin is actually available. This pr fixes this behavior.
Also: Add `fallthrough` flags to switch/case
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
This commit is converting the DMA kconfig for the stm32 dma driver
with new macro DT_HAS_<COMPAT>_ENABLED.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
It includes the definition for the DMA peripheral of this type,
present on stm32U5 devices.
A particular DMA_STM32U5 config is selected for that purpose.
The driver is derived from the existing dma_stm32.c
The GPDMA is counting channels (0-15) ; stream offset is 0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Pull more function into ram code section to effectively improve
access speed and performance.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Adding I2C FIFO mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
The I2C master supports two 32-bytes FIFOs, channel A and C
are supported now.
I2C FIFO mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.52ms(2.4ms->1.88ms) compared to the original pio mode when the
frequency is 100KHz.
3. It is normal to read sensor data through I2C on Nereid's platform.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
When a cache API function is called from userspace, this results on
ARM64 in an OOPS (bad syscall error). This is due to at least two
different factors:
- the location of the cache handlers is preventing the linker to
actually find the handlers
- specifically for ARM64 and ARC some cache handling functions are not
implemented (when userspace is not used the compiler simply optimizes
out these calls)
Fix the problem by:
- moving the userspace cache handlers to a their logical and proper
location (in the drivers directory)
- adding the missing handlers for ARM64 and ARC
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change Summary:
- Updating GPIO_CFG_IRQ define to enable multiple interrupts to
accomodate for IP configuration where each pin when interrupted
can trigger CPU interrupt.
- Removing gpio_dw_unmask_int define as it is NO OP
Signed-off-by: Ravik Hasija <ravikh@fb.com>
Add missing support for the triggered mode using GPIO
interrupt alert pin. It uses mode detection at runtime
which allows working multiple sensors with different
modes simultaneously.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
I2C CQ mode cannot enter power policy during transfer.
test: tests\driver\i2c\i2c_api--> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Change the error code for can_send() when the CAN controller is in bus off
state from -ENETDOWN to -ENETUNREACH.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This is a follow-up to commit fd07675574.
The above commit was supposed to introduce overriding of the S0S1
drive setting with S0D1 for TWI/TWIM peripherals, but since it did
not properly update the `nrf_pin_configure()` function (the `drive`
parameter was only added in the function signature, but then it was
not used...), the drive setting was in fact not overridden.
This commit corrects this embarrassing oversight.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The stm32U5 LL function name differs from stm32H7 serie but must
still be enabled in the PCSEL.
This is done with the LL_ADC_SetChannelPreselection function
until the LL changes its name.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The driver is writing the DTS nist-config to the RNG periph.
following the validation sequence described by the RefMan.
It depends on the he RNG IP version and is present on some
mcu devices : all with CONDRST bit.
Depends on the RNG CR Autoreset.
Takes the Health test control Register if property is given.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32 mcu with a CONDRST bit in its RNG_CR
for conditioning Soft Reset, the driver must wait for
the bit to be 0 after disabling. This could take
about 2 AHB clock cycles + 2RNG clock cycles.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Recent change to constify struct devices pointers introduced a
compile warning in gpio_xlnx_ps driver. Update driver to fix a
case that got missed in the constification that fixes the warning.
Signed-off-by: Kumar Gala <galak@kernel.org>
Switch the Xilinx PS UART device driver over to the use of the
DEVICE_MMIO_... macros instead of just using the physical base
address from the device tree.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Toward deprecated DT_LABEL() macro, replace the handful of cases
that use DT_LABEL(node) with DT_PROP(node, label).
Signed-off-by: Kumar Gala <galak@kernel.org>
Dai index should be added to config as it can be queried by the
application like sof. Also check for dynamically allocated params
when returning the config.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Increase the default user-allocable number of RTC channels to meet
the nrf_802154 driver requirements.
Signed-off-by: Adam Zelik <adam.zelik@nordicsemi.no>
It is frequent to find variable definitions like this:
```c
static const struct device *dev = DEVICE_DT_GET(...)
```
That is, module level variables that are statically initialized with a
device reference. Such value is, in most cases, never changed meaning
the variable can also be declared as const (immutable). This patch
constifies all such cases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize UART pipe device at compile time, allowing to constify the
device pointer. Also fix device ready check (was checking for NULL, an
always true condition when using DEVICE_DT_GET).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove redundant definitions by defining at the top before variable is
used. Also constify device array.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize the vtd device at compile time. Also removed unnecessary
macro hackery. As a result, vtd pointer can be constified.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove redundant declarations by definining and initializing before
variables are used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize timer devices at compile time. This allows to constify the
array of timer devices.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A few drivers could initialize chosen UART at compile time, allowing to
constify device pointer.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The UART device can be initialized at compile time, allowing to constify
the device pointer. Also fix return value to -ENODEV if device is not
ready.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename the can_state enumerations to contain the word STATE to make their
meaning more clear:
- CAN_ERROR_ACTIVE => CAN_STATE_ERROR_ACTIVE
- CAN_ERROR_WARNING => CAN_STATE_ERROR_WARNING
- CAN_ERROR_PASSIVE => CAN_STATE_ERROR_PASSIVE
- CAN_BUS_OFF => CAN_STATE_BUS_OFF
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Expand the error return values reported by the CAN timing calculation
functions to be able to distinguish between an an out of range
bitrate/sample point, an unsupported bitrate, and a resulting sample point
outside the guard limit.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the check for the maximum allowed CAN bitrate to the corresponding
can_calc_timing()/can_calc_timing_data() function.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This is a follow-up to commit e1c0a494b3.
The `tca954x_transfer()` function cannot call `i2c_transfer_dt()`,
because the I2C device address used in the transaction must be the one
passed as the `addr` parameter, not the address of the TCA954xA switch
itself. Hence, this commit restores the call to `i2c_transfer()`.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Previous versions were using, incorrectly, the host in/out regblock size
of 40 bytes for all peripherals when in fact the link in/out regblock size
is 20 bytes in size.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Fix a call that writes Register 29 - Accelerometer Configuration 2.
Due to an obvious copy-paste mistake in the code, this register was
written with a DLPF setting from devicetree intended for gyroscope,
not for accelerometer (and the latter was effectively ignored).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Move gpio_cmsdk_ahb.h out of drivers/gpio and into include/drivers/gpio.
This is used by few board files so it should be in include.
This allows to remove few odd
"zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)".
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
There's no actual pinmux subsystem driver for v2m_beetle, and
CONFIG_PINMUX is only used as a proxy to build pinmux.c.
Drop the config and change the file to be built unconditionally (same as
mps2_an521 and mps2_an385.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
According to the BME680 datasheet, only the spi_mem_page bit can be
changed in its 8-bit register. Therefore we shouldn't just write 0s
to the remaining bits, but update the register content in read-modify-write
fashion instead.
Rework the bme680_set_mem_page(), bme680_init() and register-access
macros.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
Add support for reading the VFOCV register, which contains the model
estimated open circuit voltage for the cell.
Link: https://pdfserv.maximintegrated.com/en/an/AN6358.pdf
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
ASSERT was failing when `r8a7795_cpg_mssr_start_stop` was
called for a "core" clock.
This ASSERT statement and "mstpcr" table of registers are
only meant to be used when starting or stopping a "module" clock.
Moved ASSERT statement to `rcar_cpg_mstp_clock_endisable`
as well as "reg" & "bit" calculation.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add argument dump for dumping first 16 PCI configuration space
registers same way lspci -x is doing. Also parse bdf string as
argument. pcie can be called following way:
uart:~$ pcie 0:1f.4
...
uart:~$ pcie 0:1f.4 dump
...
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Rename the SocketCAN header from socket_can.h to socketcan.h to better
match the naming of the functionality.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the NXP FlexCAN driver internal functions and macros to not use
"zcan", "zframe", and "zfilter" to avoid confusion after "struct can_frame"
and "struct can_filter" renaming.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the mcp2515 driver internal functions to not use "zcan" to avoid
confusion after "struct can_frame" renaming.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the "z" prefix from the public CAN controller API types as this
makes them appear as internal APIs.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add fundamental feature support for PL022 SPI peripheral.
This commit implements synchronous transfer with 8bit-MSB format.
Optional functions are not currently implemented yet.
- interrupt based transfer is not implemented yet.
- DMA transfer is not implemented yet.
- Slave mode is not implemented yet.
- Currently support only 8-bit data transfer.
Hardware limitation:
- LSB-first format is not supported by hardware.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Remove flash driver dependency on CONFIG_HAS_MCUX_IAP for determining
if the SOC uses an NXP IAP flash controller, and instead use the
devicetree compatible to determine this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This change reverts a portion of a prior change that results
in an uninitialized eswifi_spi_data struct to be passed to
the `is_spi_ready` function.
See commit 48c87f2bf8
Signed-off-by: Brian Dunlay <brian.dunlay@gmail.com>
gpio_utils.h header relied on other files including its dependencies.
This patch adds all necessary includes to make it self-contained.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The binding 'nxp,lpc-iap' is no longer used, which is confirmed
by running:
$ find ${ZEPHYR_BASE}/dts/arm/nxp -type f | egrep -e '\.dts(i)*$' | \
xargs grep -nH nxp,lpc-iap
Changes in this commit:
- remove DT_HAS_NXP_LPC... in drivers/flash/Kconfig.mcux
- remove schema file for nxp,lpc-iap
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
The lpc and mcux drivers' DRV_COMPAT is updated for the new bindings
introduced in the previous commit. The drivers' Kconfig files also
reflect this change (DT_HAS_ENABLED_NXP_...).
The SoC device trees are updated with the new bindings
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add support for setting sync-word and iq-inverted in lora_modem_config. By
being able to set the sync-word it's possible to send "raw" public-network
packets using lora_send and using iq-inverted both uplink and downlink
messages can be sent.
Signed-off-by: Tim Cooijmans <timcooijmans@gmail.com>
Fixes a bus fault observed in samples/boards/reel_board/mesh_badge
caused by dereferencing an uninitialized device pointer in the apds9960
sensor driver. The device pointer needs to be initialized regardless of
how CONFIG_APDS9960_TRIGGER is configured.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The SSD16xx driver currently hard-codes a couple of register overrides
that aren't relevant or even correct for many devices. Make them
optional device tree properties instead.
Note that this changes the behavior for panels that expect
SSD16XX_CMD_DUMMY_LINE and SSD16XX_CMD_GATE_LINE_WIDTH to be set by
the driver. This fixes a bug where the incorrect value
was written to all SSD16xx panels except for GDEH0213B1 and GDEH029A1.
The overlay files for devices that need dummy line and gate line width
to be specified have been updated as a part of this commit.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The OTP in most SSD16xx-based displays normally contain default
VCOM/GDV/SDV values. Make all of these optional in the device tree.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Many register writes only use 8 bits of data. A common pattern in the
driver is to assign a constant to a temporary variable and write that
to the device. Simplify this pattern by adding a helper function that
writes an uint8 to a device.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Device activation always follows the same sequence, we first write the
SSD16XX_CMD_UPDATE_CTRL_2 register followed by
SSD16XX_CMD_MASTER_ACTIVATION. Create a helper function that performs
both of these actions.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
This changes the return value of uart_mux_send() to return
how many bytes sent instead of simply zero for any bytes sent.
This would make it consistent with other UART send commands where
they return number of bytes sent.
Fixes#48470
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add the option to specify the minimum duration that the `reset-gpios`
pin is held low on boot. This lets devices with additional capacitance
on the reset line still reboot the Bluetooth controller.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
This fixes underrun issues when hardware flow control can't be used.
Only tested on STM32F4.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
...
DMA controller ownership can be done in the driver
initialization, it does not need to be part of the SoC. It simplify
the code and remove duplicated definitions.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Use 'select SERIAL', as a serial driver is supported by practically
all boards, and avoids using extra overlays in samples and tests.
The pattern of using select was introduced for SENSORS in df81fef944,
and the only 1-wire I2C sensor was converted in 465b7615a9.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select I2C'/'select I2S' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
The hwinfo_mcux_syscon driver isn't relavant for LPC51U68 SoC
series. Add a Kconfig exclusion so the driver isn't available
on LPC51U68 SoC.
Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
It appears that some in tree boards still enable lptim w/o configured
domain clocks.
Remove this deprecation message the time a clean up is done fully.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
LL_USART_EnableInStopMode may not be available on some series.
Since PM is not enabled on those series and might never be, use a
shortcut for this case.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The adxl372 device does not select the correct bus that it is on, which
causes undefined operation (usually a fault). This driver should not be
using Kconfig to determine which bus to use, that should be done by
dts, however this works as a quick fix in the interim until the driver
can be fixed properly.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
mdm_hl7800_log_filter_set uses LOG_MODULE_NAME which
is undefined.
log_source_id_get() will fail to get the correct source id.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
All the of the ITE it8xxx2 devicetree compatiables are of the form
ite,it8xxx2-<DEV>. However the PECI device was ite,peci-it8xxx2,
rename the compatiable to match the pattern used everywhere else.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove the Kconfig option for configuring the maximum value of the CAN-FD
Data Length Code in order to ensure standard compliance.
Allowing users to configure the max DLC allows the user to save a number of
bytes per CAN frame in RAM, but it also renders the Zephyr CAN-FD
implementation non-compliant with the CAN-FD standard.
There are no guarantees that a Zephyr CAN-FD node will not receive a CAN
frame with a DLC higher than the Kconfig limit, which opens up for all
sorts of bugs when trying to handle received CAN-FD frames.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The stm32F1x serie does not provide the pin_get_config function,
Even if the CONFIG_GPIO_GET_CONFIG is set, the -ENOSYS error code
is returned by the z_impl_gpio_pin_get_config().
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Define a pin structure to carry the pin configuration elements
such as push/pull, opendrain, input/output, high/low.
This structure will give the gpio_flags_t to the gpio_stm32_get_config.
Only the stm32F1x serie does not provide the pin config get function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In the stm32 gpio driver, the gpio_stm32_get_config function
also returns the pin state HIGH or LOW) to match gpio_pin_get_config
This is valid with CONFIG_GPIO_GET_CONFIG.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Do simple conversion of driver to have driver enabled by devicetree
in Kconfig and struct device created based on basic devicetree
data.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
There are several test cases that create fake ethernet devices and
expect the fake device to be the only ethernet device enabled. Some
tests handle this be explicitly disabling actual ethernet drivers,
but this doesn't scale well.
Change drivers/ethernet/Kconfig to utilze a menuconfig option that
wraps all the drivers. This allows us for those test cases that
don't want any actual ethernet drivers to disable them with a
simple CONFIG_ETH_DRIVER=n.
Note, the fake ethernet devices utilize CONFIG_ETH_INIT_PRIORITY so
we have it outside of the 'if ETH_DRIVER' block.
Signed-off-by: Kumar Gala <galak@kernel.org>
When dealing with pm action 'suspend', driver applies device pinctrl sleep
state.
Using PM_DEVICE modes should allow to save more current consumption, and
applying pinctrl sleep state is one of the gains, but sleep state not being
available on a device is not a sufficient reason to block PM transition
to lower power mode.
If this pin state is not provided for the device, warn but don't block
pm transition. This will save some time to users setting up this feature
for the first time. Warning will give the opportunity to users to fine
tune their setup in a later step.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on Kconfig, use dt inputs to configure LPTIM domain
clck (LSI/lSE).
Clock control dedicated APIs are used for configuration and get the
frequency of domain clock in use.
Constants macros used previously to store frequency and time base are
converted to static global variables.
Some code was set up specifically to keep compatibility with targets
that still use Kconfig to configure domain clock. This will be removed
after a deprecation period.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Continue conversion of LPTIM driver to device tree based configuration.
Get clock configuration from device tree and use clock_control API for
bus clock configuration
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Start converting LPTIM driver to device tree based configuration and
support of other instances.
First: get base address and IRQ using dt instance
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
i2c_transfer_async is the asynchronous version of i2c_transfer where
the completion of the transfer is notified to the caller using a callback.
This can be used in conjuction with the common callbacks and datatypes
in async.h for directly doing an async transfer with an IPC object
to notify a thread.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using select I2C' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
STM32h7 pllout frequency calculation overflows. In the
worst case pllsrc_freq can be 50Mhz and plln_mul 512 which will cause
an overflow of the intermediate result which leads to wrong frequency
returned. As no intermediate result can be bigger than 960MHz only the
order of operations is changed.
Signed-off-by: Benjamin Bigler <benjamin.bigler@securiton.ch>
The current atmel sam flash driver was develop based on the cortex-m7
version of smart arm microcontroller. The driver support write
protection and cache functions which is not supported by other cortex-m
variants. This fixes current driver implementation and devicetree
entries for all sam variants.
Notes:
* The cortex-m3 doesn't have support erase pages flash command and
because of that the driver still not not compatible. Keep it disabled
until a patch be send. The hwinfo driver is not affected by this
restriction.
* The sam4l variation requires a specific driver because uses another
flash controller (flashcalw). Added another compatible to
differentiate and keeped node disabled until a driver be available.
Fixes#48516
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
cleaned up some code in 3 mcux entropy drivers,
removing unnecessary void casts and function declarations
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This is a bug fix. A pointer to the spi configuration is not saved when
the spi driver is configured for slave operation and it can lead to
runtime errors.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
Sensor value unit is [m/s^2].
Currently calcs as [g/1000] unit.
Correcting calculation to convert [m/s^2].
Store the integer part to val1, and the fractional part to val2.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Header file generation from device tree was failing in pulling mode.
Restrict the interrupt node usage to interrupt mode only.
Signed-off-by: Romain Mahoux <romain@mahoux.fr>
The regulator voltage should be set before the clocks are enabled.
This is especially the case when the MSIS at 48MHz is selected as
SYSCLK.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
IRQ7 is placed on the second element of interrupt definition.
Select it by DT_INST_IRQ_BY_IDX() explicitly.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Enable Zephyr device runtime power management mechanisms in Intel SSP
driver. This allows Zephyr to track usage reference for power
domain gating.
Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using select I2C' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
Now that entropy drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The waiting of the flag ARROK could be quite long (100µs-200µs in my
test). During this time, the interrupts are locked that is not
recommended. To avoid this, we manage the update of the autoreload value
in interruption
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
In order to work on a clock speed higher than 20 MHz, IO MUX is required.
Co-authored-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Signed-off-by: XiNGRZ Chan <hi@xingrz.me>
HCI message sending in this hci driver as these actions require hci_host
to be available and could be performed by the remote host if required.
Explicit this dependency using CONFIG_BT_HCI_HOST.
This is is required to be able to compile BT_HCI_RAW mode.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The def command Indicates that a comment block contains documentation
for a #define macro. This is useful if the comment block documents a
macro not adjacent to it, e.g.
```c
/**
* @def MAX(x,y)
* @brief Computes the maximum of @a x and @a y.
*/
#ifdef XXX
#define MAX(x,y) ...
#endif
```
However, it is not necessary if the comment is adjacent to the
definition, e.g.
```c
/**
* @brief Computes the maximum of @a x and @a y.
*/
#define MAX(x,y) ...
```
This patch removes all unnecessary def entries in-tree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove code that clears spurious interrupt flags, as this step is
not required.
Performance change (as tested with iperf on RT1050)
TCP RX: 50.8Mbps->50.6Mbps
TCP TX: 46.2Mbps->49.5Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
remove the TX thread, as this thread can become starved and unable to
reclaim TX buffers from the hardware. Instead reclaim buffers in ISR.
Change eth_tx function to first take from the tx_buf_sem, so that multiple
TX buffer descriptors can be used effectively.
Performance change (as tested with iperf on RT1050)
TCP RX: 44.6Mbps->48.6Mbps
TCP TX: 38.1Mbps->40.7Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move dma buffers and buffer descriptors to DTCM, to improve hardware
and software access speed during network TX/RX
Performance change (as tested with iperf on RT1050)
TCP RX: 40.6Mbps->44.6Mbps
TCP TX: 36.8Mbps->38.1Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not force network buffers into noncacheable memory, as these buffers
are internal to the driver and not used by the hardware.
Performance change (as tested with iperf on RT1050):
TCP RX: 23.7Mbps->40.6Mbps
TCP TX: 22.3Mbps->36.8Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The I2C bus lock did not previously enclose the referencing of the
transfers to conduct. If two attempts are made to use the bus at a
similar time, then one set of messages may have been transferred twice.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Have the display enabled in devicetree will now get the driver
enabled by default when CONFIG_DISPLAY=y is set. So we can remove
setting driver enabling Kconfig values in various .conf and
defconfig files.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
Add a missing `PINCTRL_STM32` dependency
for `PINCTRL_STM32_REMAP_INIT_PRIORITY` option to use
that option only when STM32 pinctrl driver is being used.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In the continuation of the previous commit, replace _OPT_ by _DOMAIN_
in macros relating to this feature.
hen, adapt drivers and tests to this new wording.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The I2C shell would filter the list of devices it knows about to
ones that have a device name that starts with "I2C_". It was the
case that the majority of I2C bus controller devices happened
to be named with the "I2C_" prefix, however there is no guarantee
that is the case. With the remove of label properties from the
devicetree this is even more true.
For now remove the prefix filter and just return the full list
of devices.
Signed-off-by: Kumar Gala <galak@kernel.org>
This change in pattern is meant to address a misconfiguration issue
that can occur for sensors that support being on multiple busses
like I2C & SPI.
For example, you can have a configuration in which such a sensor is
on the I2C bus in the devicetree and the sensor is enabled. However
the application configuration enables CONFIG_SPI=y and CONFIG_I2C=n
and this will cause the sensor driver to be built by default, however
since we don't have the I2C bus enabled the driver will not compile
correctly.
Previously we had been adding to board Kconfig.defconfig something
like:
config I2C
default y if SENSOR
This pattern doesn't scale well and may differ from what an application
specific need/use is.
So instead move to a pattern in which we leave the default enablement
up to the devicetree "status" property for the sensor. We then have
the Kconfig move from 'depends on <BUS>' to 'select <BUS>' and in
the case of drivers that support multiple busses we have the Kconfig
be: 'select <BUS> if $(dt_compat_on_bus,$(<DT_COMPAT>),<BUS>) for
each bus type the sensor supports.
This removes the need to add Kconfig logic to each board and enables
the bus subsystem and bus controller driver if the sensor requires
it by default in the build system.
Fixes: #48518
Signed-off-by: Kumar Gala <galak@kernel.org>
When the uart is configured in non interrupt mode, then the mmio address
should be provided via DEVICE_MMIO_ROM_INIT.
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
Building for native_posix_64 exposes faulty format strings.
Changes in this commit also ensure that the shell code gets built in CI,
thus this kind of problem can not be introduced again later on.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Adds optional device tree property to specify a default character
to clock out when the TX buffer pointer is NULL. If the property is
not set the existing behavior (default char of 0x00) is used.
I verified the expected behavior using an i.MX RT685 board and
logic analyzer that the def-char character is transmitted when
TX buffer pointer is NULL.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
This commit fixes the incomplete assert conditions for the `chan`
argument passed to the nRF RTC timer functions.
Note that the `chan` argument for this driver is of a **signed**
integer type, so it is necessary to check that its value is
non-negative.
This fixes the warnings generated by the GCC 12 such as:
error: array subscript -1 is below array bounds of '...'
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Activating both, the IEEE 802.15.4 raw mode /and/ the L2 mode is not
possible and in fact leads to a build error.
It should therefore not be possible to activate both options at the same
time. This is achieved by only offering the (rather exotic) raw mode
once the L2-support for the IEEE 802.15.4 has been switched off.
Fixes: #48715
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Previous to this change, each individual driver option depended on
NETWORKING. Instead, move dependency one level up.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make all drivers default to 'y' and dependent on being enabled in DT.
This will allow simplifying many samples/tests.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some counter devices depend on buses (e.g. I2C for Maxim DS3231). Bus
devices are tipically initialized with KERNEL_INIT_PRIORITY_DEVICE as
well, so there's no guarantee counter will be initialized be initialized
before without manually tweaking priorities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Let's switch to the LOG_DBG for +CREG, +CESQ and +CSQ
AT commands responses because they flood the console so much.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Updates build references of the Counter API
implementation based on Espressif's General
Purpose Timers to differentiate from the one
based on RTC.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This PR fixes the instances indexing in the driver's
initialization macros.
The use of DT_INST macros along with other node identifiers
was preventing the driver from initialize correctly in some
cases.
The driver requires the signal mux number value. Hence the need
to use the SoC's peripheral number information and DT_NODELABEL
macro for node id.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Patches the driver such that if the iface errors after init, the
driver will enter FSM error state.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Compare these variables properly so that the condition in an if
statement will be boolean.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Update gsm_ppp.c
For Arm Cortex-family processors that only support single
sercurity state, (GICD_CTRL.ARE is set to '1'), so need to
set SPI's affinity for the PE which it is enabled.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Use Devicetree to describe the UART UPIPE IEEE 802.15.4 driver. This
allows to remove usage of IEEE802154_UPIPE_DRV_NAME in preparation for
the removal of NET_CONFIG_IEEE802154_DEV_NAME.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_NRF5_DRV_NAME in preparation for the
removal of NET_CONFIG_IEEE802154_DEV_NAME.
All SoC files have been updated with the addition of an ieee802154 node
(disabled and only on those SoCs that define ieee802154-supported. The
peripheral has been enabled in the nRF52840DK board (used for testing
ieee802154).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_KW41Z_DRV_NAME in preparation for the removal
of NET_CONFIG_IEEE802154_DEV_NAME.
KW41Z files have been updated with the addition of radio and an
ieee802154 nodes The peripheral has been enabled in the frdm_k41z board
(used for testing ieee802154).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The crypto driver is used internally, so there's no real need to expose
its name as a Kconfig option. Just drop it in favor of a plain string
with the same previous value.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC13XX_CC26XX_SUBG_DRV_NAME in preparation
for the removal of NET_CONFIG_IEEE802154_DEV_NAME.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC13XX_CC26XX_DRV_NAME in preparation for the
removal of NET_CONFIG_IEEE802154_DEV_NAME. All boards used in testing
have been updated to enable the peripheral in DT as well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC1200_DRV_NAME in preparation for the removal
of NET_CONFIG_IEEE802154_DEV_NAME.
In this case, the driver already had bindings, however, it was still
using NET_DEVICE_INIT.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
According to the reference manual, the ADC should not be
converting when setting the common path, we disable the adc
directly in this driver for the sake of simplicity.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Remove unnecessary VREFINT path connection during the init.
Internal paths should be setup before reading the channel.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Move the `adc_stm32_setup_channels` function to `start_read`
so that we can guarantee that the internel path is connecte
before reading.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Use Devicetree to describe secure timer0 instead of hardcoding values in
<soc.h>.
DT files have been structured to match the following requirements: In
case of sectimer0 - it's should be only enabled for:
- emsdp_em7d_esp.dts
- em_starterkit_em7d.dts
- nsim_sem_mpu_stack_guard.dts
- nsim_sem.dts
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This PR fixes up a race condition which could cause GPIO writes to be
dropped when one thread was toggling a gpio on a port, and a different
thread was also modifying a (different) gpio on the same port.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
I2C has its own set of device define macro wrappers to provide
automatic stats tracking when enabled for the device class. This
particular driver happened ot be missed in the transition.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The previous driver implementation aimed to maximize the amount of
filters, which resulted in a fairly complex implementation.
Background: The bxCAN assigns a number to the filters in the order they
appear in the filter banks. This number is used to match messages in
the FIFO with their filter. If the scale or mode of a filter bank is
changed, all following filter numbers get an offset and the assigned
callbacks have to be shifted accordingly.
The required additional space for the shifting operations resulted in
non-deterministic behaviour and the maximum number of filters could not
be determined at compile-time, which made several tests like
tests/drivers/can/api fail.
This implementation uses a more simple but reliable approach for
filtering and and reserves fixed space for extended and standard ID
filters in the available banks (configurable via Kconfig).
The list mode is not used, which may reduce the total number of usable
filters depending on the application.
The maximum amount of filters is 14 if all filters use ext. IDs,
28 if all use std IDs and something in between if mixed IDs are used.
Also see issue #47986 for more detailed background information.
Signed-off-by: Martin Jäger <martin@libre.solar>
Namespace local functions, enums, structs and defines with stm32/STM32
to distinguish them from global CAN API.
Also rename some internal conversion functions to make their meaning
more clear and delete unused defines.
Signed-off-by: Martin Jäger <martin@libre.solar>
This fixes an issue where the unique device identifier is incorrectly
copied from an address on the AHB bus to memory using memcpy.
I verified corrected behavior by comparing `hwinfo devid` command
output to memory view of the SoC using the debugger.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
Add the "zephyr/" prefix to various #include statements that are
preventing the CI form running with LEGACY_INCLUDE_PATH=n.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
With addition of DAI_TRIGGER_COPY, the trigger callback may
be called at a very high rate.
Reduce the logging level from INF to DBG for the logs in
dai_ssp_trigger().
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Zephyr kernel is dependent on trace.
Trace is dependent on segger rtt.
Segger rtt MUST NOT be dependent on zephyr kernel.
Move lock functions from header into c file to avoid circular
dependency. This fix needs an update of the segger repository.
Fixes#43887.
Signed-off-by: Christoph Coenen <ccoenen@baumer.com>
Introduce a simple binding for atmel,24mac402 EEPROM that the SAM
GMAC ethernet driver can utilize to get MAC address out of. We
introduce a 'mac-eeprom' phandle into GMAC ethernet devicetree
node that will provide a pointer to the MAC eeprom to utilize.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add explicit selection of the BT_HAS_HCI_VS for
the BT_RPMSG HCI driver. When the HCI over RPMSG
is used this dependency will not be solved automatically.
It is required to handle correctly Bluetooth identity
initialization.
Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
This platform does not use RISC-V machine timer, however, the interrupt
controller had references to its IRQ. Remove them.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Obtain machine timer addresses and IRQ from Devicetree. Note that driver
supports multiple compatibles because mtime/mtimecmp registers are
implemented in different ways depending on the vendor. That means
Devicetree representations can be slightly different and so code to
collect the information needs to treat each compatible differently.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The unit for SENSOR_CHAN_GAUGE_TIME_TO_EMPTY and
SENSOR_CHAN_GAUGE_TIME_TO_FULL are defined in
zephyr/drivers/sensor.h as being in minutes.
Change the max17055 implementation to match the API spec, fix the
annotation for time register units.
Link: https://datasheets.maximintegrated.com/en/ds/MAX17055.pdf
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add workaround for development kits on which interface chip (segger chip)
is dropping bytes when they are sent in bursts. Issue has been seen on
DK which have multiple virtual com ports on the USB.
A workaround is adding periodic busy waits to introduce gaps in the
transmission.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Soft resetting a STM32 device currently does not reset the USB
connection, which causes a few problems: The endpoints do not respond
anymore, and within zephyr any kind of status information like
CDC_SET_CONTROL_LINE_STATE is also missing as they are not
re-negotiated.
This is fixed by stopping the USB device from zephyr side, right after
initialising the USB device.
Signed-off-by: David Jablonski <dayjaby@gmail.com>
This commit fixes an issue introduced in 5ee9392 where FlexSPI
pinctrl states where applied based on the SoC type.
However multiple FlexSPI instances can be active, some of which
are not pre-configured from ROM.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The HAS_I2C_DW was to limit Kconfig visibility to only platforms
that utilize the I2C DW IP. The Kconfig for I2C_DW depends on
DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED which will cause the same
visbility limitation to only platforms that have I2C DW devicetree
nodes. Thus we can remove HAS_I2C_DW and its references.
Signed-off-by: Kumar Gala <galak@kernel.org>
This adds a driver for Maxims DS2484 Single-Channel 1-Wire master
driver. The DS2484 features an extra pin to enable sleep modes which
is available if the pin is configured in the device tree.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Add ESP32 TWAI CAN controller driver. The TWAI is register-compatible with
the NXP SJA1000 CAN controller.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
MSIS frequency at boot time can be different from the one we intent to
set from device tree configuration.
In order to avoid issues, read MSIS configuration from registers to get
the actual freq rather than the devicetree one which may be not yet
configured (which is the case at startup).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When configuring PLL, we should first make sure we're not running on PLL,
and if running on PLL, first switch to a fixed clock before proceeding
with PLL configuration.
Current code is doing the switch systematically which is not useful as
default startup case is to use MSI as sysclk source.
So add a test before doing this switch.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Unlike stated in 57df225b396e43358aac4cc998ed2e99fdb57780, RM0456.pdf
reference manual mentions about PLL1R that "Only division by 1 and even
division factors are allowed."
Though, in reference manual, there is one issue on PLL1R values
description, which should actually be:
0000000: pll1_r_ck = vco1_ck
0000001: pll1_r_ck = vco1_ck / 2 (default after reset)
0000010: Not allowed
0000011: pll1_r_ck = vco1_ck / 4
...
This description will be fixed.
Reflect this in binding and driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update w1 drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update dac drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Martin Jäger <martin@libre.solar>
This PR adds a KConfig option that allows moving
all .noinit content related to wifi a net stack into external
ram. This free dram space to application.
Linker script files are also modified so that the content
are mapped into external ram.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update i2c drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This power down bit of eSPI module is loacted in the bit 7 of PWDWN_CTL6
register rather than the bit 4. This commit fixs the incorrect setting.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This is a follow-up to commit 63d6cfd654.
Use a bit mask to store information about channels that need to be
driven by the PWM peripheral instead of inspecting the `seq_values`
array each time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
As we phase out label properties from devicetree the devicetree
node may not have a label so utilize DEVICE_DT_NAME instead
which will use a label if it exists and the node name if not.
Signed-off-by: Kumar Gala <galak@kernel.org>
AST10x0 series SOCs provide the clock controller through the syscon
hardware block. The current driver supports the clock gating capability
for the hardware IPs embedded in the SOC. Each clock source has a
clock ID that can simply map to a bit in syscon registers CLK_STOP_CTRL0
(group 0) or CLK_STOP_CTRL1 (group 1). There are some clock sources
that don't have associated clock gating control, which are always on,
are grouped to into group 2.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
This is a follow-up to commit 63d6cfd654.
Revert unwanted PWM_NRFX_CH_POLARITY_MASK to PWM_NRFX_CH_COMPARE_MASK
replacement that was accidentally done in the above commit.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
With the introduction of the OSPI NOR flash controller
the stm32H7 serie requires the HAL MDMA in anycase.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the ssd16xx_read_ram() function that can be used to read the raw
contents of the two display RAM in the controller. This function is
similar to display_read(), but lets the caller specify the RAM to
operate on. The intention is that this can be used to read out the
contents of the old frame buffer after a partial refresh that
automatically swaps the black/red buffers.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Read operations only work on SPI controllers that support half
duplex. To enable read operations, set the device mode to half duplex
by adding the following to the device's DTB node:
duplex = <SPI_HALF_DUPLEX>;
If read requests will fail with -ENOTSUP if the device isn't in half
duplex mode.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC8179 supports automatic power management where the DC-DC is
enabled automatically. This is not supported on the UC8176. Explicitly
call PON/DRF/POF from uc81xx_update_display instead. This ensures that
the DC-DC is only enabled while actually updating the display for all
supported chips.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The CDI register in UC8176 and UC8179 have different layouts. Add a
helper function to the quirks structure to handle CDI updates.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC8176 and UC8179 chips that exist in tree have subtly different
register layouts. Use separate compatible strings for these chips and
a quirks structure that describe device-specific behavior.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The GD7965 driver is really just a vendor name for the UltraChip
UC8179. Rename the driver to UC81xx since there are other chips in the
family (e.g., the UC8176) with an almost identical register interface.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some Series were calculating the pll output frequency from an
clock source index instead of the clock source frequency.
This commit resolves this issue for l0, l1.
get_pllout_frequency() is only used for PLLCLK, therefore remove it.
F2, F4, and F7 have several pll dividers and might decide to implement
these as clock sources won't need PLLCLK.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Update clock_control drivers to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
The KW40Z/KW41Z don't have a Fixed Freq MCG clock so the code
associated with that in get_rate fails to build. ifdef around
the code with enum kCLOCK_McgFixedFreqClk so things work
correctly.
Signed-off-by: Kumar Gala <galak@kernel.org>
The ESP32 clock control for ESP32C3 was unified into a single
driver a while back. However the files associated with the
ESP32C3 didn't get removed than. Remove them now.
Signed-off-by: Kumar Gala <galak@kernel.org>
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)
Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.
The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a
Signed-off-by: Simon Hein <SHein@baumer.com>
For the !SOC_I2C_SUPPORT_HW_CLR_BUS in which we implement bus
reset via GPIOs, change the devicetree properties to be actual
gpio properties and update the code to reflect this.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commits refactors implementation of the pwm_set_cycles function
to fix the following issues:
- when a channel was already set with a non-zero pulse width, setting
cycles for another one required specifying a matching period value,
even if that value was to be ignored anyway when the channel was to
be set to constant inactive or active level; due to this limitation,
it was not possible to e.g. use the LED driver API and turn off a LED
while another one (within the same PWM instance) was blinking
- the above limitation also applied when a channel was set with a pulse
width equal to period (duty 100%); even though such channel was not
in fact using the PWM peripheral, other channels within the same PWM
instance were forced to use the same period
- after a PWM generation was started for a channel, it was not possible
to change its pulse width before two PWM periods passed (while it
should be possible to change it after every period); this was caused
by a looping mechanism that was unnecessarily activated in the PWM
peripheral
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In update the Kconfig to depend on devicetree, the SAM4L
driver was missing a 'default y'.
Also remove unnecessary 'depends on GPIO'.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit adds required code to setup pll2 and pll3 as defined
in dts. Also these plls can now be used as alternate clock sources.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit changes the range for stm32u5 pll divider values
to allow divider value of 1.
- DIVQ is allowed to beconfigured 1 for all PLL instances
- DIVR can be 1 for PLL2 and PLL3, but is not valid for PLl1.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit controls the stream busy flag of the dma channnel
Set as true : stream is busy each time the channel is
started or reloaded.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the channel is overriden by the HAL,
the dma irq must always be handled (even if not busy).
Only when the dma channel is not overriden by the HAL
the irq is exiting when the channel is no more busy.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Intel ADSP CAVS is now a proper series with all CAVS SoCs running under
it. This will give us to Intel ADSP series:
- CAVS
- ACE v1.x
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The uart_pipe_isr() double-checks whether rx interrupt occured by
calling uart_irq_is_pending() first. Get rid of that function call since
it is redundant (i.e. nothing more is done or checked inside that
conditional).
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
The VREFINT and TEMPSENSOR internal channels have a stabilization time
after they are enabled. Right now this just causes the first measure to
be a bit off, however with PR #47691 which stops the internal channels
after each readout, this is something important to respect. Fortunately
the stabilization time is available as constants in the HAL, so just
wait the time specified by the constants.
Note that the VBAT internal channel does not have any stabilization
time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Replace Kconfig (IVSHMEM_DEV_NAME) based named device_get_binding
with DEVICE_DT_GET_ONE. Since there is only one driver for ivshmem
use the qemu,ivshmem for that.
Signed-off-by: Kumar Gala <galak@kernel.org>
The LPUART driver activates the "noise" error interrupt but
neglects to clear the error bit when the interrupt occurs. This
causes the device to freeze. Clear the "noise" status to avoid
the lockup and track instances of this as a UART_ERROR_PARITY.
fixes#47568
Signed-off-by: David Leach <david.leach@nxp.com>
This split the repeated START condition to STOP + START conditions.
The old implement may cause undefined behavior for gd32 i2c, like
enter STOP condition accidentally.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Update memc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update pinctrl drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Inside gpio_nrfx_pin_interrupt_configure, the "ch" variable is allocated
inside the "if", but then it gets dereferenced and the pointer saved in
trigger_config, which is used in the outer context.
This works fine right now, but that memory location could possibly be
reused by another automatic variable if the code gets changed.
Moving it in the function context to avoid any potential problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Update entropy drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update counter drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update spi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update gpio drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
The regulator-pmic node is a child of the I2C device. When this
was converted to i2c_dt_spec that was missed.
Also fixed a few minor formatting issues.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update watchdog drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update serial drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update adc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update pwm drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This CL configures low-voltage (1.8V) detection via GPIO driver with
GPIO_VOLTAGE_1P8 flag. It also adds support for this flag in
pin_get_config() function.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Cleanup npcx low-voltage (1.8V) detection configuration. It removes
unused soc utilities, macros, and DT node. We will configure this
feature by GPIO driver with GPIO_VOLTAGE_1P8 flag later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Update sensor drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Declare clock control in the shim header per SoC and remove ifdeffry
from the driver simplifiying it and making it ready for the next
platform.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
using once single header to support multiple socs and product
generations is error prone and not easily maintained.
Over time we have been adding conditional code in headers and extending
structs to support new HW features which becomes a problem.
Goal is to keep platform headers in sync with hardware specification and
allow of introduction of new platforms and hardware features by just
introducing a new SoC with its own set of headers.
This is now just a copy of existing cavs-shim.h with slight changes,
goal is to clean this up long term and sync with hardware datasheets and
align on naming as well.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The driver has be DT_INST based for a while so the Kconfig
symbols CONFIG_UART_PL011_PORT0<n> aren't used. So lets
remove them.
Signed-off-by: Kumar Gala <galak@kernel.org>
The driver has be DT_INST based for a while so the Kconfig
symbols CONFIG_UART_RV32M1_LPUART_<n> aren't used. So lets
remove them.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update EEPROM drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Update CAN drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose
the driver and enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This patch fix issue with unmapping of virtual addresses mapped
to non-existing physical memory. MTL TLB table is initialised with
1:1 mapping, however virtual space is much wider than available
physical space. We should not try to free and manage of power for
non-existing physical pages.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Update serial drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
If TCP server closed notification is received it
could interrupt the TCP socket RX or TX data sequence.
Remove the SOCK_SERVER_CLOSED state and instead
use a unique error code to know if the socket
has been closed by the server.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Correct issue where transmission complete interrupt was not disabled when
using interrupt driven serial API with power management enabled,
resulting in continuous spurious interrupts that effectively locked
the system.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
If the transaction of write or read is divided into two transfers
(not two messages), the command queue mode does not support.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Rework the <BUS>_emul_register calls to not pass the name param. The
name param is only used for logging and we can get it from the
struct <BUS>_emul instead.
Signed-off-by: Kumar Gala <galak@kernel.org>
Having a per-instance init function makes code cluttered and hard to
read. Just create a per-instance IRQ connect function (required to
resolve IRQ_CONNECT parameters at compile time).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using NRFX_SPI(S|M)_INSTANCE helper so that peripheral address from
Devicetree is used. We should not rely on HAL for hardware description
but Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move the RX (MISO) delaying capability information to Devicetree. It is
done using 2 properties:
- rx-delay-supported: enabled on SPI nodes that support delaying RX.
This property can be used by the driver to determine if this
capability is supported or not on a given instance.
- rx-delay: the actual RX delay value
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The maximum transfer buffer length is SoC specific, not instance
specific. This patch defines MAX_BUF_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The maximum transfer chunk length is SoC specific, not instance
specific. This patch defines MAX_CHUNK_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Specify the overrun character in Devicetree. Since 0xFF is the most
common value, DT property contains such default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Devicetree is the natural place to describe hardware, so move the
maximum frequency the SPI can work with to Devicetree instead of relying
on values from HAL.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
There are a few registers that map nicely onto structs. Switch from
using index constants and byte arrays in those cases.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some panels using this driver don't provide tcon/cdi/pwr/softstart
values in their reference code. It is normally expected that the right
values will be loaded from OTP in such cases. Make these values
optional to support such panels.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The GD7965 driver uses malloc to allocate a single line buffer when
clearing the display. This buffer is used to clear the display line by
line. This as two problems. First, it means that the driver introduces
an unnecessary requirement to support heap allocations. Second, it
causes a lot of weird and unnecessary SPI transactions that look like
partial updates without the actual refresh. This is very inefficient
since the same action can be performed in a single SPI transaction.
Add a gd7965_write_cmd_pattern() helper function that writes a pattern
of a specified length to a register in the device.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The protocol used by the GD7965 driver requires that SPI transactions
are split into two phases, a command phase and a data phase, to change
the state of a GPIO signaling commands/data.
We currently don't lock the bus which means that other drivers could
potentially take over the bus and introduce unpredictable delays
between the command and data phase.
Add the necessary locking.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
DT nodes aren't guaranteed to define a label property. But emulated bus
controllers currently make use of this property to dispatch to the
associated emulator.
Have emulated bus controllers use DEVICE_DT_GET(node_id) to dispatch to
right target peripheral emulator. This also change makes emul_get_binding
and device_get_binding synonymous in behavior with respect to their
parameters.
This also strictly enforces a 1:1 correspondence between invocations of
DEVICE_DT_DEFINE and EMUL_DEFINE.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
In several locations of the emulator code there are unused function
arguments that were never caught.
Declare these as unused or remove the unused function parameters entirely.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Allow emulator creators to write an init function that can be used
across multiple busses so as to reduce the boilerplate and cognitive
load in creating an emulator.
Part of this change includes allowing access to the emul struct from a
field in a {bus}_struct api (e.g. i2c_struct), which removes the need for
sporadic usages of CONTAINER_OF to access the emul struct.
Overall, this change simplifies and reduces the amount of boilerplate
code to get a device emulator up and running, thus reducing excise work
to writing tests.
TEST=twister on accel,espi, and eeprom drivers tests
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Run clang-format on all files touched by improved emulator API pull-request
that allowed access to the target device emulator from its bus api without
CONTAINER_OF usage.
drivers/i2c/i2c_emul.c
drivers/spi/spi_emul.c
include/zephyr/drivers/emul.h
include/zephyr/drivers/espi_emul.h
include/zephyr/drivers/i2c_emul.h
include/zephyr/drivers/spi_emul.h
subsys/emul/emul.c
subsys/emul/emul_bmi160.c
subsys/emul/espi/emul_espi_host.c
subsys/emul/i2c/emul_atmel_at24.c
TEST=twister on accel,espi, and eeprom drivers tests
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Update video drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fix building this sample on bl5340_dvk_cpuapp_ns and
pinnacle_100_dvk. On these boards the NORDIC_QSPI_NOR
driver needs to be enabled for the sample to build.
Signed-off-by: Kumar Gala <galak@kernel.org>
The twim_config structure is no longer modified at runtime, so it can be
placed in driver's config (const).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
TWIM peripheral needs to be disabled for bus recovery, otherwise SCL/SDA
lines will not be released. This patch makes sure to disable peripheral
if active, and, restore its state afterwards (including pin
configuration).
It is worth to note that a better solution would be to:
1. Define scl/sda pins as `-gpios` in DT
2. Use GPIO API in the driver to perform recovery (as some other drivers
do)
3. Potentially use a "gpio" pinctrl state for this case
Unfortunately HAL is doing everything under the hood, so we have little
options to improve this unless we don't use it for such case. GPIO based
recovery should likely be generalized as many drivers seem to replicate
such _algorithm_.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Enable device runtime PM on the I2C driver. Note that this mechanism
replaces the old nrfx_twim_enable/disable calls with
pm_device_runtime_get/put, which means that driver will not save power
unless CONFIG_PM_DEVICE_RUNTIME=y.
Some quick measurements on thingy_52 running the samples/sensor/hts221
show a decrease of ~2-3uA in average when enabling device runtime PM.
Note that the driver already had implicit PM before, so the change for
users will be ~none, except that they now must enable the PM subsystem
features. While this case is not the best example, the PM subsystem will
turn to be beneficial as a whole when all devices in the board implement
it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device definition macro defined per-device init function, resulting
in a cluttered and hard to extend init function. Create a per-instance
IRQ connect function instead, which is called at init time by a common
function.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver already implemented some sort of runtime PM by
unconditionally calling nrfx_twim_disable/enable. Perform the same
operations in the PM callback instead of doing a full init/deinit every
time.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver re-initialized itself on the twim_transfer call if it wasn't.
This condition was likely added because of some manual/custom PM
schemes. Drop it in preparation for runtime PM.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
nrfx HAL does not support updating frequency at runtime, which means we
need to do a full init/deinit to update it when it is a matter of a
simple register write. Fix this by using the lower level HAL.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move driver to use {NET_}DEVICE_DT_INST_DEFINE. This lets us
remove the IEEE802154_CC2520_DRV_NAME Kconfig symobl.
We also update the ieee802154 build_all test to actually enable
the CC2520 driver.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move driver to use {NET_}DEVICE_DT_INST_DEFINE. This lets us
remove the IEEE802154_B91_DRV_NAME Kconfig symobl.
Signed-off-by: Kumar Gala <galak@kernel.org>
Any project with Kconfig option CONFIG_LEGACY_INCLUDE_PATH set to n
couldn't be built because some files were missing zephyr/ prefix in
includes
Re-run the migrate_includes.py script to fix all legacy include paths
Signed-off-by: Tomislav Milkovic <milkovic@byte-lab.com>
A LOG_DBG already exists for the underflow check,
and given that reading 0 edges is a valid case, remove
the noisy underflow log.
Signed-off-by: Andrew McRae <amcrae@google.com>
Check the frame ID type and RTR bit when comparing loopback CAN frames
against installed RX filters.
Fixes: #47904
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When installing a RX filter, the driver uses "filter->rtr &
filter->rtr_mask" for setting the filter mask. It should just be using
filter->rtr_mask, otherwise filters for non-RTR frames will match RTR
frames as well.
When transmitting a RTR frame, the hardware automatically switches the
mailbox used for TX to RX in order to receive the reply. This, however,
does not match the Zephyr CAN driver model, where mailboxes are dedicated
to either RX or TX. Attempting to reuse the TX mailbox (which was
automatically switched to an RX mailbox by the hardware) fails on the first
call, after which the mailbox is reset and can be reused for TX. To
overcome this, the driver must abort the RX mailbox operation when the
hardware performs the TX to RX switch.
Fixes: #47902
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Bosch M_CAN IP does not support RX filtering of the RTR bit, so the
driver handles this bit in software.
If a recevied frame matches a filter with RTR enabled, the RTR bit of the
frame must match that of the filter in order to be passed to the RX
callback function. If the RTR bits do not match the frame must be dropped.
Improve the readability of the the logic for determining if a frame should
be dropped and add a missing FIFO acknowledge write for dropped frames.
Fixes: #47204
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
For SAML21-based parts, the REFCTRL register is locked while the ADC is
enabled. Permit some parts to declare that they need the ADC to be
disabled before modifying REFCTRL.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
The built-in USB serial peripheral is a virtual serial and does not
allow to be configured like a normal UART.
Removing the unused UART config parameters.
Also reducing initialization to single-instance only.
Signed-off-by: Martin Jäger <martin@libre.solar>
This include is only required if typeof() macro is used, which
is not the case for the serial / uart driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via SPI bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
HDA is a common IP used across the entire ADSP line and deserves
a name respecting that alongside similiar IP drivers such as the
ADSP GPDMA driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
There is is an error in the way that the sock id is
determined. A unique fd is reserved and assigned appropriatly, but
the id, which should correspond to a socket number within the modem,
is set to an invalid, and identical for all sockets, value, and then
not used appropriatly in the drivers, instead, the sock_fd is used,
which can be any value really, it is not related to the socket number
in any way.
This results in the drivers only working if the reserved fd happens
to be between base_socket_num and (socket_len - 1)
This patch assignes the id to the index of the socket + the
base_socket_num, the socket at index 0 will get the id 1 if the
base_socket_num is 1, and the modem_socket_from_id should then
be used to get a pointer to the socket, since the id is not
neccesarily equal to the index.
The FIXME has been solved by adding a note both at the start
of the modem_socket_get function and inside the Kconfig file
for the MODEM_SOCKET option description. It is not an error,
but the user must be aware that it uses the POSIX file
descriptors, for which only 4 are allocated by default.
This patch fixes the bug, without breaking the brittle modem
drivers which currently are built around this bug.
The modem drivers should be updated to use the id as the
socket num instead of the sock_fd after this fix has been merged.
The "socket # needs assigning" has been removed, as that is what
this patch is doing
I also added comments to the id and sock_fd in the modem_socket
structure to help developers use the id and fd appropriately.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Convert driver to use DEVICE_DT_INST_DEFINE. Its already devicetree
based so trivial change over to use DEVICE_DT_INST_DEFINE.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add simple clock control node in devicetree for beetle to handle
relationship between drivers (uart, timers, gpio) and clock controller
device.
Signed-off-by: Kumar Gala <galak@kernel.org>
Use DT_INST_FOREACH_STATUS_OKAY to reduce duplicated code for each
instance.
We make interrupts optional since they aren't always available.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove Kconfig symbols that determine which instances and just use
the number of enabled instance in the devicetree to determine which
instances to build.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove dead clock gate code and associated PM code as the platforms
that used the clock gate code are no longer supported in Zephyr.
Signed-off-by: Kumar Gala <galak@kernel.org>
The shared IRQ code has been broken for several releases and no one
seems to have noticed. The platforms that this was used on are not
supported in Zephyr anymore so remove the code.
Signed-off-by: Kumar Gala <galak@kernel.org>
Replace sensor_label property in devicetree with just a sensor phandle
property. This is more generic and allows driver to use DEVICE_DT_GET
instead of device_get_binding.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fixes configured DMA direction for HDA link in/out drivers.
Adjusts the number of channels for link in/link out to safe value
that seems to work on all tested parts.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch corrects the initial unmapping of unused l2 memory
to unmap until the end of virtual address space instead
of unmapping until the end of l2 physical memory.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This patch introduces sys_mm_drv_move_region implementation
which stops usage of the sys_mm_drv_simple_move_region.
The sys_mm_drv_simple_move_region is unsuitable becuase
it iterates through physical pages in linear fashion.
The new implementation queries the tlb for each virtual
page of the requested region to find the physical page
to be remapped.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
The SSD16xx driver needs to wait for the chip to complete commands
before issuing new commands. The datasheet doesn't specify which
commands cause the chip to raise the busy pin. The current driver has
ssd16xx_busy_wait() calls after commands that are known to take a long
time. This is very fragile and scatters a lot of boiler plate around
the driver.
Include an ssd16xx_busy_wait() call in ssd16xx_write_cmd() instead of
after commands that are suspected to take a long time. This makes the
driver more robust and is more in line with the expectations set out
in the data sheet.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
There are cases when attributes of mapped virtual memory need
to be updated. E.g. in case there is loadable library/module
code loaded to the l2 memory then memory needs to be read-write.
After the code is loaded and is ready to be executed then
attributes of mapped memory should be updated to
read-only/executable without loosing memory contents.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Refactors counter driver code, bringing:
- more readability through the removal of abused macros
- better use of the devicetree, by moving peripheral node's
info defined on macros and Kconfigs to dts bindings
- less dependence from dynamic allocations, making counter
instances fully statically-allocated
- better use of DT_INST_* macros
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Move the CAN bus network driver from drivers/can to drivers/net as it
implements a network driver, not a CAN controller driver.
Use a separate Kconfig for enabling the CAN bus network driver instead of
piggybacking on the SocketCAN Kconfig. This allows for other
(e.g. out-of-tree) SocketCAN transports.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Implement support for display blanking by inhibiting display refresh
while blanking is on. Writes to the display are still sent to the
internal RAM in the display controller. Once blanking is turned off,
the contents of the RAM are written to the display. This behavior is
makes it possible to compose a frame buffer in the display controller
without flickering.
Other e-paper drivers such as the GD7965 already implement this
behavior.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Adding command queue mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
I2C command queue mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.72ms(2.54ms->1.82ms) compared to the original pio mode when the
frequency is 100KHz.
3. krabby platform can boot normally.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Simplify the implementation by using gpio_dt_spec.
As part of this use logical values of 0/1 for gpio_pin_set_dt
and handle any inversions as GPIO flags that might be required
at a board level (in dts config).
Signed-off-by: Kumar Gala <galak@kernel.org>
Implement support for half duplex communication in the bit bang SPI
driver. The SPI driver will use the MOSI pin is for both TX and RX
operations when using half duplex mode.
In half-duplex mode, the driver configures the MOSI pin as an input
pin for input only transactions. Transactions that are bidirectional
are forbidden. After an SPI transaction, the MOSI pin is left as an
input if it was an RX transaction or an output after a TX
transaction. Like before, the MOSI pin is initialized as an
(inactive) output pin when the bus is initialized.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add API function for getting the supported capabilities of a CAN
controller. This allows for writing portable CAN applications.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch from using a driver-specific, compile-time devicetree one-shot
property to supporting the newly added CAN_MODE_ONE_SHOT flag for
enabling/disabling one-shot mode at run-time.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the support for enabling passthrough mode support for MPU9150
on the AK8975. We don't have a proper MPU9150 driver and the MPU9150
has been EOL. So its highly unlikely this code is being used.
Additonally we remove the device tree binding for the MPU9150 since
we don't have a proper driver for it.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add gpio_pin_get_config function to gpio_driver_api.
This function is used to read current configuration of pin.
The gpio_pin_get_config checks if driver implements this function and
returns -ENOSYS if it isn't implemented.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Custom accessors like HAL_INSTANCE() have been gradually removed
in-tree. Instead, store a pointer with the right type (struct pwm_reg
*).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Register was wrongly casted to (void *) in one case, and unnecessarily
casted in another case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The base variable type stored in config already has the right type. Such
kind of accessors have been removed in many other places.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In some case the structure enclosing the adc context
can be quite big, making static initialization quite
resource consuming
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
Enabling the FlexSPI HyperRAM results in a build error, due to a logging
module re-definition. Fixed by changing the log module name.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
increase available RX buffers to MCUX ethernet driver.
improves measured performance on RT1050 EVK zperf download
from 500Kbps to 22Mbps.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch extends the adxl362 driver by adding an option
to change the inactivity detection timeout at runtime.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Building lwm2m_client with CONFIG_NET_L2_OPENTHREAD=y leads to
following warning during build:
west build -s samples/net/lwm2m_client -b nrf52840dk_nrf52840 -- \
-DCONFIG_NET_L2_OPENTHREAD=y
zephyr/drivers/sensor/nrf5/temp_nrf5.c:115:10:
warning: zero-length gnu_printf format string [-Wformat-zero-length]
115 | LOG_DBG("");
Signed-off-by: Kiril Petrov <retfie@gmail.com>
CONFIG_SIFIVE_SPI_0_ROM (default y) was an option to disable spi0 if
used to access SPI Flash ROM. However, its design had a problem: it
relied on instance numbers. You had to set status okay for spi0 to make
it work (incongruent with the purpose of the option itself). This patch
makes things simpler: if such SPI0 is not available, simply keep it
disabled in DT. Bindings have been updated to mention this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use logical values of 0/1 for gpio_pin_set_dt and handle any
inversions as GPIO flags that might be required at a board level.
Signed-off-by: Kumar Gala <galak@kernel.org>
Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
When using the settings subsystem, the data argument argument passed to
flash_stm32_write_range() might not be 8-bytes aligned, causing an
unaligned memory access fault.
Fix that the same way as it was done for the STM32L4 in commit
652efa530f.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Now that we have 8 bits reserved for vendor specific GPIO flags,
introduce a new set of flags for nRF platforms to configure pins drive
mode. These new flags are equivalent to the previous existing ones, but
use a naming scheme the fits better with vendor hardware capabilities.
The table below shows the equivalence between old and new flag
| Old flags | New flags |
|---------------------------|-----------------------|
| `NRF_GPIO_DS_DFLT_LOW` | `NRF_GPIO_DRIVE_S0` |
| `NRF_GPIO_DS_DFLT_HIGH` | `NRF_GPIO_DRIVE_S1` |
| `NRF_GPIO_DS_ALT_LOW` | `NRF_GPIO_DRIVE_H0` |
| `NRF_GPIO_DS_ALT_HIGH` | `NRF_GPIO_DRIVE_H1` |
| `NRF_GPIO_DS_DFLT` | `NRF_GPIO_DRIVE_S0S1` |
| `NRF_GPIO_DS_ALT` | `NRF_GPIO_DRIVE_H0H1` |
| `NRF_GPIO_DS_DFLT_LOW \|` | `NRF_GPIO_DRIVE_S0H1` |
| `NRF_GPIO_DS_ALT_HIGH` | |
| `NRF_GPIO_DS_ALT_LOW \|` | `NRF_GPIO_DRIVE_H0S1` |
| `NRF_GPIO_DS_DFLT_HIGH` | |
Documentation has been written to explain in more detail the meaning of
the flags and how they can be used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The naming of the custom DS flags is not clear for nRF platforms. This
patch removes all the NRF_GPIO_DS* flags. New flags will be
re-introduced in a follow-up commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit avoid re-enabling the ADC,
because this starts conversion.
According to the RefMan (RM0008) of the stm32F10x mcu,
enabling the ADC will start the conversion
if the ADC is already enabled. "Conversion starts when
this bit holds a value of 1 and a 1 is written to it."
That's not what we want.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
cAVS and ACE gpdma driver have several similarities. This commit merge
this two drivers into a single one for Intel ADSP devices.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
When using the APIC imer in TSC deadline mode, also enable reading the
full 64-bit cycle counter value (via the k_cycle_get_64() call).
Signed-off-by: Bruno Achauer <bruno.achauer@intel.com>
When PINCTRL is enabled, the SCL and SDA pin numbers are not available
in configuration structures used for nrfx drivers initialization.
In this case, these pin numbers need to be obtained from peripheral
registers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Uses the dt_compat_enabled Kconfig preprocessor to set defaults
for each HDA driver.
Each direction is uniquely selectable which can be useful when building
with SOF where only some directions may wish to be enabled at any given
time.
By default, given the device tree (intel_cavs.dtsi) only the host
directions are enabled but an overlay may adjust that as needed.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Not all platforms support setting the LSE driving capability, causing
the build to fail for platform such as the STM32L072 if compiled with
CONFIG_STM32_LPTIM_CLOCK_LSE=y.
Adding an #ifdef guard around the call to skip it if not defined in the
HAL.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
In npcx series, not all GPIO pads support Multi-Input Wake-Up Unit
(MIWU) functionality. Hence, this CL adds checking whether GPIO's pad
configuration is valid first before using it.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Simplify the implementation by using gpio_dt_spec. Mostly
gpio_dt_spec is used as a common struct and lets us move
away from DT_INST_GPIO_LABEL.
Signed-off-by: Kumar Gala <galak@kernel.org>
Some stm32 devices, like stm32F4, do not have
a PLL Enable bit on the PLLP nor PLLQ divider
in their PLL config register (PLLCFGR).
The result is a empty function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The function get_pllsrc_frequency is added
with possible source HSI or HSE.
With STM32_PLL_P_ENABLED or STM32_PLL_Q_ENABLED,
this function is used by the clock control driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The TI SimpleLink SDK got updated to version '4.40.04.04' in 'hal_ti'.
This introduced renames of some functions in HAL and has to be reflected
in Zephyr drivers which make use of them.
This renames 'PRCMPowerDomainStatus' to 'PRCMPowerDomainsAllOn' in all
affected 'cc13xx_cc26xx' drivers.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
The hwinfo shell commands was missing human readable names for
* RESET_HARDWARE
* RESET_USER
* RESET_TEMPERATURE
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This CL introduces how to configure PSL (Power Switch Logic) pads
properties such as input detection mode/polarity, pin-muxing and so
on via pinctrl mechanism. It includes:
1. Add two pinctrl properties and their enums for PSL input
detection configuration.
psl-in-mode:
- "level"
- "mode"
psl-in-pole:
- "low-falling"
- "high-rising"
2. Add macro functions to get PSL input detection and pin-muxing
configurations from 'pinmux', 'psl-offset' abd 'psl-polarity'
properties.
Here is an example to configure PSL_IN2 as the PSL detection input and
its mode and polarity.
/* A falling edge detection type for PSL_IN2 */
&psl_in2_gp00 {
psl-in-mode = "edge";
psl-in-pol = "low-falling";
};
A device will be introduced later which uses this pinctrl node to
configure PSL input detection settings and how to turn off VCC1 power
rail by PSL_OUT.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This peripheral combines a hardware-based USB CDC ACM serial interface
and a JTAG interface.
It is present in the ESP32-C3.
Signed-off-by: Martin Jäger <martin@libre.solar>
The uart_pipe driver is not dependent on any console driver,
however a serial driver is required.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
These two timers were sharing pretty much the same code. Actually
mtl timer was a "superset" of cavs timer. Just merge them into a
single one called intel audio dsp timer (intel_adsp_timer).
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Meteorlake support as part of the Intel ADSP family.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Co-authored-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Enjia Mai <enjia.mai@intel.com>
Co-authored-by: Flavio Ceolin <flavio.ceolin@intel.com>
Co-authored-by: Tomasz Leman <tomasz.m.leman@intel.com>
Co-authored-by: Bonislawski Adrian <adrian.bonislawski@intel.com>
Co-authored-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
Add timer driver based on CAVS driver and adapted for Meteor Lake.
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add TLB driver specific for Meteorlake.
Add missing kconfig resource and fix include path
add hpsram power up and ref counter
Use memblock to track physical page usage in mtl tlb driver. The
applications that will be using the tlb memory driver should not
track the physical page mapping to virtual address space:
- adds an option to use the phys argument value of 0 to tell the
driver to autonomously assign physical pages upon map request
- makes the tlb driver use memblock to track mapped physical pages
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Replace eswifi_gpio with gpio_dt_spec. We can replace devicetree
label based access with this change as we try and phase out the
usage of the 'label' property.
Signed-off-by: Kumar Gala <galak@kernel.org>
when the dma channel is stopped, the irq is no more
relevant ; clear any irq but do not process it.
Fix Typo on comments and add LOG_DBG on channel increment.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The SSD16xx uses a separate pin to indicate if an SPI transfer is a
command or data. This means that driver needs to split most SPI
transactions into two distinct transactions, one for commands and one
for data. The driver currently doesn't request SPI_HOLD_ON_CS which
means that the chip select will be released momentarily between the
command and data phase.
Update the driver to request SPI_HOLD_ON_CS and SPI_LOCK_ON to lock
the bus and complete both phases of a command in one atomic operation.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
spi_context_cs_configure_all() is currently called from
spi_bitbang_transceive(). This causes a glitch when combined with
SPI_HOLD_ON_CS is used.
Move the initialization to spi_bitbang_init which is what the other
SPI drivers seem to do.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The SPI bitbang driver doesn't correctly initialize the list of CS
GPIOs. As a consequence, SPI buses using the bitbang driver won't
drive CS low. Add the missing initialization.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Get the vref-mv through the ADC API instead of the device tree. This
saves 8 bytes of SRAM and will be future proof in case, one day, support
for a variable vref is added.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The value is unused in this structure is unused and can be accessed
through the adc_ref_internal() function.
This saves 4 bytes of SRAM.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Allow the battery voltage to be read through the ADC even if the
CONFIG_STM32_VBAT driver is not enabled.
I guessed this part of code is conditionally compiled depending on
CONFIG_STM32_VBAT because this feature, and hence the
LL_ADC_CHANNEL_VBAT constant is not available on all families. As the
feature is already checked at runtime (as the same driver supports
multiple instances), we can conditionally compile it depending on
LL_ADC_CHANNEL_VBAT instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This adds basic support for the watchdog timer on the RP2040 MCU and
Raspberry Pi Pico development board
Signed-off-by: Jamie McCrae <spam@helper3000.net>
When we moved to gpio_dt_spec forgot to remove the older
fields used for gpio related access. Remove them as they
are used by the driver anymore.
Signed-off-by: Kumar Gala <galak@kernel.org>
When an I2C transaction completes, the driver should clear all the FIFO
status. Otherwise, it has the chance to break the operation of the next
transaction. This commit sets the CLR_FIFO bit in the SMBFIF_CTS
register to clear all the FIFO status at the beginning of an I2C
transaction.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Invert the physical address given to pcie_ctrl_region_translate() to
match the PCI BAR layout. Previously, physical addresses for memory
space BAR were exposed to bit 3 (prefetchable bit) and 2 (1 type bit) of
the header.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Move driver to use spi_dt_spec and i2c_dt_spec for SPI and I2C bus
access, respectively.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
As we work to phase out devicetree 'label' properties, convert
driver to just use ETH_0/ETH_1 instead of DT_INST_LABEL for
logging purposes.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit adds support for the ds18b20 1-wire temperature sensor.
The sampling resolution of the sensor can be set in DT.
In case only a single device is on the bus, the driver issues
skip_rom commands. However, in case DT defines several devices,
the driver will use match_rom commands and therefore it is necessary
to set the rom_id of the device via the sensor attribute interface before
being able to sample sensor values.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The zephyr-serial w1 driver introduced in this commit implements
all routines for the w1 api on top of the zephyr serial driver.
W1 bit read, write, and reset operations are executed by issuing
polling zephyr serial byte read and write operations.
The driver should be usable on most platforms in zephyr that have
implemented support for the polling procedures of the serial driver.
As not all serial drivers are implemented exactly the same minor
additional quirks may be needed on some platforms.
The most notable difference of polling serial driver implementations
seems to be that some return immediately from poll_out after the
transmission was started(e.g. STM32) and others wait until
the transmission was completed before returning from poll_out
(e.g. NRF). While this has influence on the timeout, both types
are supported by this driver because the driver waits for a
configurable time period until it terminates the read.
The driver needs an appropriate open drain interface to be able
to communicate with slaves.
In the simpliest case this might be achived by configuring the mcu pins
in open-drain configuration with a (sufficiently small) pull-up to 3V3/5V.
Otherwise an external circuit needs to provide this interface.
Overdrive and Standard Speed modes are supported by this driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces a new api for the net layer of Dallas
1-wire protocol.
For single drop configurations w1_read_rom, and w1_skip_rom commands are
provided.
For multidrop configurations w1_match_rom, w1_resume_command,
w1_search_rom, and w1_search_alarm routines are provided as well.
Additionally, the reset_select routine, conditionally depending on the
bus configuration, either executes a match_rom, or a skip rom command.
A w1_write_read command simplifies the typical scenario of addressing
a device, writing a few bytes to the device and reading back the answer.
Additionally w1_crc8, and w1_crc16 are added as wrappers around the
zephyr in-tree crc8 and crc16_reflect implementations.
The former may be used to verify the validity of the rom id, while the
latter is used for integrity checking of many eeprom, and authenticator
commands.
The general search command does not support filtering on
the family code.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces a new api for the Dallas 1-wire protocol.
The api includes link functions for read and write operations on
bit, byte, and block level, as well as functions to reset and
lock the bus.
The bus configuration is derived from the device tree and can be
queried using w1_slave_count routine.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add a minimal EFI console driver to support printf, this console driver
only supports console output. Otherwise the printf will not work.
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
This patch is to enhance the uart ns16550 driver to get clock frequency
from clock manager or devicetree if clock_frequency is defined.
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
The default S0S1 drive setting is not suitable for TWI/TWIM pins.
Override it with S0D1 as for some SoCs (e.g. nRF52833) without
this the peripheral will not work properly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix indentations of `adc_stm32_oversampling` function comments
to have everything aligned properly.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
According to the ES0418 about the ADC of the stm32G071
or other stm32g0x devices:
for sampling time set to 1.5 or 3.5 cycles,
the sampling in a single ADC conversion or in the first
conversion of a sequence takes one extra cycle.
Minimizing to 7.5 is fine.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- If the HAL headers expose the USBPRE flag, then we're probably
dealing with a F103 - using the same fundamental logic as the
code for the OTG models, set-up the USB Prescaler correctly.
- Fixes#47146
Signed-off-by: Chris Collins <chris@realsimgear.com>
TCA954X driver was not enabled since introduction of
new compatibility fields.
We now set I2C_TCA954X depending on related "okay"
compat fields in DT.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
After replacing STM32_SRC_PLLCLK by the STM32_SRC_PLL_x sources
this function is no longer needed and are therefore removed.
Also, those functions returned a wrong frequency.
They should have used get_pllsrc_frequency() instead of get_pll_source()
to get the input frequency.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The SOC specific implementations of the clock_stm32_ll_common driver
included the PLL specific functions only when PLL was selected as sysclock.
This commit changes the condition from "STM32_SYSCLK_SRC_PLL"
to "defined(STM32_PLL_ENABLED)".
As a result the pll could also be used as peripheral clock source
in case it is not the sysclock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds support to select pll outputs as peripheral clock
sources to the stm32 common driver.
With this commit they are only available on
STM32G0, STM32G4, STM32L4, STM32L5, STM32WB, and STM32WL.
Support for STM32F2, and STM32F4, which also have p,q,r dividers,
is not enabled in this commit.
Also, stm32_clock_control_get_subsys_rate is extended to return
the configured frequency in case they are enabled, otherwise 0.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit configures the PLL_P divider for SOCs compatible to the
stm32_ll_common driver in case a value was defined via a dts property.
Additionally, in case the divider value is defined in the device
tree, the respective pll output is enabled during initialization
in set_up_plls().
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In the stm32_ll_common driver the PLL_Q divider should not
be directly written to RCC->PLLCFGR->PLLQ, but should be
translated to the matching register value.
i.e. shifting the value to the correct position of the register
is not enough.
This commit makes sure the divider value taken from device tree, is
correctly translated ot the matching register register value by
converting it to a STM32CUBE LL definition LL_RCC_PLLQ_DIV_xx.
Typcial divider to register value mapping:
G0, WB, WL:
Dividers 2-8 mapped to register values 1-7(0 reserved).
G4, L4, L5:
Dividers 2,4,6,8 mapped to reg values 0,1,2,3.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
All these series share the same defines, and while they are not used
by all socs of the common-driver, this is not exptectd to lead to
any conflict.
By moving the defines they can also be used in clock_stm32_ll_common.c
Additionally, the stm32g0 pll_div define was renamed to pllm
in order to match the other series.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The STM32_SRC_CLOCK_MIN and STM32_SRC_CLOCK_MAX defines
are not really needed because non valid clock sources are already
filtered out by the precompiler.
Only STM32_SRC_CLOCK_MIN was used once in code and can be replaced.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes a bug where an already received Rx frame could not be
processed by the IEEE 802.15.4 driver.
In the current implementation, buffer is marked as free and released to
the buffer pool after `nrf_802154_buffer_free_raw` finishes executing.
However, delays caused by thread scheduling might result in a new frame
being already received and provided to the driver before
`nrf_802154_buffer_free_raw` returns. Such a situation ends in an
assertion now.
This commit changes that behavior by marking the buffer as free before
calling `nrf_802154_buffer_free_raw`.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
This commit increases verbosity of serialization error handler for
nRF5340 application core. The handler prints the error code now.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
As we work to phase out devicetree 'label properties, convert
driver to just use dev->name instead of DT_INST_LABEL.
Signed-off-by: Kumar Gala <galak@kernel.org>
Instead of using or'ed list of Kconfig options listing the compatible
series with what can be called "stm32h7 variant", use the matching
compatible information.
This will prevent to update the driver next time that a compatible series
is ported into zephyr.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If the preprocessor constant ESP_MAX_DNS is defined as 0,
Coverity reports a condition that can never be true, and some
dead code as well. This also violates MISRA rules on dead code.
This is caused by this segment in drivers/wifi/esp_at/esp.h:
#if defined(CONFIG_WIFI_ESP_AT_DNS_USE)
#define ESP_MAX_DNS MIN(3, CONFIG_DNS_RESOLVER_MAX_SERVERS)
#else
#define ESP_MAX_DNS 0
#endif
Fix this by never setting ESP_MAX_DNS to 0, as is the currently
case. Define ESP_MAX_DNS only if it is configured through
CONFIG_WIFI_ESP_AT_DNS_USE and CONFIG_DNS_RESOLVER_MAX_SERVERS:
#if defined(CONFIG_WIFI_ESP_AT_DNS_USE)
#define ESP_MAX_DNS MIN(3, CONFIG_DNS_RESOLVER_MAX_SERVERS)
#endif
Since CONFIG_DNS_RESOLVER_MAX_SERVERS is 1 or greater, ESP_MAX_DNS
will always be greater than 0.
If, on the other hand, ESP_MAX_DNS is not defined, relevant
functions will be reduced to empty stubs, since in that case
they do not make sense.
There could be a cleaner solution to this, but this one is the
least intrusive (involves less code changes).
Coverity-CID: 219490
Coverity-CID: 219513
Coverity-CID: 219520
Coverity-CID: 219524
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
Some EFR32 SoCs use a secure element subsystem to manage
security features (i.e., TRNG, secure bootloader or cryptographic
functions).
This driver relies on the SE Manager high-level API provided by Silicon
Labs. The API interacts with the SE subsystem, provides helper functions
to achieve cryptographic operations and ensures that only one operation
is running at a time by using mutexes and semaphores.
Instead of relying on the SE Manager from Silicon Labs, one could
recreate the behaviour of the Manager and put the code in the crypto
driver folder and create a dependency for other drivers using the crypto
manager (e.g., keys, entropy).
I went for the SE Manager API as it is already there and supported by
Silicon Labs.
Tested using the random subsystem.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The clock of the octospi peripheral is directly defined
by the DTS and configured by the clock_control_on function.
No specific stm32cube function is required then.
The clock control is taking this clock source to calculate
the clock rate.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move from using Kconfig NET_PPP_UART_NAME to a devicetree chosen
property ("zephyr,ppp-uart"). This is similar to a number of other
functions like "zephyr,shell-uart" or "zephyr,bt-uart".
As part of this we rework the init code a little to use
DEVICE_DT_GET for the modem gsm-ppp case.
Signed-off-by: Kumar Gala <galak@kernel.org>
Rather than using a devicetree node label, utilize the driver
compat and thus DT_INST which is standard means for most drivers.
Signed-off-by: Kumar Gala <galak@kernel.org>
There is a build warning of unused `adc_stm32_oversampling_ratioshift`
function: [-Werror=unused-function]. This makes twister fail, as all
warnings are treated as errors.
Fix that by ifndef'ing adc_stm32_oversampling_ratioshift().
Fixes: c57a41c5d2 ("drivers/adc: stm32: do not disable the ADC if
resolution is unchanged")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
As we work to phase out devicetree 'label' properties, convert
driver to just use sx126x instead of DT_INST_LABEL for logging
purposes.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move the `REQUIRES_FULL_LIBC` dependency from `config LORA` to
`config LORAWAN`. The commit that added the `select` (f590d4fa) mentions
that this is required by `loramac-node`, which is only used by LoRaWAN,
not the base LoRa code.
This results in small FLASH savings when compiling the samples, but can
result in larger savings in more complex applications:
```
// With REQUIRES_FULL_LIBC
west build -b 96b_wistrio zephyr/samples/drivers/lora/send/
[162/162] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37708 B 128 KB 28.77%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
// Without REQUIRES_FULL_LIBC
[181/181] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37444 B 128 KB 28.57%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Change logic in `modem_cmd_handler_setup_cmds` and
`modem_cmd_handler_setup_cmds_nolock` to always sleep
after each sent AT command.
The issue was found using a logic analyzer while debugging 'NO CARRIER'
from a BG95 modem while being in data mode.
The reason 'NO CARRIER' occured was due to crosstalk to DTR which
terminated data mode.
The logic analyzer also revealed that without the delay the next AT
command is sent before the whole 'OK\r\n' is received. This is not
addressed in this commit.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/47082
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
In prepration for configuring I2C/SPI defaults at the board level,
change the DesignWare GPIO driver's clock gate option to depend on clock
control instead of selecting clock control. This breaks a Kconfig
dependency loop when adding the following to a board's
Kconfig.defconfig:
config SPI
default y if SENSOR
There aren't any in-tree users that enable the clock gate option, so
there aren't any places in-tree that now need to enable the clock
control driver. Out-of-tree users that set CONFIG_GPIO_DW_CLOCK_GATE=y
will now also need to set CONFIG_CLOCK_CONTROL=y.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
In preparation for extending samples/sensor/magn_polling to support
additional magnetometer drivers, enable these drivers by default when
the sensor driver class is enabled (CONFIG_SENSOR=y) and a compatible
devicetree node is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The fxos8700 device supports 3 modes: accelerometer-only,
magnetometer-only, or hybrid (accelerometer and magnetometer) modes. The
accelerometer-only mode is register compatible with mma8451q, mma8652fc,
and mma8653fc, which allows the fxos8700 driver to be used with these
devices as well.
Most in-tree boards can use hybrid mode because they have the fxos8700
device, therefore we change the driver default to match the common case.
For the handful of boards that have an mma86xx or mma84xx device, we
override the driver default to accelerometer-only mode. As a result, we
can enable the magn_polling sample application for the fxos8700 driver
without having to add a bunch of board-specific configuration overlays
for hybrid mode.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The I2C API recently updated terminology to replace "master" with
"controller", but this instance in the mcux lpi2c driver was missed.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
If hw-flow-control is set in the uart section of the device tree source,
it is read by gsm_ppp.c and AT+IFC=2,2 is sent to the modem.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/46928.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix issue #45168.
When setting high bit timing, the controller is timing
out when trying to switch from an internal mode to another.
To fix this issue, we add some delay when switching modes.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Fix issue #45169.
With this CAN controller, changing bit timing has to be done in controller
reset mode, resetting some registers to their default values.
TCR register, that is enabling loopback mode is one of these.
Because of this reset, the controller switch back from loopback
to normal mode without the test suite being notified, preventing
receiving sent frames afterwards.
To fix this issue, we are now storing useful registers values before
switching to reset mode and restoring these values in halt mode
before going back in operation mode.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Default mode must be debug or it can't ever be enabled.
Allow debug log messages to be printed when using
mdm_hl7800_send_at_cmd API.
Add logging to active bands and network coverage commands.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
According to the formulas found in the reference manuals of the SoC
families using the "st,stm32-temp-cal" version of the temperature sensor
(i.e. G0, G4, H7, L0, L1, L4, L5, U5, WB, WL), the temperature is
computed with the following formula:
T = ((TS_CAL2_TEMP - TS_CAL1_TEMP) / (TS_CAL2 - TS_CAL1))
* (TS_DATA - TS_CAL1) + TS_CAL1_TEMP
What is called ts-cal-offset in the stm32_temp driver is therefore the
same value as TS_CAL1_TEMP1. Use it directly instead of defining another
property.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The stm32_temp driver defines the ts-voltage-mv property to determine
the reference voltage of the ADC in the temperature computation. However
this information is already available in the device tree at the ADC
level (even with the same default value). Use it through the ADC API
instead of duplicating the information.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The AIVECT (All Interrupt Vector Register) register provides us a quick
way to determine SOC interrupt number. But sometimes we get interrupt
number 0 from the register and caused assertion of unhandled interrupt.
To avoid the assertion, we look for all ISRs (Interrupt Status Register)
and IERs (Interrupt Enable Register) to find the highest priority pending
interrupt and return it to caller.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Using a global error flag could lead to an error on one
socket appearing as an error with a separate socket instance.
Socket errors moved into the socket context.
Continue to use global error flag for commands not
related to sockets.
For TCP sockets closed by the server, don't try and close
the socket again when offload_put is called.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The Zephyr API supports multiple I2C targets addresses, and the STM32
I2C v2 implementation allows to define up to 2 targets addresses.
This patch adds support for a second I2C target address. It adds a new
config entry in the i2c_stm32_data structure, and uses the fact that
both addresses can be enabled and disabled independently. In the
interrupt, the target being addressed is determined using the address
match code from the interrupt status register.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
It allows the path for VBATEN on stm32 series
to monitor the Vbat voltage, in case of CONFIG_STM32_VBAT
Add the common Vref value as a property of the ADC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Similar to the internal temperature sensor of the stm32
this driver controls the Vbat monitoring in Volts,
using an ADC internal input and the stm32-vbat node of the DTS.
The ref voltage is given by the ADC.
Note that stm32F1x does not propose the feature.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
if ISR is called for an event on pin X but
another event occurs on pin Y in between the call
to GetStatus() and ClrStatus(), pin Y event wil get
cleared without being processed
Signed-off-by: Maxim Adelman <imax@fb.com>
The driver returns -EIO when a pin to be disconnected was not earlier
configured as input or output, what is not in line with the GPIO API.
This commit changes the driver to return 0 in such case.
Also -EIO is incorrectly returned when an interrupt trigger cannot be
configured in the nrfx_gpiote driver. This commit corrects this value
to -EINVAL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The gpio_dev field of struct spi_cs_control is deprecated. The
driver was already using SPI_CONFIG_DT_INST, so we should be
using the associated gpio member of spi_cs_control.
Signed-off-by: Kumar Gala <galak@kernel.org>
Updates the API and types to match updated I2C terminology. Replaces master
with controller and slave with target.
Updates all drivers to match the changed macros, types, and API signatures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Move to using SPI_CONFIG_DT_INST macro to initialization the
struct spi_config cfg_a. This fixes an issue with how the old
code was initializing the deprecated fields of spi_cs_control.
Signed-off-by: Kumar Gala <galak@kernel.org>
Use hal function for low level access.
Use device tree for hardware configuration.
Support for esp32s2.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit moves the hardware configuration for ledc
peripheral to the device-tree instead of Kconfig.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
In case the resolution is already correct (probably the common use
case), do nothing instead of disabling the ADC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ADC is currently disabled and re-enabled multiple time during each
read. Enabling the ADC is not a free operation on some series and some
internal channels like VREFINT take even longer. This patch improve the
situation by removing the calls to adc_stm32_enable(), replacing it by a
single call just before triggering the conversion.
This also open the possibility to not reconfigure the ADC if it is
already configured, implemented in the following patches.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This fixes a bug in the sm351lt driver whereby global triggering will
cause an MPU fault due to an unset pointer.
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Since the driver uses spi_dt_spec there is no need for an explicit
spi_cs_control variable. The variable is unused.
Signed-off-by: Kumar Gala <galak@kernel.org>
As with previous commit, make the timer irq a simple integer variable
exported by the timer driver for the benefit of this one test
(tests/kernel/context).
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This test has gotten out of control. It has a giant #if cascade
enumerating every timer driver in the Zephyr tree and extracting its
interrupt number. Which means that every driver needs to somehow
expose that interrupt in its platform headers or some other API.
Make it a simple integer variable exported by the timer driver for the
benefit of this one test.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit introduces driver for granting access for own grant
table and for mapping/unmapping foreign gref. Grant tables are used
for data exchange between Xen domains via shared memory page(s) (e.g.
for sharing ring buffer with driver data) This functionality is
widely used and needed for implementing PV backend/frontend drivers.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Change the Kconfig prompt for the Xilinx Zynq-7000/ZynqMP PS UART driver to
indicate whichs SoCs it supports.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Do not lock/unlock the System Level Control Registers (SLCRs) in the Xilinx
GEM ethernet driver. The SLRCs are unlocked once at boot time.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
We get type mismatch errors because of use of K_MSEC. As the timeout
is defined in terms of milliseconds and k_uptime_get() returns
milliseconds we can just remove K_MSEC usage.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit rewrite renesas R-Car clock driver in order
to be able to support any new SoC easier.
This work is so creating a clock driver per soc alongside a
common driver for all reneasas r-car boars.
- drivers: create a driver per soc
- create a common driver
- create a common header used by soc & common driver
- create a soc specific driver calling for common driver
- dts: use new compatible
- use old yaml as common yaml
- create a new "child" yaml to define the new compatible field
- change compatible in device tree
As in Linux, the driver can support both r8a77951 and r8a77950
SoC's so we decided to name the new driver as in Linux with Zephyr
prefix : "clock_control_r8a7795_cpg_mssr.c".
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This commit is reworking clock definition in
order to match linux filetree and definition
as much as possible.
- dt-bindings: rework renesas clocks dt-bindings
- regroup renesas related dt-bindings in a folder
- rename renesas rcar common dt-binding to match linux name
- add soc specific dt-binding matching linux name
- soc dt-bindings are defining clocks matching linux names
- dts: use new clocks names
- move clocks definitions in SoC layer for each core clock entry
- driver: use new clocks names
As seen in this commit, we are declaring clocks for "R8A7795" SoC
to match linux names.
Linux is not declaring "R8A77951" SoC specific files because
its also supporting the first H3 SoC version numbered "R8A77950".
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Driver was in a weird state: it made use of
DT_INST_FOREACH_STATUS_OKAY, however, it had an assertion to support a
single instance and used instance 0 properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move driver to use gpio_dt_spec for GPIO interrupt handling.
Added check to vcnl4040_trigger_set to handle case of trigger
mode enabled but the devicetree doesn't have an int_gpios property.
Also, moved up the checking/handling of gpio port device in
vcnl4040_trigger_init so that if we error out its before we
setup any threads and such.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fix wrong control register address used in uart_altera_jtag_init
function which caused memory corruption.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
STM32_DT_CLOCKS was designed to take a device tree node label name as
argument: STM32_DT_CLOCKS(uart1)
Change its implementation to take a node identifier instead:
STM32_DT_CLOCKS(DT_NODELABEL(uart1)).
This make its usage more flexible since the argument can now be extracted
from other DT macros such as DT_PARENT. Then, the following can be done:
STM32_DT_CLOCKS(DT_PARENT(child_node_label)).
Since it is now possible implement STM32_DT_INST_CLOCKS using
STM32_DT_CLOCKS.
Finally, update existing STM32_DT_CLOCKS users and convert
STM32_INST_CLOCK_INFO users to STM32_CLOCK_INFO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On FVP platform, when parameter 'bp.refcounter.use_real_time' is set
to 1, cntvct_el0 isn't count from 0 and may cause overflow issue in
first timer compare interrupt.
'bp.refcounter.use_real_time' is 0 by default.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
Fast hardware with slow timer hardware can trigger and enter an
interrupt and reach 'sys_clock_set_timeout' before the counter has
advanced.
That defeats the "round up" logic such that we end up scheduling
timeouts a tick too soon (e.g. if the kernel requests an interrupt
at the "X" tick, we would end up computing a comparator value
representing the "X-1" tick!).
Choose the bigger one between 1 and "curr_cycle - last_cycle" to
correct.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
The magnetometer data read from AK9863 is assumed to be big endian
(like the accelerometer & gyroscope data).
However it is in little endian, which means the appropriate byteorder
function is sys_le16_to_cpu().
See the MPU925 register map:
https://3cfeqx1hf82y3xcoull08ihx-wpengine.netdna-ssl.com/wp-content/uploads/2017/11/RM-MPU-9250A-00-v1.6.pdf
At 5.6 HXL to HZH: Measurement Data
Signed-off-by: Loris Schmit <loris.schmit@inovex.de>
Some text in help section was documenting the compatibility of driver
variants with stm32 series.
This is duplicate of information versus device tree which should be
used as single source of information for hardware description.
Remove these lines, so we don't have to touch this driver each time
a series is added.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move variable declaration inside if-def to remove compiler
warning when building the driver without trigger.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Remove wrapper functions for getting i2c bus and i2c bus
address. This is done here to make it easier to move this
driver to i2c_dt_spec while still having clear separation
between commits.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Move driver to use gpio_dt_spec for GPIO interrupt handling. Since
the driver can support multiple instances its possible that some
have irq's in dts and some don't. So we add a check in
itds_trigger_set to make sure we have a GPIO device if we are
trying to set a trigger.
Signed-off-by: Kumar Gala <galak@kernel.org>
Simple driver that allows one to choose the clock speed of xtensa cores.
It's basically a shim layer on top of SOC level driver.
Also, a really simple test case was added, mainly to ensure things are
build and are sane.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
On SoCs with two USB controller, Zephyr selects the FS one, and in that
case the ULPI clock needs to be disabled in sleep mode for the
controller to work.
On SoCs with a single USB HS controller, this operation is not needed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock uses slightly different names on STM32H7X as those
SoC can have more than one USB controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
On STM32H7X SoCs, both USB controllers are HS capable, however it is not
possible to connect an ULPI PHY to the USB2 one, which limit it to FS.
Therefore the ULPI clock in sleep mode has to be disabled for USB2 in
all cases. The ULPI clock for USB1 is already disabled when needed in
the usb_dc_stm32_clock_enable() function like for other SoCs.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Do not manually enable the USB clock on STM32H7, as it is already done
in usb_dc_stm32_clock_enable() using the values in the device tree.
This partially fixes the build for STM32H7 devices with a single USB
controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock is disabled by default in run mode, there is no need to
disable it again. It is however enabled by default in sleep/low power
mode, so it needs to be disabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
mcuboot may use a uart as logger. After application boot from mcuboot,
uart remains in some unknown state. It could leads to some unpredictable
uart behaviour. This commit fixes the issue by resetting of uart state
at the beginning of uart init.
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
Some services require the ability to query whether a GPIO pin
is configured as an input, output, both, or neither prior to
performing any operations at the service level. This is done
in order to reduce state tracking within the service.
To that end, this change adds
* `gpio_port_get_direction()`
* `gpio_pin_is_input()`, and
* `gpio_pin_is_output()`
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
This commit fixes issue with undefined value during position calculations.
Shift for positions may be >32, so we need to explicitly use unsigned long
casting to prevent unexpected behavior during event handling.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit fixes barrier usage in Xen event channel driver. Previously
compiler_barrier() was used and it did not prevent processor from
re-ordering of the write operations, that is needed for correct event
handling. It is now changed to data memory barrier (dmb()), which will
work as expected in this situation.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This patch modifies the ADXL362 driver to use the new
SENSOR_TRIG_MOTION trigger for activity detection
and SENSOR_TRIG_STATIONARY for inactivity detection.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Logging v1 has been removed and log_strdup wrapper function is no
longer needed. Removing the function and its use in the tree.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This adds a table to set the dma channel priority from the DTS
The config bits are converted through the table_priority
to match the DMA_Priority_level of the stm32cube HAL.
Fixes#46725
Signed-off-by: Francois Ramu <francois.ramu@st.com>
MISRA C:2012 Rule 8.2 (Function types shall be in prototype form with
named parameters.)
Added missing parameter names.
Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
This commit adds new functions, which can be used for Xen event channel
management (allocation, interdomain binding etc.). Such functionality
is needed for Xen PV driver development in Zephyr.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
CAN1 and CAN2 share the memory for the filter banks.
This commit adds an offset for filters installed for CAN2, allowing to
use both CAN instances simultaneously.
The hardware allows to freely split the avalable 28 filters between
CAN1 and CAN2. In order to simplify the driver implementation, it only
supports an equal split of 14 filters per instance. This is the same
amount of filters as available in MCUs with only a single CAN.
Signed-off-by: Martin Jäger <martin@libre.solar>
Remove two functions which were only called from one place and did
not improve readibility of the code.
Signed-off-by: Martin Jäger <martin@libre.solar>
This commit unifies the driver initialization for can1 and can2
instances so that a single macro can be used.
Enabling the master clock for can2 as introduced in 8ab81b02 had to
be moved to devicetree in order to have the same CAN_STM32_CONFIG_INST
macro for all instances.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add I2C bus recovery support to the NXP MCUX LPI2C driver. Since the LPI2C
peripheral block does not natively support I2C bus recovery, recovery is
performed using GPIO bitbanging.
Fixes: #42574
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.
This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Update edac shell comments reflecting devmem move from edac to a
special shell module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This patch removes a superfluous write to the INTMAP1 register
that happens because the byte count was previously wrong.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
This commit adds a check for the validity of the "sub_system" param in
clock_control_on.
While for clock_control_off there was a check if the clock_subsytem
parameter is in range of STM32_PERIPH_BUS_MIN and STM32_PERIPH_BUS_MAX
this check was missing for clock_control_on.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Entering deep sleep mode stops the source clock of the ADC module and
could corrupt the ongoing ADC conversion. This commit lets ADC driver
acquire the PM lock during the ADC operation (either single conversion
or repetitive scan) and release it when the ADC conversion stops.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
the return is missing at the end of function which causes compilation
warning and block the build on github.
"warning: control reaches end of non-void function [-Wreturn-type]
92 | }| ^"
Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
wait_write_queue() get passed a device and an offset to compute the
sector number and verify it is valid. However both operations are
already done by the caller, so let's pass directly the
flash_stm32_sector_t value instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The STM32H7 flash driver read-back a register after writing it to ensure
it is flushed. This is very fragile and might break if a new compiler
version slightly reorder the instructions. Instead use a __DSB()
barrier like done on other STM32 SoC, which ensures that the registers
and the data writes are flushed at the compiler level, but also at the
Cortex-M7 level.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
As the erase time for a sector differs by a few order of magnitude for the
various SoCs of the STM32H7 family, use the just added max-erase-time
property from the device tree instead of the hard-coded 4 seconds value.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit drops the `IRAM_ATTR` macro from the function declarations
because:
1. `IRAM_ATTR` macro makes use of the `__COUNTER__` preprocessor macro,
which increments for every macro invocation and causes the section
specified in the forward declaration to not match that of the
function definition.
2. Section attributes need not be specified for forward declarations.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Fix the flow of I2C enable interrupt. We should enable the interrupt
after I2C configuration is completed to avoid pending interrupts and
cause errors irq.
Test port:
i2c_ite_it8xxx2: i2c0
i2c_ite_enhance: i2c4
Test:
tests\drivers\i2c\i2c_api --> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
-Kept getting an error on STM32g0xx chips that didn't have q-divisor.
-Changed to set prescaler only if it's being used.
Signed-off-by: Dan Higginbotham <daniel@dedesignworks.com>
The FDCAN clock was being enabled using HAL APIs instead of the generic
clock control API.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Support writing to NOR-Flash over OSPI using
the following modes:
* 1-1-1
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion for write opcodes.
Allows users to set what write/program opcode is used
in the DTS (not for OPI mode).
Will use some default PP opcodes based on the mode.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support to read and erase NOR-Flash over OSPI using
the following modes:
* 1-1-2
* 1-2-2
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion and gets address width
from the SFDP:BFP.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds:
* PP and Read 4-Byte command defines
* PP 1-1-2 define
* Missing 1-2-2 (0xBB) and Read Fast (0x0B) command defines
Re-arranges the commands so that they stay in order.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Move to using NET_DEVICE_DT_DEFINE_INSTANCE instead of
NET_DEVICE_INIT_INSTANCE as the driver is devicetree based and it
lets us remove DT_LABEL usage in the driver itself.
Signed-off-by: Kumar Gala <galak@kernel.org>
The measurement time in normal mode was too short.
With this commit the maximum value of the datasheet is applied.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The driver supported getting register shift from Devicetree, from a
custom definition in SoC headers (fragile) or, it took a default value.
This change simplifies things by making reg-shift property required in
all instances.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
For devices with more than one CAN peripherals, CAN1 is the master and
its clock has to be enabled also if only CAN2 is used.
Signed-off-by: Martin Jäger <martin@libre.solar>
Files including <zephyr/kernel.h> do not have to include
<zephyr/zephyr.h>, a shim to <zephyr/kernel.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
MISRA C:2012 Rule 7.2 (A `u' or `U' suffix shall be applied to all
integer constants that are represented in an unsigned type)
Added missing `U' suffixes in constants that are involved in the
analyzed build, plus a few more not to introduce inconsistencies
with respect to nearby constants that are either unused in the
build (but implicitly unsigned) or are used and are immediately
converted to unsigned.
Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
The current implementation for events channel is using an empty
callback for every unbind channel and the interrupt is clearing
every event and calling the callback.
However in a scenario where a domain fires a notification when
another has not yet bind the channel, the event will be missed.
To address this limitation, this commit is keeping track of
missed event channel notification when the empty callback is
used, a function to retrieve and clear the missed event is
introduced.
Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
This commit extends Nordic's ieee802154 driver with the possibility to
set Tx power for every transmission separately.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
This commit extends the `struct net_pkt` structure with
`ieee802154_txpwr` field that contains signed value of the desired
transmission power of a IEEE 802.15.4 frame in dBm.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Remove intel_s1000_crb pinmux driver. The board is no longer available
or supported in the zephyr tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When defined as 'char', the compiler notices that the memcpy targeting that
address will write more than one byte which generates a warning. Use an
array instead so that the compiler doesn't assume a specific size.
Signed-off-by: Keith Packard <keithp@keithp.com>
Sensor value computation was creating a 64-bit integer value, passing
that to 'abs' and assigning that to an int32_t result and then sanity
checking the result. If the computation goes badly wrong, then the range
reduction of 64-bit to 32-bit values could generate a falsely in-range
value.
Instead, perform the computation in 64-bits, range check that value and
then assign to a 32-bit variable.
Signed-off-by: Keith Packard <keithp@keithp.com>
This driver carefully saved the errno value from the failing call and
then didn't use it in the ERROR report, using the potentially invalid
current errno value (which may have been set by the close call).
Signed-off-by: Keith Packard <keithp@keithp.com>
Remove unused WS2812_GPIO_CLK macro that references DT_LABEL. The
WS2812_GPIO_CLK macro isn't used anywhere so remove it since we
want to minimal DT_LABEL references in drivers.
Signed-off-by: Kumar Gala <galak@kernel.org>
Added bus locking mechanism, this patch resolves deadlocks
for more than one device on i2c bus, it is based on i2c_sam0 code.
Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
This patch adds driver for the Microchip Polarfire SOC MSS QSPI
controller.
The interrupts of the MSS QSPI are routed through PLIC(Platform level
interrupt controller).
Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
- The MX25UM51345G flash is connected to FLEXSPI PortA for
mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Add watchdog support to the mimxrt595 platform.
The mimxrt595 platform is excluded from the watchdog
test case because the test case uses variables in the
noinit section that need to be retained through a reset
but the rt595 does not retain this memory through a
reset.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
This PR introduces a fix for DRX window being triggered to early during
CSL. Fixes were also introduced in the nrf 802154 radio
driver, so removed the unneeded DRX_ADJUST constant.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
All the gpio drivers are based on devicetree and thus we always set
HAS_DTS_GPIO, thus we don't need this Kconfig option anymore. Remove
uses as its safe to assume DTS is supported for GPIO.
Signed-off-by: Kumar Gala <galak@kernel.org>
This driver uses stack buffers to hold AT command strings which are
generated at runtime using sprintk. The buffers are only sized for the
expected range of values, not the full possible range given the datatypes
involved. Values outside this expected range could cause a buffer overflow.
To mitigate this, increase the size of each buffer to hold the full range
of each parameter type.
Signed-off-by: Keith Packard <keithp@keithp.com>
These drivers use stack buffers to hold AT command strings which are
generated at runtime using sprintk. The buffers are only sized for the
expected range of values, not the full possible range given the datatypes
involved. Values outside this expected range could cause a buffer overflow.
To mitigate this, increase the size of each buffef to hold the full range
of each parameter type.
Signed-off-by: Keith Packard <keithp@keithp.com>
The Kconfig encodes a dependency on SOC_FAMILY_ARM
even though there is no actual dependency.
This is generic ARM IP and can be used in any SoC.
Signed-off-by: Moritz Fischer <moritzf@google.com>
All the watchdog drivers are based on devicetree and we dont utilize
HAS_DTS_WDT anywhere so we can remove it.
Signed-off-by: Kumar Gala <galak@kernel.org>
Log message references gsm->context.data_rssi which is NULL
when CONFIG_MODEM_SHELL=n. Use gsm->minfo.mdm_rssi which is
internally used when accessing RSSI value.
Signed-off-by: Marek Metelski <marek@metelski.dev>
Check if ppp iface was actually up before taking it down and waiting
for NET_EVENT_IF_DOWN. This allows to call gsm_ppp_stop() even if
the PPP was never started, which previously caused the call to lock
forever. This case is useful, for example, if the modem didn't attach
to network in desirable time and user wants to abort PPP setup.
Signed-off-by: Marek Metelski <marek@metelski.dev>
add changes for command read-back and change from k_sleep to k_busy_wait
which will allow other threads to wakeup
Signed-off-by: Hari Haran Babu <hariharan@linumiz.com>
Signed-off-by: Marcel Graber <marcel@clever.design>
Do not truncate outgoing datagrams if they do not fit in maximum handled
packet size. Set EMSGSIZE errno and return -1 instead.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This includes a basic driver for built-in flash on the Texas Intruments
SimpleLink CC13xx/CC26xx SoC series.
The driver makes use of driverlib HAL from TI's SDK and was tested on
two LaunchXL development boards with CC1352R and CC2652R SoCs:
- CC1352R1 LaunchXL
- CC26x2R1 LaunchXL
Tests were done using:
- flash shell sample (samples/drivers/flash_shell)
- littlefs filesystem sample (samples/subsys/fs/littlefs)*
- MCUboot (bootloader/mcuboot/boot/zephyr)*
* additional changes in DTS for the boards were required (partitions
table) and are not part of this changeset (will be introduced later)
Some additional information about the implementation:
1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
"An individual 64-bit word can be programmed to change bits 1 to 0"
but it seems this 'alignment' requirement is handled internally by
the ROM function and thus 'write-block-size' is set to 1.
2. Interrupts, VIMS and line buffers are disabled during flash content
update (write or erase) and restored afterwards as recommended by TI.
3. Only RAM to flash write is supported (source of data to be written to
flash can't point to flash).
4. The driver doesn't take care of flash sector protection disable as
that functionality is handled by CCFG. Write or erase requests which
refer to a protected area will fail.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Coverity reported unused value for a variable "ret" in the function
send_socket_data(). Indeed there were two subsequent assignments
to "ret", meaning that the first one was unused.
The root cause of the problem is not checking the value of "ret"
after correctly invoking a function within send_socket_data(). Fix
this by adding appropriate checks.
Coverity-CID: 215249
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
Check if there are multiple non-empty data fragments passed to sendmsg()
function. If positive, then set EMSGSIZE errno and return -1, as that case
is not handled properly with current implementation.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
If one data fragment was not sent successfully in sendmsg(), then
attempting to send the rest does not make any sense, as it would introduce
hole in data stream.
Currently if one fragment was not sent successfully, then there is a
'break' in inner loop, but that moves the execution to sending the
following data fragments.
Return early in case of fragment sending failure, so that there are no more
send attempts.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
added user_data field to modem_cmd_handler_data
this allows for multiple instances of modem drivers which use
the modem cmd handler. currently, the only identifiable
parameter passed to the modem command handlers is the
modem_cmd_handler_data struct.
The added user_data variable allows for the a modem driver to
pass its dev or data pointer to the modem_cmd_handler_data
struct to be retrieved from within the modem command callbacks.
Signed-off-by: Bjarki AA <baa@trackunit.com>
All drivers using 'modem_pin' abstraction were converted already, so remove
its implementation now.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
UART device pointer is already used directly when configuring modem
interface. Convert the case when UART is reconfigured when 'target-speed'
DT property is specified.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.
This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
<soc.h> was included because some CMSIS helpers (__DMB/__ISB) were
needed. In ARM SoCs, inclusion of CMSIS headers depends mainly on how
HALs decide to do it, being usually an inefficient and fragile include
chain. Note that on ARM64 we're in a better position, as those are
defined in-tree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.
This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new selectable Kconfig option to decide wether the device driver
is a MMIO device or not. Previous to this patch, the decision was maded
based on the existence of a definition in <soc.h>. The design was
fragile, as code compiled anyway if the definition was not present.
All platforms/boards that had the definition in <soc.h> select the
Kconfig option in their respective defconfig files.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Deep Sleep mode stops SMB module clocks which could interrupt ongoing
I2C transactions, so have the I2C driver acquire a PM lock at the
beginning of a transaction and release it at the end in order to ensure
the module remains active.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Remove unconditional write to PCA95xx output registers in setup_pin_dir,
and only write to output registers if selected pin is configured as
an output.
Fixes#45774
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch adds DTS properties for using wake-up mode
and the autosleep function to the ADXL362 driver.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
As per XMCLib documentation we need to check that data has been received
before reading the buffers.
Fixes test_uart_poll_in test in tests/drivers/uart/uart_basic_api.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Casting to uint16_t* can cause an unaligned usage fault when c is not
aligned to 2 bytes and can unintentionally overwrite data when c has a 1
byte memory size. Also there's no need to cast to uint16_t* because
returned words are 8-bit characaters as setup in the configuration.
Fixes the following usage fault error in tests/drivers/uart/uart_basic_api:
START - test_uart_poll_in
Please send characters to serial console
E: ***** USAGE FAULT *****
E: Unaligned memory access
E: r0/a1: 0x00000000 r1/a2: 0x2000078f r2/a3: 0x0c00453c
E: r3/a4: 0x00000000 r12/ip: 0x00000000 r14/lr: 0x0c003de5
E: xpsr: 0x41000000
E: Faulting instruction address (r15/pc): 0x0c003de4
E: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
E: Current thread: 0x20000118 (unknown)
E: Halting system
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The CPU in Aspeed AST10x0 SOC is a ARM Cortex-M4 which doesn't internal
cache memory. Aspeed implements an integrated system level cache to
accelerate instruction and data memory accesses.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Add a pseudo device diver with device tree bindings for coredump.
The device tree bindings exposes memory address/size values to be
included in any dump. And the driver exposes an API to add/remove
dump memory regions at runtime.
Signed-off-by: Mark Holden <mholden@fb.com>
This commit aligns SPIM shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This commit aligns UARTE shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
The ALH is an intermediary device, which acts as a hub and provides an
abstracted support for numerous sound interfaces (e.g. SoundWire).
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
The SPI peripheral on SiFive parts uses FIFOs for Rx and Tx (FIFO size
undocumented, but empirically found to be 8 bytes on FE310, likely
identical on FU540 / FU740). Make use of these FIFOs in order to
continuiously feed Tx data as available.
Verified to transmit 1 MHz SPI @ 200 MHz coreclk / tlclk on FE310
continuously without downtime between frames.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
spi_context uses uint8_t buffers, and HW rxdata / txdata registers only
contain 8 bits of data (along with b31 full / empty flag), so uint8_t is
appropriate.
Suggested-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
mux_enabled check in the gsm_configure is unnecessary since it
is init and scheduled by gsm_ppp_start which means that the
mux must be disabled. The IS_ENABLED(CONFIG_GSM_MUX) check
should be good enough to determine whether or not the
mux_enable function should be ran.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
After the introduction of start/stop & rssi query work, these
additional functions can be invoked from different threads.
Things can quickly become hard to analyze when an interrupt
fires during one of these functions and upon return the
scheduler schedules another thread and run another function.
This PR introduces a simple mutex lock that guarantees thread
safety. Similar implementation can be found in hl7800 driver,
which has lots of public APIs that can be invoked from different
threads.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Update gsm_ppp.c
Move the rssi query part out from the rssi_handler work item as
an individual function, so that it can be used directly without
referencing the work.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Fix#46112 introduced a regression regarding rx fifo length.
This fixes it so that the last byte is not placed in
wrong buffer index.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
To support both 8-bit and 32-bit Control/Status register variants, register
offsets need to be calculated from device tree.
Updated register data in device tree to the 32-bit CSR variant.
Renamed defines to be similar to other LiteX drivers.
Changed frequencies in clock-outputs nodes, so i2s/litex sample works.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Correct width when accessing LITEETH_RX_LENGTH register.
Also update register data in device tree to the 32-bit CSR variant.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
LiteX HAL should be used when accessing Control/Status registers to provide
compatibility between different data widths of CSRs.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Make driver take register info from device tree so it can work with both
8-bit and 32-bit CSRs.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
anomaly_122_init() and anomaly_122_uninit() procedures implement
proper activate and deactivate procedures which are required for
achieve low power consumption.
The real workaround for the anomaly is buried inside hal function
nrf_qspi_disable() is called indirectly by the anomaly_122_uninit().
Therefore anomaly_122_init/uninit should be called for any
nrf QSPI device.
This patch renames functions and make call to them mandatory.
This fixes increased power consumtion issue on nRF53 device when
qspi was used.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This add UART_NS16550_VARIANT_16550 configuration inside the choice
of UART_NS16550_VARIANT_NS16750 and UART_NS16550_VARIANT_NS16950.
The configuration is enabled by default to make NS16550 device to get
correct FIFO size configuration (16 bytes).
fixes#45783
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The current sam0 adc driver not implement correctly the adc_reference
enum values. This try homonize adc input referece by tracking VDDANA
at ADC_REF_VDD_1. The ADC_REF_VDD_1_2 were fixed with correct INTVCCx
channel selection.
Fixes#45443
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This sensor is virtually identical to the lsm6dso. The only difference
is the accelerometer ranges are double those of the lsm6dso.
Use the same driver. The difference is detected by using "st,lsm6dso32"
as the first compatible entry, followed by "st,lsm6dso".
An bit flag in the existing accel_range config field is used to check if
the chip is the doubled range or not.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Move common settings out of the SPI and I2C instantiation macros and
into a common macro, which the aforementioned two macros can then use.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
In ST HAL v2.00, the functions to get the raw sensors values, e.g.
lsm6dso_acceleration_raw_get(), convert from little-endian to CPU.
Previous versions of ST HAL didn't do this.
The conversion here in the driver is converting a second time. It's not
an issue on a LE system, the conversion is a no-op, but on a BE system
it would be broken.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Check if W5500 int pin is still active after processing the interrupt.
If not doing correctly, the W5500 driver can deadlock because it is not
receiving any more interrupts.
Signed-off-by: Janco Kock <jancokock@gmail.com>
Unifying the method signature introduced a redeclaration of variables,
fixes redeclaration of variables by renaming the inner ones
Signed-off-by: Michael Schmitz <michaelschmitz@live.de>
This commit introduces changes in three places in order to fix the
problem with timer-related tests on FE310-based boards:
* tests/kernel/sleep/kernel.common.timing
* tests/kernel/tickless/tickless_concept/kernel.tickless.concept
* tests/kernel/workq/work_queue/kernel.workqueue
The first change is the modification of the SYS_CLOCK_HW_CYCLES_PER_SEC
value back to 32768 Hz to match FE310's datasheet description.
The second change is CLINT frequency reduction in Renode simulation
model to 16 MHz to correspond with the oscillator frequency given by the
FE310's datasheet and the HiFive1 board schematic. This fixes the first
two tests.
The last change is reducing the MIN_DELAY define to 100. This causes the
RISC-V machine timer driver to update the mtimecmp register more often,
which in turn addresses the `work_queue/kernel.workqueue` problem with
work items finishing prematurely, causing the above-mentioned test to
fail.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Checking that provided pclken->bus fits bus range in
clock_control_get_rate() is wrong as it could actually be a source
clock and hence not belong to this range.
Also, this kind of check is just not needed since this function should
not be used before call to clock_control_on() or clock_control_configure()
which do the required verification.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Assertions in can_mcan failed because the driver expects values
strictly greater than 0
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
Current poll_in function implementation blocks when there is
no data available. The Zephyr documentation for poll_in
expects the function to return -1 when no data is available.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Make sure the relative alarm value is set correctly
2. Add a Kconfig to give user the option of reserving
a CTimer channel for implementing the set_top_value
function
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fix the instance config structure name so that it's coherent with the
data one (missing underscore after the instance idx).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Config pwm open-drain mode without enabling STORE_REG. This CL
collects all active PWM's base address and related index in an
array. Then, pinctrl driver configs its open-drain mode by
finding the corresponding 'channel' index.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
For some reason, rather than testing for the presence of
disconnect-gpios in the devicetree, the STM32 USB Device driver was
relying on a hidden Kconfig flag to be set.
This patch removes the Kconfig option completely and simply tests for
the DT property - if it's set, you obviously know what you're doing and
obviously need the pull-up GPIO behaviour.
Signed-off-by: Chris Collins <chris@realsimgear.com>
This PR Fixes the Audio PLL Rate Calculation (there was an additional
divide / 8 which is not necessary and does not appear in similar
calculations in example code from the SDK).
Additionally, it adjusts the SAI .dtsi to more correctly configure the
mclk rate, and adds comments specifying what the regististers mean.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Pinmux is depricated (see #39740) and shouldn't be used anymore
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
some iMX RT SOCs have non contiguous sets of gpio pins available, which
caused issues when selecting appropriate pinmux for these parts. Add
workaround code to adjust offset of pinmux settings when configuring
these pins.
Fixes#44391
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The flash_stm32_write_range() function of the STM32H7x flash
driver partially uses a wrong flash program word size for certain
SOC types when calculating the flash write offset. If the used
SOC is not having a flash program word size of 256 bits / 32 bytes
the written data might get corrupted, as the flash write offset
value does not match the number of bytes that were actually
written.
Fixes#45568
Signed-off-by: Christoph Heller <chris@metanetics.de>
PHY TX power configuration must be added into soc level.
It was previously hardcoded in hal_espressif, which was removed.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
When the loopback drops driver packets, the number of dropped
packets is counted and can be requested externally.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
Incorrect GPIOTE channel was being freed because the pin number
being used is not the absolute pin but the pin within the port.
Signed-off-by: Wael Barakat <waelsbarakat@gmail.com>
Add inclusions of header files with devicetree related ADC definitions
to the nRF SoC dtsi files so that those definitions can be used also
for nRF SoC based boards.
Provide definitions of nRF ADC and SAADC analog inputs suitable
for use in devicetree.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add 'inversion-on' property to st7735r.
Issue INVON(21h) command on initializing if inversion-on was enabled.
As a result of this command, the display color is inverted.
Otherwise, INVOFF(20h) will be issued.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
There is no need in the `flag_quad_io_en` field.
When QE enabling failed, then the driver `init` fails as well.
There is no way to use qspi in quad mode if qe is not enabled.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support for 1-4-4 and 1-1-4 read modes.
SFDP is used to query for available read instructions, then the
fastest one is used.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
* Renames 4PP define to PP_1_4_4
* Adds PP_1_1_4 define
That matches linux kernel defines a bit more.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
On STM32WB and dual-core STM32H7 MCUs, the RNG peripheral is shared
between the cores and its access is protected by a hardware semaphore.
Locking was not performed in the current entropy driver, leading to a
race condition when multiple cores concurrently used the RNG. This
commit implements the necessary logic for locking the HSEM during entropy
generation on multi-core STM32 MCUs. It also reconfigures the RNG in case
the configuration was changed by the other core, as this can happen e.g
on STM32WB MCUs.
Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
Some sockets (UDP sockets at least) do not generate "<N>,CLOSED"
messages when the WiFi network drops. As a result the networking stack
thinks these sockets are still open after the network has dropped, and
after any subsequent reconnections.
This affects the DNS resolver library in particular, which leaves UDP
sockets open permanently by default.
Manually close these sockets when the network drops to ensure a clean
state the next time the network connects.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
`esp_close_work` can be queued from the `on_cmd_closed`, which clears
`ESP_SOCK_CONNECTED` and sets `ESP_SOCK_CLOSE_PENDING`, but does no
further work. The receive callback should still be run with no data when
the socket is closed through this mechanism.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use the dedicated `DT_INST_STRING_TOKEN` macro instead of manually
retrieving `DT_DRV_INST`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Xilinx AXI UART Lite v2.0[1] has the following clause for both RX and TX
FIFO respectively:
When a read request is issued to an empty FIFO, a bus error (SLVERR) is
generated and the result is undefined.
When a write request is issued while the FIFO is full, a bus
error (SLVERR) is generated and the data is not written into the FIFO.
To protect this, we have:
xlnx_uartlite_read_status(dev) & STAT_REG_RX_FIFO_VALID_DATA, and
xlnx_uartlite_read_status(dev) & STAT_REG_TX_FIFO_FULL
but these are not enough for multi-threaded apps. Consider two threads
calling poll_out(), it is always possible for a thread to be swapped out
right after reading the status register, the other thread fill the TX FIFO,
and the original thread is swapped back to write more data to the FIFO
because previously read status doesn't indicate the FIFO is full.
To close this race condition, this commit uses a spinlock for each FIFO.
This ensures that only one thread accesses the FIFO even for SMP cases.
This closes#45302.
[1] https://docs.xilinx.com/v/u/en-US/pg142-axi-uartlite
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Add pin control support to gpio_imx driver, so that GPIO pin muxes will
be selected when the use configures a pin as GPIO.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add additional pin controller settings for iMX application core SOCs, as
well as a "fallback" pin control setting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor iMX RT pin control support to use more generic names, as the
IOMUXC peripheral is present on non RT iMX application cores.
Additionally, make selection of the pin control driver occur at the SOC
level.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Simplifies the driver and Gives a generic function to prepare the Regular
commands for each instruction.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the stm32 octospi driver based on the exisitng quadspi
for stm32 devices and source code from the STM32Cube.
This drivers initialized the peripheral and the NOR memory
in SPI or OctoSPI mode with STR or DTR data Transfer rates.
The NOR-flash can provide the SDFP table directly (if supported)
or through the DeviceTree.
Limitation: no DMA transfer.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the introduction of the OSPI NOR flash controller
more octal commands and parameters are defined.
It completes the existing SPI commands
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Whenever EC bootloader already configured a pin as output and
high, any further reconfiguration via pinctrl driver causes a
glitch in said pin with current sequence.
Defer pin direction configuration to be last operation over
gpio control register to avoid the glitch.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Log a message when the modem asynchronously closes a link. This is
useful information to the user as it can explain the root cause of later
failures.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx eSPI and host_subs driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx adc driver. Please notice users need to
configure the corresponding pinctrl nodes in 'pinctrl-0' property in the
adc0 DT node. For example, if ADC0 and ADC2 channels are selected for
the application, please add the follwoings in your board DT layout file.
&adc0 {
status = "okay";
/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
pinctrl-0 = <&adc0_chan0_gp45
&adc0_chan2_gp43>;
pinctrl-names = "default";
};
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx tachometer driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in ps2 driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in pwm driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in i2c driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in uart driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL is the initial version for npcx pinctrl driver and introduces
pinctrl nodes for both IO-pads and peripheral devices for each npcx
series. Users can set pin configuration via these nodes in the board
layout DT file. It also wraps all configurations related to pin-muxing
in pinctrl_soc.h. Regarding the other pin properties, we will implement
them later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Update the MCUX ELCDIF driver to use CONFIG_MCUX_ELCDIF_POOL_BLOCK_NUM
for the number for frame buffers to allocate.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This is a follow-up to commits e15bdaa1bd
and 07bf22cc94.
The above two commits added some enumerated gain values and those
are not currently handled by the inverting function. Add the missing
entries to the conversion array in the function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enabling an eSPI channel (r.g. Peripheral Channel, Virtual Wire Channel,
etc.) during an eSPI transaction might (with low probability) cause the
eSPI_SIF module to transition to a wrong state and therefore response
with FATAL_ERROR on an incoming transaction.
This CL workarounds this issue by clearing the bit 4 of NPCX eSPI
specific register#2.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
A missing semicolon caused compiler errors when more than one emulated
gpio device was defined in the device tree.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Based on: #45053.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
Previously, the uart_stm32 driver was extended in #44487 to support
swapping the tx and rx pins of supported STM32 UART peripherals.
However, the original change applied this configuration during the
call to the uart_stm32_configure() function. This has now been added to
the uart_stm32_init() function to ensure this behavior on startup for
ports like the virtual com port.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Refactors invalid switch into if statement.
Fixes orientation set return value for normal
display orientation.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Make sure cxcprs isn't zero, or we will have
divide-by-zero on calculating actual_freq.
Test:
1.tests/drivers/pwm/pwm_api pattern
2.GPA0(pwm0) output 79201Hz, 324Hz, 100Hz, 1Hz waveform
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add support for enabling/disabling CAN-FD frame transmission/reception at
run-time.
Fixes: #45303
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert the can_mode enum to a bit field to prepare for future extensions
(CAN-FD mode, transmitter delay compensation, one-shot mode, 3-samples
mode, ...).
Rename the existing modes:
- CAN_NORMAL_MODE -> CAN_MODE_NORMAL
- CAN_SILENT_MODE -> CAN_MODE_LISTENONLY
- CAN_LOOPBACK_MODE -> CAN_MODE_LOOPBACK
These mode names align with the Linux naming for CAN control modes.
The old CAN_SILENT_LOOPBACK_MODE can be set with the bitmask
(CAN_MODE_LISTENONLY | CAN_MODE_LOOPBACK).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the CAN data phase API functions to timing_data_* for consistency:
- can_get_timing_min_data() -> can_get_timing_data_min()
- can_get_timing_max_data() -> can_get_timing_data_max()
- .timing_min_data -> timing_data_min
- .timing_max_data -> timing_data_max
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Enable pin control for lpc11u6x i2c driver, and remove pinmux usage from
board level DTS files.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
convert lpc11u6x syscon clock driver to pin control, and remove all
pinmux usage from driver and syscon dts node.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update pin control driver for lpc11u6x. This SOC does not have a HAL,
so fsl_clock is not available. It also lacks a slew-rate field in the
IOCON register, so this property must be optional.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Improve the power domain logging by making the log level configurable
and boosting the log level of the messages printed when the domain turns
on and off.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adding support for the GIC_V1 to the dc_dw USB driver
to be used by Cyclone V SoC FPGA Development Kit
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Similarly to what was done on U5 and H7 clock_control drivers, enable
device clock source selection.
This is done by:
-providing implementation for clock_control_configure().
-updating clock_control_get_rate() to support various possible clock
sources (SYSCLK, PLLCLK, LSE, LSI, HSI, HSE).
-providing enable_clock() to verify requested clock source exists and
is enabled.
-adding LSI and LSE device tree based initialization to
set_up_fixed_clock_sources().
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename and factorize clock source bindings accessors by moving them
in common header file stm32_clock_control and remove them from
include/dt-bindings/clock/stm32XY_clock.h files
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Fixes#41650
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
e8e88dea incorrectly changed registers
used in `sys_clock_cycle_get(32|64)` functions.
This commit fixes that.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
ADC threshold control register offset is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
update macro to access register accordingly. Driver behavior is not
meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Number of supported ADC thresholds is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
replace macro usage. Driver behavior is not meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Adds a communications backend based on the asynchronous UART API,
instead of the interrupt-driven UART API. The primary advantage of this
backend is an improved robustness to dropping bytes under high interrupt
or critical section loads.
Under all loads system efficiency is improved by:
* Reducing the time spent writing out individual bytes.
* Reducing the number of UART interrupts fired.
* Waking up the RX thread much less often.
When utilising this backend over `nordic,nrf-uarte` on a nRF52840, the
baudrate of an esp-at modem could be pushed to at least 921600 without
dropping bytes, compared to a maximum of 230400 with the interrupt API.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add a choice symbol that is used to select which UART backend to use.
This allows backends that don't use the interrupt API to be implemented.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use the proper `%p` printf specifier when printing memory addresses,
instead of casting to an integer, which may not be the same size as a
pointer.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Pretend that the serial test driver supports the interrupt and async
API's, as these can be required for various drivers. Also select
`SERIAL_HAS_DRIVER` so that the serial library will be included.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Depending on `!SERIAL_SUPPORT_INTERRUPT` to enable the driver does not
make any sense, as this is a symbol selected by drivers to signify that
they support interrupts. Simply not selecting this symbol is enough to
convey the desired intention.
This fixes Kconfig problems when the driver is compiled together with
a dummy serial driver which does select `SERIAL_SUPPORT_INTERRUPT`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some SOCs, such as the RT1064 and RT1024, use internal flash and don't
define pinmux settings for the flexspi. Don't check the return code of
pinctrl_apply_state, because the flexspi driver will fail to initialize
when the pin mux settings are simply not required.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SD response type masks, to allow drivers to mask out the
SPI or SD native mode response type based on the SD host controller
mode they use.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use the UPLLCK clock for the CAN controller as recommended by the Atmel SAM
E70 data sheet.
Move the configuration of the clock prescaler from Kconfig to devicetree
and limit it to the values recommended by the SAM E70 datasheet.
Fixes: #45012
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This is a follow-up to commit fd7633126e.
For some reason the above commit added several switch cases without
required break statements. In effect, the same pin could get assigned
to multiple signal lines in QDEC or QSPI peripherals if not all pins
were defined for them in devicetree, and consequently these peripherals
could not work properly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Allow CTS line to determine UART shutdown for any sleep mode.
This allows lower average current consumption for LITE
HIBERNATE mode.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Added chosen syntax in Device Tree to abstract the IPC device that is
used with the IPC service module in the Bluetooth HCI RPMsg driver.
Ported affected boards to declare this alias.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Update the Zephyr include paths to be compatible with removing
`CONFIG_LEGACY_INCLUDE_PATH` in the future.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Respect the configured values for how long the domain takes to turn on,
and how long the domain needs to be off for before it can be repowered.
As these actions can block, guard the transition function with
pm_device_action_can_block. To avoid system PM being able to turn the
domain off but not back on again, guard the entire implementation.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Enables the Intel SSP driver by default when the DAI driver class is
enabled (CONFIG_DAI=y) and a compatible devicetree node
("intel,ssp-dai") is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Use `DT_REG_ADDR_BY_NAME` and `DT_REG_SIZE_BY_NAME` to access register
properties from dts.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `LITEETH_EV_RX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `UART_EX_TX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way timer driver no longer depends on CSR data width being 8 bits.
Also when register names their number changes, then overlay generated by
LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also updated register names to those used in current LiteX and
appended `_ADDR` suffix to defines which lacked them.
Because register `total` was renamed to `value` and `update_total` to
`update_value` I updated variables accordingly as well.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Host might send command or data immediately after EC read the
KBC input buffer (IBF gets cleared).
This change make sure EC won't get wrong event type in IBF ISR.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Move period and pulse computation to right before
the channel enable code.
That fixes the inability to disable the channel by
providing the period of 0.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The STM32u% series of processors has a unique set of clock sources for
the FDCAN peripheral. This brings the selection in line with the
existing can_stm32fd clock selection Kconfigs.
This change was tested on a proprietary board using the STM32U5 series
which exposes the CAN pins of the SOC using a transciever on a live CAN
bus as well as on the nucleo_g474re board from ST in loopback mode.
HSE and PLL1Q tests run and all passed.
PLL2P is not currently supported by the clock drivers for STM32U5, and
as such is currently untested. When this support is added, the driver
should be able to use this clock without issue.
When changes from #42097 are merged this fix should be deprecated in
favor of using the methods outlined there.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Adds a log backend that maintains a ringbuffer in coordination
with cAVS HDA.
The DMA channel is expected to be given some time after the logger
starts so a seperate step to initialize the dma channel is required.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Do not default FLASH_MCUX_FLEXSPI_XIP to enabled when code is not
located in flash, this will cause issues if code is executing from ITCM,
as the zephyr_code_relocate macro will relocate the flash driver code
into itcm, and overwrite the zephyr image.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not query SIM card parameters if the SIM
card is not present.
This shortens the driver initialization time
significantly if a SIM card is not present.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Store sensor trigger structure reference provided on `trigger_set`, and
pass reference back to client when trigger callback is invoked.
This will enable client to use `CONTAINER_OF()` inside its trigger
callback code.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Add support for missing EHL SKUs. The information about SKUs is
already public and available in Linux kernel:
https://github.com/torvalds/linux/blob/
38f80f42147ff658aff218edb0a88c37e58bf44f/drivers/edac/
igen6_edac.c#L197-L208
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add optional PINCTRL support to the Microchip XEC PS2 driver
shared between MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Update the Microchip XEC PS2 driver to support MEC172x.
NOTE: MEC15xx has two PS2 controllers and
MEC172x has one.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move all device data to RAM. Since the flexspi driver accesses the
flash device that is being used for XIP, various RWW hazards can occur
if the flexspi driver is interacting with the flash device, while
running in XIP mode.
Fixes#45182
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Comparator will monitor signal though ADC channel, based on
user configuration, callback will be triggered.
This will enable comparator functionality for nuvoton MCU utilizing its
ADC threshold detection feature. Implementation is exported through
sensor trigger API. Use of CONFIG_ADC_CMP_NPCX is required.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Refactor code so that an unused variable 'adc' warning
is not generated when building for CONFIG_SOC_SERIES_STM32G4X
and not using adc1 or adc5.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Refactor the Bosch M_CAN shared driver functions to get rid of the
front-end driver wrapper functions.
This requires flipping the relationship between shared config/data
structs and front-end config/data structs. Front-end drivers can now
store a pointer to their custom config/data structs in the .custom
fields of the can_mcan_config and can_mcan_data data structures.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the private header file for the Bosch M_CAN shared driver code
from can_mcan_int.h to can_mcan_priv.h to follow the common naming
scheme.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
update help text for mcux rt pinctrl peripheral driver, to clarify it
does not support RT600/RT500 parts and only RT1xxx series parts.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add support for setting pinmux when using IOPCTL peripheral, as well as
setting pin configuration properties.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add pincontrol headers for IOCON peripheral present on NXP iMX RT600
and RT500 SOCs, and update LPC pin control driver for iMX RT family
differences.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This modification is required to enable flash encryption.
Using hal implementation of spi_flash calls maintains
compability amongs different socs while offering
latest esp-idf enhancements.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Includes the definition of the STM32_DMA_STREAM_OFFSET
depending on the peripheral to adjust the first DMA channel
in the list of streams.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In the EC application, the system may jump between two built Zephyr
images when necessary. If we gate the eSPI clock at initialzation, it
will make the eSPI configuration which established by previous image
break and lost the communication between EC and host.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
remove existing SDMMC SPI driver, since it is replaced by the SPI mode
SD host controller driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
with the legacy USDHC driver fully removed from the tree, the
nxp,imx-usdhc binding can now be used for the new SD host controller
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
all in tree SOCs with the USDHC peripheral have now been converted to
use the new SD host controller USDHC driver, so remove legacy NXP disk
USDHC driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SDHC driver implementing spi mode support for SD cards. This driver
implements the standard SD host controller APIs, and sets the host
property "is_spi" to indicate to the SD subsystem the card will be
running in SPI mode.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LiteX CSRs can only be accessed on addresses aligned to 4 bytes.
That's why in 32-bit CSRs case there is bit shifting needed.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Removed register sizes from config struct, as they are known.
This allowed to remove driver specific function reading from CSR and use
`litex_write*` functions from LiteX HAL.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
With universal LiteX HAL working, there is no need to perform multibyte
reads and writes using bitwise operations.
Just use appropriate `litex_read*` or `litex_write*` function.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Changes signature so it takes uint32_t instead of pointer to a
register.
Later `sys_read*` and `sys_write*` functions are used, which cast
given address to volatile pointer anyway.
This required changing types of some fields in LiteX GPIO driver and
removal of two casts in clock control driver.
There was a weird assert from LiteX GPIO driver, which checked whether
size of first register in dts was a multiple of 4.
It didn't make much sense, so I removed it.
Previous dts was describing size of a register in terms of subregisters
used. New one uses size of register, so right now it is almost always
4 bytes.
Most drivers don't read register size from dts anyway, so only changes
had to be made in GPIO and clock control drivers.
Both use `litex_read` and `litex_write` to operate on `n`bytes.
Now GPIO driver calculates this `n` value in compile time from given
number of pins and stores it in `reg_size` field of config struct like
before.
Registe sizes in clock control driver are hardcoded, because they are
tied to LiteX wrapper anyway.
This makes it possible to have code, independent of CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Make the LSE driving capability configurable for the STM32 series.
Fixes#44737.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Currently the driver only setup the ADC to read from the
internal temperature channel on init. However, it is possible
that some other application that uses the ADC can setup the
ADC to read from some other channel and therefore subsequent
stm32_temp_sample_fetch will fail to read the targeted channel.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The ADC should be calibrated on init, there is no requirement
to calibrate ADC again on stm32_temp_init, remove it.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Change the default initialization priority for CAN transceiver from 70 to
45 to initialize them before the CAN controllers (with default a
initialization priority of 50).
Fixes: #45219
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This change is controlling of function parameters before
configuring the STM32_DMA_HAL_OVERRIDE mode.
Then, in case the DMA channel is not valid (wrong ID) or busy,
an error occurs before overriding the DMA channel.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixing a bug where get_regs() was being executed before MMIO mapping
moving the declaration of reg_base after DEVICE_MMIO_MAP
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Consolidate the initialization routines and change the include guard to
conform with the coding guidelines as a preparation for the following
commits which add support for the SPI interface.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
This fixes the constant for the mem page and replaces a
magic number with the already defined `BME680_LEN_COEFF2` constant.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
PWM has a single set function now, macros like PWM_USEC() can be used to
specify other units than nanoseconds. This conversion was missed during
API updates.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The pwm field in struct args_index was missed when pwm was renamed to
channel in all drivers. As a result, the PWM shell could no longer be
built.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The it8xxx2 watchdog Kconfig options are always shown, for every type
of device, they should only be shown when an it8xxx2 device is being
targeted.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Includes several driver fixes and improvement to leverage
scatter/gather mode of DMA. Loads multiple DMA blocks into TCDs.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
RX FIFO watermark setting causing issue where last 16 words received
were stuck in FIFO, and not requesting DMA to move to buffer. Fixed by
setting watermark to 0.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
driver config settings were getting overwritten by APIs that set
default settings, like SAI_GetClassicI2SConfig(). Moved config code
after those APIs.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
stream_disable()'s should not always purge buffers.
And i2s_rx_stream_disable() needs separate control for
purging in_queue and out_queue since app owns buffers
after placed in out_queue for i2s_read()
Signed-off-by: Derek Snell <derek.snell@nxp.com>
MCP4728 is a 12-bit, Quad Digital-to-Analog Converter with EEPROM Memory.
Controlled via I2C interface.
Signed-off-by: Marek Janus <marek.janus@grinn-global.com>
In order to be consistent with what is possible in Devicetree, always
take a period in nanoseconds. Other scales or units may be specified by
using, e.g., the PWM_MSEC() macros (all of them converting down to
nanoseconds). This change then deletes the "_nsec" and "_usec" versions
of the pwm_set call.
Note that this change limits the period to UINT32_MAX nanoseconds,
~4.3s. PWM is, in generali, used with periods below the second so it
should not be a problem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify the driver by using pwm_dt_spec.
TODO: decide if pwm_dt_spec should also store period.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In a first place, the PWM API operates on "channels", not "pins". While
the API calls could have been changed by _channel, this patch takes the
approach of just dropping _pin. The main reason is that all API calls
operate by definition on a channel basis, so it is a bit redundant to
make this part of the name. Because the `_dt` variants of the calls are
going to be introduced soon, the change to `_channels` + `_dt` would
make API function names quite long.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The variable indicating the PWM channel is now names "channel" instead
of "pwm", adjust all drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The timer registers are accessible via the device config field, driver
code was wrong in one case (pwm is the variable indicating PWM channel).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Multiple if/else blocks had missing braces, add them as this violates
Zephyr coding guidelines.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Implement the set_top_value. This reserves one of the Match channels
to set the top value and to reset the counter.
Therefore the number of channels available to the user is reduced by 1.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
After change in RD into 64-bit time, target time must be express in
absolute 64-bit time. Upper layer e.g. OpenThread still utilizes only
LSB of the RD time therefore the conversion is required.
Make sure that target time is absolute 64-bit target time.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Add DT option to configure the data ready interrupt mode.
Latched is the default; pulsed can be enabled through
the drdy-pulsed DT, if desired.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Add optional threshold interrupt support.
Implemented using SENSOR_TRIG_THRESHOLD sensor trigger type.
The features can be optionally enabled through Kconfig,
or disabled for smaller code size.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Add FDS (Filtered Data Type Selection) + High-Pass reference mode support
(FDS in CTRL6, HP_REF_MODE in CTRL7)
Values are configurable through DT per instance.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Old code only create one pl011 device instance though there are two or
more pl011 device defined in devicetree. This patch can fix this issue.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
sensor_channel_get() API should return -ENOTSUP when requested channel
is not supported. This behavior allows to use `sensor get DEVNAME` shell
command easily, as all unsupported channels are filtered out.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
An application with the following config fails to link on nrf53 app
core:
```
CONFIG_BT=y
CONFIG_BT_HCI_RAW=y
CONFIG_ENTROPY_GENERATOR=y
```
This happens because `entropy_bt_hci.c` uses functions from
`hci_core.c`, which is only compiled if `BT_HCI_HOST` is selected.
Signed-off-by: Herman Berget <herman.berget@nordicsemi.no>
Enables the Intel TLB driver by default when the MM driver class is
enabled (CONFIG_MM_DRV=y) and a compatible devicetree node
("intel,adsp-tlb") is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Introduce has-interrupt-mask-reg DTS property for nxp,pca95xx driver.
This additionnal property allow to specify that the gpio expander has an
interrupt mask register that must be configured by the driver.
This allow to use this driver with PCAL95xx.
This fixes issue #44834.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
NXP LPUART IP supports loopback mode, where TX is internally connected
to RX input. Allow setting loopback mode up via the "nxp,loopback" dts
property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SOCs using the EDMA IP that supported caching must locate EDMA transfer
control descriptors (TCDs) in non cacheable memory. For M7 cores, this
can simply use the "nocache" section. For M4 cores, where the nocache
section does not exist, the chosen SRAM section must be a tightly
coupled memory block which cannot be cached. Add a note to all boards
with M4 SOCs that support caching explaining this issue, and enable EDMA
driver to locate TCDs in SRAM.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LPUART driver should use shared ISR for all possible use cases,
including ASYNC API, so that multiple features requiring ISR can be
enabled simultaneously.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for inverting of PWM channel outputs in the pwm_nrf5_sw
driver by properly handling the `PWM_POLARITY_INVERTED` flag.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-sw-pwm" binding
and with related `DT_PWMS_*` macros.
The change described above requires also providing a way to specify
SoC pins that are to be assigned to the PWM channels. Hence, the commit
introduces in the "nordic,nrf-sw-pwm" binding the `channel-gpios`
property that replaces the `channel-count` one.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for inverting of PWM channel outputs in the pwm_nrfx driver
by properly handling the `PWM_POLARITY_INVERTED` flag.
The dts properties that were used so far for inverting of the outputs
("nordic,invert" and "chX-inverted") are kept as they are needed for
setting of the initial polarity, i.e. for setting the inactive state
of the outputs before any PWM signal generation is requested for them.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-pwm" binding
and with related `DT_PWMS_*` macros.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Handle PECI command PING properly, also get Write FCS Byte as a check.
Now it is possible to perform a PECI Ping without crashing the bus or
blocking it for subsequent PECI transactions.
It is also possible to check whether the Ping was sucessful
or not with the Write FCS Byte.
Signed-off-by: Johannes Meister <johannes.meister@kontron.com>
STM32H7 series offer alias addresses to access some registers that could
be accessed by the M4 core on dual core variants.
For instance RCC_AHB3ENR could be accessed at following offsets:
- 0x0D4: Accessible from both cores
- 0x134: Accessible from C1 (M7) core
- 0x194: Accessible from C2 (M4) core (if any)
For most single core H7 variants, the two first addresses were accessible,
but for some others (stm32h7ax/stm32h7bx), only the 'C1 accessible'
was available.
This fact used to be hidden by the use of LL API to access these registers,
providing the required abstraction (an mainly using the first alias
when possible to simplify implementation).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of computing hclk freq use for flash latency setting after
setting the PLLs, do it right at the beginning of the function.
Indeed, first step of PLL configuration is to switch back sysclock
to HSI source (in case it was initially PLL).
In that case, flash latency is theoretically set in consistency with PLL
driver hclk. So we should "measure" hclk freq at that step rather than
once sysclock is back on HSI.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC is the actual hclk freq (ie core clock);
Remove use of intermediate new_hclk_freq to fix and simplify code.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some specific F1 variants don't handle flash latency.
Put flash latency dealing code under dedicated switch.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Review code style in set_up_fixed_clock_sources() for better
readability.
Use of 'if (IS_ENABLED(STM32_MSI_ENABLED))' inside '#if STM32_MSI_ENABLED'
is redundant but intentional as it is in line with remaining part of the
function (HSE/HSI cases).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On some parts, it could be required to use steps before applying
highest frequencies.
This was previously done as part of LL_PLL_ConfigSystemClock_FOO
utility functions which are no more used.
Use device tree to mention when this is required and implement it
in stm32_clock_control_init().
Additionally, fix the calls tp LL_RCC_SetAHBPrescaler, which require
use of ahb_prescaler helper.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Introduce a set_up_pll configuration function and make PLL configuration
an elementary step of the whole system clock configuration.
To implement this new, function make use of the existing series specific
files which allows series specific configuration when required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Group fixed clocks inits in a unique set_up function.
Each clock is initialized depending on its dts status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Simplify and clean up driver code using STM32 clocks DT based macros.
Added STM32_FLASH_PRESCALER macro for this purpose.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Factorize setting of frequency for busses.
Additionally, factorize SysCoreClock update.
The operations are now done twice in case of PLL since they are part
of LL utils PLL configuration function, but they are removed in next
commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Take advantage of previous work to configure PLL and remove
usage of LL_PLL1_ConfigSystemClock_FOO utils functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that fixed clocks are enabled in a single function, a
bunch of functions could now be removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move fixed clocks initialization to a single function.
Benefit is they could now be enabled independently of the
main clock configuration based on dts status and then be
used by peripherals even is not part of the main clock tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Flash latency setting could be factorized in a single location,
rather than split in each clock setting function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move prescaler settings to the clock_control_init function.
At this step they will be set up twice in PLL case, this will
be fixed in a next step.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set bus binding values using registers offset values.
As a consequence update driver to take this into account
in clock_on and clock_off functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a check to avoid invalidating the cache when the latter is disabled.
Indeed, doing so can lead to a bus fault.
Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
Update the semihost_console implementation to use the semihost API
instead of manually constructing the supervisor calls.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Control the usage of semihosting with a dedicated symbol, instead of
implying semihosting from the usage of `SEMIHOST_CONSOLE`. This allows
semihosting to be used without the semihost console.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Do not soft-reset device when changing timing parameters as the
soft-reset will discard the configured CAN controller mode.
Fixes: #44837
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename CONFIG_CAN_STM32_CLOCK_DIVISOR to
CONFIG_CAN_STM32FD_CLOCK_DIVISOR to match driver Kconfig name.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for selecting the CAN clock source. Change previously
hardcoded value of PCLK1 to HSE.
Fixes: #44985
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.
Refactor device tree macros usage to make usage of
SPI instances more general.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Differently from ESP32, the ESP32-S2 SoC has native
hal support to reset its own I2C FSM in case of failure.
This commit removes warnings related to unused reset
logic, which does not really apply to ESP32-S2.
It also removes code and data structures related to pin
information from the build when the target SoC supports
hardware mechanisms to reset the I2C FSM.
Finally, it checks at compile time if the preconditions
for correct bus recovery are being met.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
though using pinctrl's subsystem, the I2C driver
keeps pin information in case of communication
failure. This information is needed in case of
FSM failure.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Add a separate macro for registering offloaded sockets implementation,
along with information in the structure whether the implementation is
offloaded or not. This allows to differentiate between native and
offloaded socket implementations, which is critical for binding socket
API with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Instead of keeping a boolean informing whether a network interface is
offloaded at socket layer or not, keep a pointer to a function which
allows to create an offloaded socket. Native interfaces keep this as
NULL, while for offloaded interfaces it allows to connect an offloaded
socket implementation with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
update pin control implementation to use offsets for pin registers
instead of pin/port combination, to permit additional flexibility for
lpc devices with non contiguous register layouts. Update LPC55s69 pin
control names to align with newly generated pin control header.
This change also requires an update to the NXP HAL to use the new pin
control headers with offsets.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not silently ignore attempts to set an unsupported mode. Return
-ENOTSUP instead.
Fixes: #44706
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Only add the filter ID offset for extended CAN-ID filters if the filter
was added successfully. Raise log level from info to warning if filter
addition failed but only log it once.
Fix bounds check for removing an extended CAN-ID filter.
Fixes: #44721
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Commit a50b69dfb7 introduced a work-around
for FlexCAN errata 5461 and 5829, but neglegted to take the RX mailbox
offset into account when calculating maximum number of mailboxes
allocated for RX/TX.
Fixes: #44724
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove support for the optional API function can_get_max_filters() from
the STM32 bxCAN driver for now.
The function returns the Kconfig value for the maximum number of filters
but the true number of supported filters may be different due to the
filter nature of the STM32 bxCAN driver implementation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Adds hda link in and out drivers. The link in and link
out channels of HDA have small differences
with the host channels. Updates the existing
cavs_hda drivers and code to account for these
differences.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
all the consumers of the obsolete pinmux driver is
updated to use pinctrl API, this commit removes
the pinmux driver and assosciated sections.
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
This commit has the necessary changes to update the consumers
of pinmux driver(SPI, I2C, UART) and update the board specific
files to use the pinctrl interface.
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Add pinctrl driver for CC13XX/CC26XX family of SoCs
to facilitate transition from pinmux to pinctrl.
`IOCPortConfigureSet()` from TI hal driverlib used to
implement the generic pinctrl driver.
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
1.Declare the member type to match the kscan_it8xxx2_regs, so
we needn't to transform the local structure in the function.
2.Stop using DRV_CONFIG, DRV_DATA, DRV_REG macros.
3.Delete unused register defines.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
This PR enables the Ansynchronous UART API for using the MCUX drivers.
It is tested on the RT1062EVKB.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
This PR fixes up the Scatter-Gather EDMA mode for the MCUX EDMA Driver,
as well as enabling the dma reload feature for the same EDMA Driver.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Multiple instances of the device would have inadvertently shared the
LLI pool potentially causing nasty bugs.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Only initialize the FlexCAN IP core once since initialzing it has the
side effect of resetting the IP core and thus clearing previous settings
such as RX filters.
Fixes: #44680
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
redefine all the stm32 flash register bit Name from
FLASH_NSCR_xxx to FLASH_STM32_FLASH_NSCR_xxx
in all the zephyr drivers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds the stm32u5 flash controller driver for this serie
to the existing stm32l5 flash driver part
Only 1 or 2 MB devices exist today (4MB is possible in the future).
This flash controller driver is adapted from the flash_stm32l5.c
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the stm32U5 soc family to the flash driver
The flash controller has particular register names in the Non-Secure
area to be adapted for the driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The SAM0 fast-path implementation was broken, and partially fixed in
commits 8181eed and 8a99bd0...
This patch resolves an issue where the MSB is always zero on SAML21
parts, and appears to follow suit with the previous patches.
This patch also refreshes the commentary, and removes mention of the
"interleaved" operation that is no longer used - which appears to have
been problematic in the past.
In addition to this, it also resolves an off-by-one error in both the
fast_rx and fast_rxrx paths, which would have been tripped when
transmitting a zero-byte buffer.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
CAN in Automation (CiA) 301 v4.2.0 recommends a sample point location of
87.5% percent for all bitrates. However, some CAN controllers have
difficulties meeting this for higher bitrates.
Change can_set_bitrate() to use a sample point of 75.0% for bitrates
over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all
other bitrates. This is in line with the sample point locations used by
the Linux kernel.
Regard a sample point error of more than +/- 5.0% as an error in setting
the bitrate. Previously, any sample rate error was accepted without
providing any feedback to the caller. This is in line with the CAN
sample point calculation criteria used by the Linux kernel.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Value changed from 100us to 150us. Value was not enough upon softreset.
This value was arbitrarily chosen and should be changed if more
information on the subject is provided.
Fixes#43794
Signed-off-by: Diogo Correia <dcorreia@protonmail.com>
Read KBC Status register before reading KBC Data register
in kbc0_ibf_isr; since read data will clear status.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Modify the Microchip MEC172x I2C driver to use the device tree I2C
clock-frequency property and driver initialization time. Also, fixed
missing idle scaling register programming.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The cmd_write contains write verification that compares what has
been written with what it can read; the flash read operation
status was not checked which means that the bus or communication
problem was reported the same way as malformed write.
There have also been some optimization done by removal
of multiplications.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit changes default buffer size for flash write operations
to be CONFIG_SHELL_ARGC_MAX dependent; there is no point to define
buffer longer than number of write bytes that will be extracted
from command line arguments.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
We put disabling SOC interrupt enable register (IER) sequence in
between disable and enable core's global interrupt to prevent race
condition.
After core interrupt enable instruction has been executed, the new
configuration of IER has not yet been fully processed due to
asynchronization between core and SOC's source clock.
If SOC interrupt is fired under the above condition, we will get
IRQ number 0 in ISR due to IER disabling taken effect.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This way, when RTC is used as the generator, one PPI channel per each
configured PWM channel can be saved.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use compare channel 0 in the generator for handling the PWM period.
This way all other channels offered by the generator can be easily
used for handling pulses on particular PWM channels.
So far the driver allowed to configure more than 3 channels for certain
TIMER instances, but since channel 3 was always used for the period,
the generation could not work in such setups.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The driver improperly uses the PWM channel index to reference
the GPIOTE channel to be used for the PWM signal generation.
Consequently, the PWM signal on a given channel can be correctly
generated only if both those indexes are by chance the same.
Fix this by switching to use the stored index of the actually
allocated GPIOTE channel.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Change CONFIG_BT_RECV_IS_RX_THREAD into a
choice:CONFIG_BT_RECV_CONTEXT with the following options
(names can be discussed further of course):
CONFIG_BT_RECV_BLOCKING
CONFIG_BT_RECV_WORKQ_BT
CONFIG_BT_RECV_WORKQ_SYS
This way users would be able to choose what to run most of
the BLE stack on, they wouldn't be forced to a single model.
We would default to CONFIG_BT_RECV_BLOCKING so that we wouldn't
need to change the system workqueue stack size by default, instead
asking users to do so if they select the CONFIG_BT_RECV_WORKQ_SYS option
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
Reuse switch statements checking valid parameter values that were
already part of simplelink_socket() function, by creating 3 helper
functions for conversion of each parameter (family, type and protocol)
from Zephyr to Simplelink values.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for UDP, TCP and TLS on top of IPv4.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for TCP on top of IPv4 and IPv6.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for UDP and TCP on top of IPv4 and IPv6.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for UDP, TCP and TLS on top of IPv4 and IPv6.
TLS seems to be supported only in 1.2 version, so allow just that
version.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use NET_SOCKETS_OFFLOAD_PRIORITY instead of
NET_SOCKETS_OFFLOAD_PRIORITY, so that by default offloaded sockets will
be used instead of native sockets.
Addiitonally this allows to select relative priority of offloaded TLS
versus native TLS when used together with NET_SOCKETS_TLS_PRIORITY.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use NET_SOCKETS_OFFLOAD_PRIORITY instead of
NET_SOCKETS_OFFLOAD_PRIORITY, so that by default offloaded sockets will
be used instead of native sockets.
Addiitonally this allows to select relative priority of offloaded TLS
versus native TLS when used together with NET_SOCKETS_TLS_PRIORITY.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use NET_SOCKETS_OFFLOAD_PRIORITY instead of
NET_SOCKETS_OFFLOAD_PRIORITY, so that by default offloaded sockets will
be used instead of native sockets.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use configurable NET_SOCKETS_OFFLOAD_PRIORITY instead of hardcoded value
in the driver itself. This allows to select relative priority of
offloaded TLS versus native TLS when used together with
NET_SOCKETS_TLS_PRIORITY.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use configurable NET_SOCKETS_OFFLOAD_PRIORITY instead of hardcoded value
in the driver itself. This allows to select relative priority of
offloaded TLS versus native TLS when used together with
NET_SOCKETS_TLS_PRIORITY.
Drop the build assert, as always prioritizing offloaded TLS over native
TLS should be application developer choice.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
LTDC clock on F4/F7 series, is generated from PLLSAI which yet is not
implemented into Zephyr.
Signed-off-by: Konstantinos Papadopoulos <kostas.papadopulos@gmail.com>
the icm42670 from Invensense/TDK is a 6-axis accelerometer with
gyroscope and temperature sensing capabilities.
this initial driver does not support the devices 2K FIFO or many of the
other advanced features. Instead, only basic features are implemented.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
In the function iwdg_stm32_install_timeout, the test on watchdog ready
was inverted. So, if 2 successive calls were made to this function, the
value of the prescaler or counter reload was not taken into account.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Move the code for socket instanciation from each driver
to a generic driver, that makes an instance of a socketCAN
net device for the chosen node.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
For delayed reception only NRF_802154_RX_ERROR_DELAYED_TIMEOUT is
expected to happen, others rx errors should be handled in regular
manner.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Some failures are possible and expected from fime to time e.g.
NRF_802154_RX_ERROR_TIMESLOT_ENDED. Add informational log for the frame
reception failure to differentiate the specific case.
It can be helpful for analizing failure in network trafic.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Implement the blanking_on and blanking_off API functions for
NXP's MCUX ELCDIF display driver
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The I2C address of the VL53L0X distance sensor can only be programmed
over the I2C bus. To do this:
1. The sensor is powered off or in standby mode
2. Power up the sensor, it boots with a default I2C address (0x29)
3. The I2C master sends a configuration command to set the new address
4. The sensor now communicates at the new address
In case there are more than one such sensor on the bus, they all have
the same address when starting up. We therefore need to first apply
step 1. on all of them. Then, sensor by sensor apply steps 2. to 4.
Because simple designs may not need to reprogram the address, we
introduce a new configuration option CONFIG_VL53L0X_RECONFIGURE_ADDRESS
If this setting is disabled, then the driver behaves as before.
If CONFIG_VL53L0X_RECONFIGURE_ADDRESS is enabled, then the driver does
the following:
- In vl53l0x_init(), apply step 1. This is done when the driver is
brought up when starting the system
- in vl53l0x_start(), apply steps 2. to 4. This is done when fetching
a sample, if the sensor has not been started yet.
Also, as cosmetic changes:
- add parenthesis around sub conditions in call to __ASSERT_NO_MSG
- gracefully handle unknown sensor channels in vl53l0x_channel_get
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
Up until now, the vl53l0x driver only supported a single device, ie.
the first entry st,vl53l0x in the device tree. To be able to use
multiple sensors at the same time, create one driver data instance per
vl53l0x node in the device tree. Also split the constant driver config
from the runtime data.
Because the vl53l0x address is only configurable with an I2C command,
and is not persisted if the sensor is rebooted, multiple sensors can
be handled only if either:
- They are on different I2C buses
- Their addresses are coonfigured (by some external code) before
vl53l0x_init is called
Also use the i2c_dt_spec and gpio_dt_spec APIs, as it makes
the code more concise and readable.
Finally, to distinguish the logs mesages from different sensors,
prefix the text with the sensor name.
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
As per the VL53L0X datasheet, in 2.9.1 "Power up and boot sequence",
time to boot is 1.2ms max, so we only have to wait at most 2ms.
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
The limitation on HWINFO_NRF depending on not nonsecure was removed in
52be3030aa.
This caused problems when TF-M was not enabled.
This happens on the thingy53_nrf5340_cpuapp_ns board since this board
is not supported by TF-M.
Introduce proper dependency handling for the soc secure functions
to make HWINFO_NRF unavailable when no secure services exist in
nonsecure.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Extend Altera Jtag Uart driver support without Altera HAL driver
by default. uart_altera_jtag_hal.c renamed to uart_altera_jtag.c and
new config, CONFIG_UART_ALTERA_JTAG_HAL is introduced to allow driver
to use Altera HAL driver when needed.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
Only compile in async related code when at least one UARTE instance has
enabled async mode. This fixes an "unused function" warning when
`CONFIG_UART_ASYNC_API` is enabled but no UARTE instances has async
enabled. This is possible when the async API is being used for an RTT
UART driver.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Pass a copy of outbound argument structs to the implementation functions
as recommended for Zephyr system calls.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
All these sort of helpers were removed from tree a while ago, this one
was missed as it uses a custom name.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If dev was null, caller would have faulted before since dev->api needs
to be accessed before reaching this point. Also, a well-defined device
will never have a NULL dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API spec states that calling pin_set() with period set to 0 is
equivalent to set the PWM channel to an inactive level. Some drivers
treat this input as invalid (-EINVAL), however, it's an unsupported
feature. Maybe it's due to copy&paste effect? This changes error message
to be clear and changes return value to -ENOTSUP for this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add lpc iocon pinctrl driver. Driver handles IOCON clock initialization as
well as IOCON pin configuration
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Current code uses per-core register to check interrupt status and
dispatch handlers. However to disable/enable the interrupt, core
zero register is always used.
While the handlers in _sw_isr_table are common for all cores,
the status bits should still be handled separate for each core.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Verify read access to the timing and timing_data parameters in
z_vrfy_can_set_timing() and pass a copy of these structs to the
implementation as recommended for Zephyr system calls.
Remove unnecessary typecasts.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The MCP2515 requires phase segment 2 to be at least 2 time quanta.
The prescaler has a 6 bit register, allowing for real-world prescaler
values between 1 and 64.
Fixes: #44484
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix the bounds check for the data phase prescaler timing parameter. The
maximum allowed value is 0x20, not 20 decimal.
Fixes: #44483
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Take CAN_SJW_NO_CHANGE into account when bounds checking the sjw timing
parameter values.
Fixes: #44482
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.
This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Updates to MEC15xx i2c error handling:
1. timeout_seen handling is simplified. For all errors we
continuously poll
2. error flag is not set for timeout_seen handling and hence
recover_from_error() call is not required.
3. In i2c_xec_poll_write(), ETIMEDOUT for (START + ADDRESS) byte
is treated as default error and error_seen flag is set (instead
of timeout_seen flag)
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Even if not used DMA HAL is required in F4 SD HAL driver. Just
as for L4/F7 series that have been added before.
Add it for this specific serie.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
Setting event timer count at least 1 hw count, it's redundant,
so I clean up this else {} case. And add the comment about
the K_TICKS_FOREVER and INT_MAX case.
NOTE:
CONFIG_TIMEOUT_64BIT = y, then k_ticks_t type is int64_t.
K_FOREVER is (k_timeout_t) { .ticks = (K_TICKS_FOREVER) },
and K_TICKS_FOREVER is ((k_ticks_t) -1),
so K_FOREVER is a k_timeout_t type structure, and
the member ticks: type int64_t,
value (= K_TICKS_FOREVER) 0xFFFF FFFF FFFF FFFF.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add a new boolean devicetree property `tx-rx-swap` to the
st,stm32-usart binding, used to control TX/RX swap during
device initialization.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
Remove the limitiation in HWINFO_NRF not working in non-secure
configuration. Use the exposed soc_secure_read_deviceid function
that accesses the device ID through the secure services.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Allows the setting of ieee802154 EUI64 address in non-secure processing
environment by reading the FICR device ID through the secure service.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The can_get_max_bitrate() is an optional API function. Limit validation
to the CAN device driver pointer.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The function in its current form is confusing because unlike other
similarly named functions (dt_nodelabel_has_prop(), dt_node_has_prop())
or devicetree macros (DT_NODE_HAS_COMPAT(), DT_NODE_HAS_PROP()), this
function takes into account the status of the checked node and returns
"y" only when the node is enabled.
This commit redefines dt_nodelabel_has_compat() so that it no longer
checks the node status, and for cases where the previous functionality
is needed, a new function named dt_nodelabel_enabled_with_compat()
is introduced as a replacement.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
ESP32C3 requires master init call to enable its clock
gate. Without this, SPI interface may not initialize
properly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Don't leave idle state if soc isn't waked-up by an interrupt.
(We change to check interrupt controller register)
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Verify the get_state API call in z_vrfy_can_get_state(). Adjust sizeof()
arguments to match the rest of the file.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Verify the add_rx_filter API call in z_vrfy_can_add_rx_filter_msgq() as
this is used by the underlying implementation. Remove unnecessary
typecasts.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Do not attempt to verify that the current thread has access to the void
*user_data argument to z_vrfy_can_send(). The size of the data is not
known and no driver code will try to dereference it (it may not even be
a valid pointer).
Remove unnecessary typecasts from z_vrfy_can_send().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
To allow for high level robustness tests on protocols, add an interface
to control the packet drop rate. A rate of 0 means no packet dropped, a
rate of 1 means all packets being dropped.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
ITE RTOS timer HW frequency is fixed at 32768Hz, because this
clock source is always active in any EC mode (running/doze/deep doze).
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
We don't need to convert the free run clock count,
that will be converted by the kernel
(base on CONFIG_SYS_CLOCK_TICKS_PER_SEC),
so we should return the HW register count value directly.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
When NO_OPTIMIZATIONS is set and asynchronous API is used but
HW counting is not enabled then linking fails because of lack of
nrfx_timer code. When optimization is enabled, linker is smart
enough to figure out that nrfx_timer is not used.
Converting decision function from static inline function to macro
which is handled correctly with optimization off.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Rather than defining them in the header, require a set of defines
be provided to cavs_hda.h as part of the expected input to the API.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds an initial driver for HDA streams on cAVS. A common code base is
provided for all HDA streams while the drivers are identified
differently as they have small behavior differences.
Uses dma_status to describe the positions for read/write. Uses dma_reload
to inform when to move the read/write positions. This closely follows
how HDA is being used in SoF
Simple test case is provided for both drivers.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
In order to get rid of the duplication of the code that we had until now
in the tree, consolidate the handling of multiple calls to
bt_hci_cmd_send_sync(BT_HCI_OP_LE_RAND, ...) in a single location,
namely in hci_core.
This allows all of the users of this HCI command to use a single
implementation of the iterated sending of the HCI command to fill a
buffer with random bytes.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
bt_hci_cmd_send_sync() requires the caller to unref the buffer that is
sent back as a response. Add the missing call to net_buf_unref()
accordingly.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The function npcx_clock_get_sleep_ticks is currently guarded by
CONFIG_PM && CONFIG_NPCX_PM_TRACE. The other codes guarded by
CONFIG_NPCX_PM_TRACE is used to trace and will print a lot of messages.
The user who wants to use npcx_clock_get_sleep_ticks has to enable this
flag and get a lot of console spam. This commit removes the guard
CONFIG_NPCX_PM_TRACE and makes this function is available when
CONFIG_PM is defined.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This driver exectue connecting the shared irq one time for
every status "okay" vcmp nodes, then it will show enable
the same irq multiple times when build.
So I check whether the irq is enabled or not, if yes,
we needn't to enable again. And we will figure out the
triggered channel in vcmp_it8xxx2_isr().
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Currently IEEE802154_NRF5_DELAY_TRX_ACC can exceed the max possible
value. Add upper bound to limit this.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Store an optional reference to the zephyr,flash-controller choice. If
available and no user input is provided, it will be used as the default
flash device. If not available, error message will be more explicit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the signature of the CAN bus recovery functions in the Bosch M_CAN
driver frontends.
Fixes: #44345
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Do not force CONFIG_CAN_AUTO_BUS_OFF_RECOVERY=y. Instead fix the return
type of the mcp2515_recover() function and return -ENOTSUP.
Fixes: #44344
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Align clock accuracy used in CSL calculations to the value in platform.
This is recomended setting for devices working in wide range
temperature. Nevertheless it can be profiled in end product to decrease
CSL window duration and finally the power consumption.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Add build time optional PINCTRL support to the Microchip XEC TACH
driver shared by MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Update Microchip XEC TACH driver to support MEC172x.
Standardize device tree properties between chips.
Standardize device structure usage.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
If the dts defines the PWM complementary output, then the OCN
must be init in place of the OC state and polarity.
This is an exclusive setting for this pin.
The channel in LL_TIM_OC_SetPolarity can be the complementary one.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit changes the timing_min_data prop_seg
initialization of st,stm32-fdcan drier to zero.
Additionally the nominal sync jump width limits
are also adopted to new values 1 and 128.
This was not tested until recently and therefore
caused the can timing test to fail on stm32g4
after PR #44197 got merged.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
There wasn't the build error in PR#44060,
but now tool chain isn't happy about putting the arch_busy_wait()
to __ram_code section, then it shows a build error:
https://github.com/zephyrproject-rtos/zephyr/runs/5755633537?check_suite_focus=true#step:10:933
So I remove __ram_code of arch_busy_wait(), and this will need
extra fetch code time when arch_busy_wait() code isn't in
the dynamic cache.
Verified by follow test pattern:
west build -p auto -b it8xxx2_evb tests/drivers/flash
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Customize busy wait timer for micro-seconds accuracy.
Verified by follow test pattern:
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_api
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_error_case
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_monotonic
west build -p auto -b it8xxx2_evb tests/kernel/timer/starve
west build -p auto -b it8xxx2_evb tests/kernel/context
west build -p auto -b it8xxx2_evb tests/drivers/adc/adc_api
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
net_pkt_alloc_buffer() will use the maximum packet length of
NET_IPV4_MTU in case the interface MTU is smaller than this. Because of
this, the using the loopback interface with smaller MTU leads to
additional fragmentation at the TCP layer, which impacts performace and
requires more network buffers for tests to execute.
Fix this by matching the loopback interface MTU with NET_IPV4_MTU.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add Kconfig for STM32 LTDC driver
Add STM32 LTDC driver C source
Update display drivers CMakeLists with the new driver
Update display drivers Kconfig with the new driver
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
Convert can_calc_timing() + can_calc_timing_data() to syscalls and use
the newly added syscalls calls for determing the minimum/maximum
supported timing parameter values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add CAN system calls for getting the minimum/maximum timing values
supported by a given CAN controller device driver instance:
- can_get_timing_min()
- can_get_timing_max()
- can_get_timing_min_data()
- can_get_timing_max_data();
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reset the ESP modem inside the device initialisation function so that
errors can be detected through the use of `device_is_ready`.
Fixes#43891 for this driver.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Move the network device instantiation macro to above the esp_init
function so that static variables declared by the macro are visible to
the init function.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The purpose of this change is to allow to enable more than one
backend at once by removing choice from ipc-service backend Kconfig
and depending backend Kconfig option on existing of correct compatible.
Overwriting IPC_SERVICE_BACKEND option in some places is removes
as no longer needed.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Ports the SOF DesignWare DMA code to Zephyr.
Effectively replaces much of what was the designware driver as this
driver enables scatter gather which the older driver did not.
* Enables cyclic transfer description lists when the cyclic config
param is given.
* Enables linear link position usage with cAVS GPDMA.
* Passes suspend/resume, scatter/gather tests.
* Provides status updates of the transfer through dma_get_status()
* Enables reloading a cyclic transfer with dma_reload()
* Enables dma handshakes using the dma_slot config param.
* cAVS specifics remain in the dma_cavs_gpdma driver.
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Don't use the old gpio_dev spi_cs_control's member
since it's been deprecated in favor of gpio_dt_spec.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Based on introduction of plain GPIO configurations in STM32 pinctrl
bindings, update STM32 pinctrl/gpio drivers to make this functionality
available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Before updating stm32 pinctrl/gpio drivers to support plain GPIO
feature, rework pin configuration functions headers to provide
more clarity on the arguments and the information they convey:
- pin configuration
- pin function
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add backlight gpios property to mcux display driver, so that the driver
can correctly initialize the backlight gpio control.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
In order for pinctrl support to be complete, RT series GPIO driver must
support pinmuxing within the driver level. RT series pinmux settings do
not correspond directly to gpio port/pin numbers, so use DTS mappings to
pinctrl nodes to select and apply pinmux settings in the gpio driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable pinctrl driver for usdhc. USDHC driver uses custom pinctrl states
for fast, slow, and medium signal frequencies, as well as pin pull for
SD detection.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable pinctrl for flexspi driver. Note that when flexspi is being using
in XIP mode, pinctrl settings are not required and will not be applied.
Pinctrl settings are only required when the flexspi device being used is
not the one used for XIP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT11xx series has similar pin configuration peripheral to RT10xx, with
some differences in register layout. Create new pinctrl definition
header file, and reuse existing driver code for RT10xx.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
iMX.RT parts use a GPR register for some pinmux settings. Update pinctrl
driver to support this GPR register definition.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
mhz19b_sample_fetch() from mhz19b sensor driver didn't support
SENSOR_CHAN_ALL chan parameter value, so sensor_sample_fetch() didn't
work, always returning -ENOTSUP (sensor_sample_fetch_chan() worked, if
called with SENSOR_CHAN_CO2).
This change enables mhz19b sensor to work both with
sensor_sample_fetch() and with sensor_sample_fetch_chan() with
SENSOR_CHAN_CO2.
Signed-off-by: Konstantin Mochalov <incredible.angst@gmail.com>
This implements the msi_device_setup() callback for ECAM controllers
used with an ARM GIC ITS MSI message translater.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Define the MSI/MSI-X APIs to be used with the Generic PCIe Controller API.
It notably adds the msi_device_setup() callback to the PCI Express
Controller API used to allocate and setup the MSI/MSI-C vectors on the
MSI message translater HW.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add get_msi_addr() callback to ITS API to retrieve the GITS_TRANSLATER
physical address to be set in the MSI message address field.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Move the `pm_device_runtime_init_*` functions from <pm/device_runtime.h>
to <pm/device.h>. The initial device state should be settable
independently of whether `CONFIG_PM_DEVICE_RUNTIME` is enabled.
This also resolves a compilation error when attempting to use these
functions without also including <pm/device.h>.
Function documentation is also updated to be more general than only
referencing runtime PM, as this also applies to system PM and manually
run actions.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This update Atmel sam and sam0 ethernet gmac and mdio drivers to use
pinctrl driver and API. It updates all boards with new pinctrl groups
format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 rtc driver. It allows to
define pins to be used for tamper detection.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 dac driver. It updates all
boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 usb dc driver. It updates
all boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 tcc pwm driver. It updates
all boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 i2c driver. It updates all
boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 spi driver. It updates all
boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam0 serial drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update current Atmel sam0 pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam0
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam qdec sensor driver to use pinctrl driver and API.
It update board and sample with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam pwm driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove all remaining manual pinmux at board level.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam canfd driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
add missing entries to run automated tests for can/canfd drivers.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam ssc driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove DEV_NAME macro at sam xdma driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam afec driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition, it
add overlay files to allow run samples/drivers/adc example.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam usb drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam counter driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam i2c drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. This add missing
i2c-0 alias into sam4l_ek board.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam spi driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam serial drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update current Atmel sam pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This is a follow up to commit a1ab8da862.
Several calls to the dt_node_bool_prop function in Kconfig.nrfx for
the counter drivers are done with wrong parameters. The function
expects a full node path, but it is provided with only the node name
component.
Fix those by using dt_nodelabel_bool_prop instead, as such function is
available now and it is more suitable for such cases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for S2B1 quad-enable-requirements.
Add wrsr call for various QER modes
S2B1v6 mode tested with Winbond W25Q128JV series and pp4o and read4io
commands.
Signed-off-by: Zack Cornelius <zcornelius@securityesys.com>
Fixes a case for the asynchronous UART API where
only single buffer was attached to the UART, after
filling this buffer release event was trigger first
time and after disabling UART the release event was
triggered again for the same buffer.
Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
Enable the alt function with setting both bit5@0xf016f1 and
bit6@0xf02046 bits will cause internal leakage.
Only bit6@0xf02046 bit is required to enable the alt function,
so fix it.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Add a dummy driver for the `vnd,pwm` compatible to allow compilation of
drivers utilising PWM when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit makes the transition from the pinmux driver to the pinctrl
driver. It also modifies UART, SPI and I2C drivers used in FE310-based
boards to use the new pinctrl API.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
In case of BlueNRG-MS, it is necessary to prevent SPI driver to release CS,
and instead, let current driver manage CS release.
So, add SPI_HOLD_ON_CS to operation field
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Use logic (and not pin value) for kick_cs() and release_cs()
because potential pin value invertion (Active LOW)
is handled in gpio_pin_set()
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
In npcx adc driver, we select 'Scan' (Multiple Channels Operation Mode)
mode by default. It means that selected channels in ADCCS will be
converted automatically. Then, read the measured data from CHNDAT
registers if EOCCEV (Event is set after all selected channels are
converted.) flag in ADCSTS is set.
But we enable the wrong interrupt type, INTECEN, during adc
initialization. Ec will send the interrupt after each channel in ADCCS
is converted. It has no harm to the current driver since the driver
reads all selected channels and turns off ADC converter only after
EOCCEV is set in ISR. But it does generate spurious interrupts.
This CL enables the correct interrupt type, INTECCEN, during adc
initialization. Ec only sends the interrupt after all of channels in
ADCCS are converted.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Workaround for errata 192 is unnecessary as it is applied within
nrfx_clock_calibration_start().
Fixes#43930
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
Added basic support for enter 4-byte addressing command.
Patch supports command 0xB7 (Enter 4-Byte Address Mode),
with or without preceding WREN.
Similar as for SPI-NOR the `enter-4byte-addr` property of
memory node is used or describing how to Enter 4-Byte Addressing
mode.
Worth to notice that along with that property the `address-size-32`
property is expected as it switch the driver to use 4-byte addressing
in operations.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Adds an entropy driver that uses Bluetooth HCI commands as its source
of randomness. As this method is blocking, the ISR API is not supported.
As this method will range from relatively slow (same core Bluetooth HCI
controller) to extremely slow (UART HCI Bluetooth controller), use the
xoshiro PRNG by default for RNG generation.
Implements #37186
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The Kconfig function "dt_node_has_prop" was using label as its
parameter, where other functions use either chosen or path.
The documentation says that the parameter is path, so this patch
makes the function as documentation says and as other functions
in the file.
The additional nodelabel functions were added as counterparts that
are using nodes labels instead of paths.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This fixes an issue where we would drop the hci event if allocation from
the hci event buffer pool didn't immediately succeed.
The behavior is now to block on allocation, and warn the user every 10
seconds.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
the tlc5971 driver uses spi for controlling the global brightness
and individiual pixel brightness of a daisy chain of tlc5971
devices.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
If a user has a 1GB external flash it is currently not possible
to configure this through DTS. To allow for such a configuration
we add an option which specifies the size in bytes not bits.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Fixes#44043
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section. Move
device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
In the newer ESP32 AT command versions, the CWMODE command takes an
optional parameter (<auto_connect>) which controls whether the module
will automatically attempt to connect to an AP when switching modes.
This parameter defaults to enabling auto-connect if not specified.
Without this change, modules can successfully connect to an AP before
the `CWAUTOCONN=0` command is processed, resulting in a
`NET_EVENT_WIFI_CONNECT_RESULT` before `NET_EVENT_IF_UP`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Enable pinctrl for ethernet mcux driver, and update kinetis DTS node to
include labelling for PTP node, to enable driver to access pinctrl
properties.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
`reset_cause` with no arguments will print the device id.
Change it to print the reset cause.
Tested on nucleo_f767zi.
Signed-off-by: Cezar Burlacu <cezar@embeddedp.ro>
Do not use __disable_irq when Zero Latency IRQs are enabled
and the Zephyr open source Bluetooth Controller is used with
Zero Latency IRQs support.
Application shall ensure their Zero Latency IRQ ISRs do not
invoke any kernel APIs.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add an explicit Kconfig option to enable use of
__disable_irq() in nRF RTC timer driver to prevent higher
priority contexts (including ZLIs) that might preempt the
handler and call nrf_rtc_timer API from destroying the
internal state in nrf_rtc_timer.
Relates to commit fcda8699cb ("drivers: timer: extend
nrf_rtc_timer").
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add build time optional PINCTRL support to common PWM driver
for Microchip XEC MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add support for MEC172x series to Microchip XEC PWM driver.
Standardize device tree properties for both SoC families.
Standardize device structure usage.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
G4 series have specific LL ADC API that discriminate ADC1 and ADC5
channels. Take this into account in adc_stm32_setup_channels().
Additionally, fix this function to use LL defines as argument of macro
__LL_ADC_CHANNEL_TO_DECIMAL_NB, as good practice.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The NRF_TWI_Type struct doesn't have an homogeneous layout between
nRF51/52 series. This patch tries to select the right layout based on
selected SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Avoids segfault in situations when we can't acquire an RX buffer, and VLAN
or PTP code is enabled which tries to inspect packets by adding a pkt
check.
Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
Include a pointer to the CAN controller device for the CAN
transmit, receive, and state change callback functions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add generic support for can_get_max_filters() to the Bosch M_CAN
base driver and use it in all driver frontends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Extend the macro with checks for DT properties related to pin
assignments that are defined but would be ignored, depending on
whether PINCTRL is enabled or not, what presumably indicates
a resulting configuration different from what the user expects.
Add also a possibility to indicate that the pinctrl-1 property
should not be checked because the caller does not support the
sleep state.
Rename the macro so that its name better reflects its function.
Update accordingly all drivers that use it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When configuring the pwm capture, the callback function might
be reset, this i not an error. However the isr should not call it
and enabling the capture should always provide a callback function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Timing registers of I2C 0/1/2 can be adjusted to pass SI test.
We can control the tSU;STA and tHD;DAT simultaneously by changing
the value of the register IT83XX_SMB_4P7USL, and we can control
the tSU;DAT by changing the value of the register IT83XX_SMB_250NS
as well.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
As mentioned in #42882, the I2C of IT8XXX2 is designed for two different
IP blocks, so this PR divides this I2C driver into two compatibles.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
A nordic hal update was made around the same time that anomaly 122 on
nrf52840 was fixed. This update introduced qspi_pins_deconfigure() in
the nrfx_qspi_uninit(). With that, the CS pin from QSPI becomes a
floating pin after anomaly 122 uninit is executed.
Set the CS pin high after the uninit to fix this.
I'm assuming that floating CS pins that are likely to experience EMI
can impact power consumption. That was the case with my custom board.
My custom board with nrf52840 and MX25R3235F running the hello_world
sample was consuming 2.3 mA before this patch, and 30 uA after
applying it.
Signed-off-by: Rodrigo Brochado <git.rodrigobrochado@gmail.com>
Values of boolean DT properties need to be checked with DT_PROP(),
not DT_NODE_HAS_PROP(). Fix two such incorrect calls in the nRF UART
driver.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This macro incorrectly uses DT_NODE_HAS_PROP() to check the truth value
of the "disable-rx" boolean property. In consequence, it always assumes
that RX is disabled and the low power mode needs to be used. Fix this
by replacing the check with DT_PROP().
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Using IRQ as source for interrupt values can
fail when installing irq_connect_dynamic, as
IRQ can previously be enabled. This updates
the logic to use source map and allows
default irq_enable() and irq_disable() to call
esp32c3 interrupt allocator implementation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
After the ADC interrupt is enabled, the interrupt will be triggered
and the ADC channel valid data will be read, so there is no time
limit here.
Refer to the timeout is also set to K_FOREVER in the function of
adc_context_wait_for_completion().
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
In 90c6dc5e7f, a change was introduced to
allow modem commands determine if they have enough data or not.
In a situation where some data is missing, the command should return
-EAGAIN and this should lead to another call of the command with more
data.
In this commit, the argument parser was also allowed to return -EAGAIN
to request more data due to missing arguments.
However, this can't work because in cmd_handler_process_rx_buf() before
calling process_cmd():
- we make sure that a CR/LF has been found.
- we compute match_len which can't be greater than the distance to the
next CR/LF.
Therefore, even if the command argument parser ask for more data by
returning -EAGAIN, next call will have the same value for match_len,
meaning that the parsing of argument will result in the same missing
argument situation.
This leads to an infinite loop of parsing the same data over and over in
an infinite loop.
This commit change this behavior to always drop the data in such a
situation. The command will not be answered and will therefore timeout,
but at least, next commands will correctly parse their returned data.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
This API has be removed in Zephyr 2.8, and does not need to be used
as a static function. Because flash_it8xxx2_write_protection(false)
is not supported. If the IT83XX_GCTRL_EPLR register in the
flash_it8xxx2_write_protection(false) is written as 1, the flash
write region will not be protected later, only be cleared by
power-on reset.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The pm_constraint_* APIs were effectively used by the policy manager
only. This patch renames the API to the policy namespace and makes its
naming more explicit:
- pm_constraint_set -> pm_policy_state_lock_get()
- pm_constraint_release -> pm_policy_state_lock_put()
- pm_constraint_get -> pm_policy_state_lock_is_active()
The reason for these changes is that constraints can be of many types:
allow/disallow states, impose latency requirements, etc. The new naming
also makes explicit that the API calls will influence the PM policy
behavior.
All drivers and documentation have been updated accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
the device data struct pointer is passed to the thread function when
creating the thread, but the thread function did a int-to-pointer cast
which did not work as intended, causing exception during runtime.
now, we just pass the pointer directly without casting, which is the
pattern seen in other sensor drivers.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
Re-running the script that checks for the const qualifier missing on
struct device ISR's parameter.
The script also changes the parameter 'arg' to 'dev' when relevant.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- Move SWJ_CFG initialization into pinmux.
- Don't disable the AFIO clock after SWJ_CFG
initialization.
- Apply '111' to the SWJ_CFG bits upon remap
application, that fixes the remap usage.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
- Move SWJ_CFG initialization into pinctrl.
- Don't disable the AFIO clock after SWJ_CFG
initialization.
- Apply '111' to the SWJ_CFG bits upon remap
application, that fixes the remap usage.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The Serial Wire JTAG configuration is moved to
F1 pinctrl DTS.
The configuration in GPIO didn't apply to the
majority of the STM MCUs except F1.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Use the Kconfig macros of MODEM_GSM_RX_STACK_SIZE and
MODEM_GSM_WORKQ_STACK_SIZE directly without another macros.
They are well within the column limit and this make them
more obvious that they are actually configurable by Kconfig.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The driver should check for cellular registration before
attempting to attach to packet service, otherwise it will just
fails.
This patch waits for registration for 300 seconds, configurable
by CONFIG_MODEM_GSM_REGISTER_TIMEOUT, if it isn't registered by
then, it would toggle the airplane mode using AT+CFUN & wait
again, until it is registered, or `gsm_ppp_stop` is invoked.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Back with commit a1b77fd589 huge chunk of code was automatically
refactored using a script, which in turn left some macros meaningless
Signed-off-by: Hristo Mitrev <hr.mitrev@gmail.com>
Just use dev->name. This change follow same principles applied when
DEV_CFG and DEV_DATA macros were removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move the can_set_bitrate() function to can_common.c as it is getting
quite long for a static inline function.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for getting the maximum supported bitrate in bits/s for CAN
controller/transceiver combination and check that a requested bitrate is
within the supported range.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for the new pinctrl API to the nRF PWM driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF QDEC driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF QSPI NOR flash driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for configuring pins to be used by the nRF PWM, QDEC, and
QSPI peripherals.
A new custom property "nordic,invert" is added to the pin configuration
group binding to allow configuring PWM channel outputs as inverted.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the DMIC driver that handles
the nRF PDM peripheral. Update code of the driver and the related
devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF I2S driver. Update code
of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I introduced some errors during the gpio_dt_spec/i2c_dt_spec conversion
process. This patch fixes the issues so that driver builds.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Driver implementation for the Xilinx Processor System MIO / EMIO GPIO
controller as contained in the Zynq-7000 and ZynqMP (UltraScale) SoCs.
The driver is split up into source and header for a parent controller
device and source and header for 1..n child GPIO pin bank devices.
The parent device driver takes care of IRQ handling, the GPIO pin bank
driver provides pin / bank access according to the API defined by the
GPIO subsystem.
More than one device for this type of GPIO controller is required as
it provides access to a number of GPIO pins well in excess of the 32
pins addressable by the current GPIO API (whereever parameters or
return values come in the form of a bit mask):
- Zynq-7000: 54 MIO GPIO pins, 64 EMIO GPIO pins in 4 banks.
- ZynqMP: 78 MIO GPIO pins, 96 EMIO GPIO pins in 6 banks.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Use the devicetree properties to determine if the dedicated temperature or
voltage reference channels should be configured for the ADC.
Fixes#43750.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
The stm32's I2C peripheral has a maximum transmission size. Larger trans-
action, that I2C itself allows, can be achieved be using the peripheral's
reload-mode.
In order to do that, st's low-lever drivers need to be informed according-
ly. The previous iteration of the code mishandled the next_msg_flags para-
meter, causing the issue to manifest itself.
This refactors the inner loop of i2c_stm32_transfer() into its own func-
tion. This passes the message parameter by value in order to be able to
mutate its state while keeping the original datum from the user intact
during the entire procedure.
Fixes#43235
Signed-off-by: Frank Terbeck <ft@bewatermyfriend.org>
Claim the net_context mutext associated with a socket before claiming
the socket mutex. The receive callback claims the net_context mutex
internally, which will now always succeed immediately.
The TX path claims the net_context mutex before the socket mutex, and if
we don't use the same order, we can end up in a deadlock.
Fixes#43470.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
It may happen that after the flash chip was previously put into
the Deep Power Down mode, the system was reset but the flash chip
was not. Consequently, the flash chip can be in the DPD mode when
the QSPI driver is initialized. Some flash chips will just exit
the DPD mode on the first CS pulse, but some need to receive the
dedicated command to do it and they will not respond to any other
commands including those that the driver need to perform to complete
its initialization ("Read status register" and "Read JEDEC ID").
This commit adds sending of the "Release from Deep Power Down"
command right after initialization of the QSPI interface to avoid
the problem described above.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Previous commit 579ca90e25 to
build wifi drivers as a library changed the include path for
the WINC1500 driver, which results in the include path being
local to the library. However, the Atmel HAL requires
wifi_winc1500_nm_bsp_internal.h to in the search path. So
change the include path to be global.
Fixes#43456
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Refactors the remaining I2S drivers to use the shared driver class
initialization priority configuration, CONFIG_I2S_INIT_PRIORITY, to
allow configuring I2S drivers separately from other devices. This is
similar to other driver classes.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to be
consistent with other driver classes.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fix register bit field when clock source is MSI
on the stm32L0x or stm32L1x mcus
Use RCC_CR_MSIRGSEL bit field instead of not soc stm32wbx serie
That bit of the RCC CR is common to several stm32 mcus
Signed-off-by: Francois Ramu <francois.ramu@st.com>
After experiencing a few deadlocks, it was discovered that this bus does
not implement any form of mutual exclusion... this patch addresses this
and resolves potential deadlocks.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Refactors interrupt controller drivers to use the shared driver class
initialization priority configuration, CONFIG_INTC_INIT_PRIORITY, to
allow configuring interrupt controller drivers separately from other
devices. This is similar to other driver classes.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEFAULT to preserve
the existing default initialization priority for most drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors the remaining I2C drivers to use the shared driver class
initialization priority configuration, CONFIG_I2C_INIT_PRIORITY, to
allow configuring I2C drivers separately from other devices. This is
similar to other driver classes.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Enable second usb EHCI if usb2 node has status="okay" Note that this
driver is still an single instance driver, this change simply enables
the driver to work with the usb2 peripheral if that one is enabled, and
usb1 is disabled.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This change includes special handling of the internal voltage
reference and internal die temperature channels for all currently
defined STM32 models
The code now looks for specific ADC + channel ID pairs instead
of just a channel ID to determine if the caller is trying to
configure an internal channel.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Only call the state change callback if the state has changed. Reuse the
existing function for retrieving the CAN controller state instead of
having the same code twice.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The temperature sensor used in the clock_control driver requires
multithreading, but this is not compatible with mcuboot builds with
multithreading disabled.
Fixes#41597.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
bmi160.c module defines DT_DRV_COMPAT, but bmi160_trigger.c doesn't.
This causes a catastrophic chain of events.
The bmi160.c module includes bmi160.h,
in which the macro DT_ANY_INST_ON_BUS_STATUS_OKAY
affects the size of bmi160_bus union.
So bmi160.c defines a bmi160_cfg struct which contains that union.
Now, in bmi160_trigger_init we get a pointer to that config struct.
The fact that this module now includes bmi160.h without
DT_DRV_COMPAT, causes it to think the union is empty.
That doesn't cause compilation error, just undefined behaviour,
In which you address an empty struct fields.
In general, I suggest that someone makes sure it doesn't happen
in other drivers as well. The problem presented here is general,
meaning that if an h file assumes someone defined DT_DRV_COMPAT
before and it doesn't,
it may lead to some weird behaviour, like the one described.
Signed-off-by: Avi Green <avigreen1978@yandex.com>
gpio_pin_interrupt_configure asserts that one of GPIO_INT_ENABLE or
_DISABLE is specified by the caller, and also that GPIO_INT_EDGE is
requested if both states (GPIO_INT_TRIG_BOTH) should interrupt. This
change corrects the misuses in it8xxx2 drivers that cause assertion
failures.
When assertions are disabled the existing code works correctly because
the it8xxx2 GPIO driver assumes that a pin interrupt should be enabled
if _DISABLE is not requested, and the driver only supports edge
triggers but assumes the absence of GPIO_INT_MODE_LEVEL indicates
an edge trigger was requested.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I1aaee190ec4cf063f36e25c0c293a91d280e71bb
On 32bit compiler the BIT_MASK(32) generate a warning,
after discussion on #42226 and #42163, advise was to use
BIT64_MASK instead.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
These definitions are required to be able to use GICv3
interrupts controller on an ARMv8 AArch32 processor.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
When using DMA to transfer over the spi, the spi_stm32_cs_control
is done after enabling the SPI. The same sequence applies
in the transceive_dma function as in transceive function
Signed-off-by: Francois Ramu <francois.ramu@st.com>
I2C clock and I2C gpio could be on same gpio group.
Remove assertion that required them to be on different
group.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Reserve the upper 8 bits of gpio_dt_flags_t for SoC specific flags and
move the non-standard, hardware-specific GPIO devicetree flags (IO
voltage level, drive strength, debounce filter) from the generic
dt-bindings/gpio/gpio.h header to SoC specific dt-bindings headers.
Some of the SoC specific dt-bindings flags take up more bits than
necessary in order to retain backwards compatibility with the deprecated
GPIO flags. The width of these fields can be reduced/optimized once the
deprecated flags are removed.
Remove hardcoded use of GPIO_INT_DEBOUNCE in GPIO client drivers. This
flag can now be set in the devicetree for boards/SoCs with debounce
filter support. The SoC specific debounce flags have had the _INT part
of their name removed since these flag must be passed to
gpio_pin_configure(), not gpio_pin_interrupt_configure().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The function eth_stm32_hal_set_config() located in
drivers/ethernet/eth_stm32_hal.c always returns -ENOTSUP,
even if everything is fine. This commit fixes the return statement
so that the real result (ret) will be returned.
Signed-off-by: Bernd Weiberg <bernd.weiberg@siemens.com>
Set up a c2_reset procedure in order to allow sequential
open/close/open calls and keep c2_reset done at init (required
for flash access).
Move reinit out of the reset procedure, so flash could be
accessed after bt_disable().
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Handle eSPI periperal channel error to avoid continous interrupt
beyond the bus error.
Whenever an eSPI access causes an internal bus error,
PC_BUS_ERROR bit is set, it remains set until cleared by written
with an 1.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Moves the nios2 msgdma driver device config struct to the device data
struct for mutable data. The config struct is expected to be const.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Moves the nios2 msgdma driver device config struct to the device data
struct for mutable data. The config struct is expected to be const.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:
sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Ignore the flag instead of rejecting it with -ENOTSUP, as this is what
the GPIO API expects from drivers that do not support debouncing.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the I2C drivers that handle
the nRF TWI and TWIM peripherals. Update code of the drivers and
related devicetree bindings.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the SPI drivers that handle
the nRF SPI, SPIM, and SPIS peripherals. Update code of the drivers
and related devicetree bindings.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- clean up registration of the drivers with the logging subsystem
- use consistent naming of local variables accessing configuration
and runtime data of driver instances, for easier code maintenance
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for configuring pins of the following nRF peripherals:
SPI, SPIM, SPIS, TWI, and TWIM.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add build assertions that will ensure that every peripheral for
which a driver instance is created has some pins assigned to it.
Neither pinctrl-0 nor *-pin properties can be currently marked as
required in devicetree, so these assertions will help users avoid
invalid configurations where it could be hard to figure out why
the UART is not working.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
fix incorrect gpio driver struct used in driver data.
This should not have caused any issue as currently
sizeof(gpio_driver_data) == sizeof(gpio_driver_config).
Signed-off-by: Simon Frank <simon.frank@lohmega.com>
This commit adds a USB Type-C Port Controller Driver for
the STM32 USB Type-C / USB Power Delivery (UCPD) peripheral
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
by default, a global trigger thread was enabled in kconfig but
the thread priority and stack size depended on a local thread
being enabled.
the local thread option was never used anywhere so it is removed.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
Indirect ISR automatically calls power management functions, which GPT
timer direct ISR was not calling. Calling these functions means that the
kernel will recognize that it is exiting low power mode when the GPT
timer interrupt fires that wakes the SOC up, and will call
pm_power_state_exit_post_ops, which can in turn raise the clock
frequencies and voltage of the SOC as early as possible.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
System entering sleep state before uart tx is complete can result in
characters being dropped from the transmission. Add pm constraint
setting to the lpuart driver to prevent character drops
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
1. Check I2C Clock and Data is high through GPIO driver instead
of the I2C bitbang registers
2. i2c_xec_poll_write() and i2c_xec_poll_read() will poll to
check I2C clock and data lines are high before initiating the
transaction. The polling will be every 25us for a cumulative
max of 2.5ms
3. wait_completion() will not call recover_from_error() to reset
the controller. Instead will poll for 10ms for the PIN bit to
clear before returning error.
4. wait_completion() will send STOP if the 9th bit is NACK
5. If any errors with current transaction:
(a) Set error_seen flag.
(b) In the next transaction do the recovery process (reset the
i2c controller) if the clk and data lines are high.
Note: error_seen flag is set for Address NACK with Repeated
Start as well.
6. If timeout error occurs in wait_completion():
(a) Set timeout_seen flag;
(b) Wait till the slave will release the clock.
(c) Once slave releases clock send STOP on the bus. If the
timeout occurred while master read, read the I2C DATA register
for the hardware to proceed.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
spi_dt_spec structure initialization should not be done
in the runtime during spi bus initialization because it
causes kernel panic.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
The RTC user channel count is increased contitionally to 2 when
nrf_802154 radio driver is enabled.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
The response of a KTCPSND has two phases. According to documentation by
wireless the timeout is 60 seconds. The fix respects the timeout on the
second phase, too (waiting for OK or errors from modem). Previously only
the first phase used 60 seconds and the second phase used 5 seconds.
Without this fix the hl7800 will lock the tcp stack for the current
socket indefinitely if another socket operation is performed before the
response from the modem is received.
Additionally all timeouts are adjusted to be at least one second longer
as the documented timeout from wireless. This avoids races between the
hl7800 and the driver.
Signed-off-by: Rene Bredlau <git@unrelated.de>
Shims for nrfx drivers should only connect the related IRQ handlers,
they should not enable the IRQs, as this could lead to a situation
where the interrupt handler is called before the driver had a chance
to properly initialize the peripheral and install the provided event
handler. nrfx drivers will enable the interrupts appropriately on
their own by calling the NRFX_IRQ_ENABLE macro which is implemented
in nrfx_glue.h as a call to irq_enable().
This commit fixes the above issue spotted in the following shims:
- dmic_nrfx_pdm
- clock_control_nrf
- i2s_nrfx
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Instead of reading registers query the info on sysclock configuration
from existing configuration symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rework clock start up functions in order to allow configuration
and enabling of individual clocks.
This way, each clock defined with a "okay" status will be enabled
even if not part of the sysclock clock tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add STM32_FOO_ENABLED and STM32_FOO_FREQ to STM32 fixed clocks:
HSI, HSE, MSI(S), CSI, LSI, LSE..
Replace STM32_LSE_CLOCK by STM32_LSE_FREQ and when possible
replace by new STM32_LSE_ENABLED when making sense.
Fix STM32_PLL3_FOO_ENABLE to STM32_PLL3_FOO_ENABLED
Additionally, add STM32_PLL_FOO_ENABLED definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
PLL3 setting should also be protected CFG_HW_RCC_SEMID.
Move semaphore unlock after we're done with PLL3.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Current implementation checks for pulldown and
pullup. As pinmux configuration is related to PU only,
this PR checks for PU feature instead of PD.
This also fix missing PU check when PD is present.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Currently if an attempt to disable CSMA-CA in by setting an
appropriate flag in another (for example application)
CmakeLists.txt it caused lots of warnings. This fix allows
higher level CMakeLists.txt to disable CSMA-CA without
warnings.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
When a Seed error occurs during the random nb generation,
the driver tries to recover and exit without providing a random data
This avoids looping endlessly on the DRDY bit of the RNG status reg
because it remains 0 in case of error.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Allow movement detection to be used on hardware
that only has one interrupt line connected.
Change hardware configuration to a bitmask.
Signed-off-by: Andrew Hedin <andrew.hedin@lairdconnect.com>
Rename CONFIG_SOC_POWER_MANAGEMENT_TRACE to CONFIG_NPCX_PM_TRACE so that
it is clear that it's a NPCX specific option.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The ADC driver of IT81302 chip can support channels 0-7 & 13-16.
This PR adds to implement ADC channels 13-16.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix a couple of issues reported by checkpatch:
ERROR:POINTER_LOCATION: "(foo*)" should be "(foo *)"
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add kinetis pinctrl driver. Driver initializes clocks for each port, and
exposes the pinctrl_configure_pins function required for pinctrl
support.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The Bluetooth HCI driver based on the RPMsg transport now uses the IPC
service module. The compatible Bluetooth sample - HCI RPMsg - has also
been migrated to the new IPC solution.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Add a new API to support multipart hash calculation. The API allows
split the data input to be split in small chunks.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The API to set a callback has the namespace cipher but the driver
function pointer was using the namespace crypto. As this API belongs
to the cipher subgroup, just rename the function pointer in the driver
to be consistent.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Just give a better name to this file since now we have changed the
file where crypto driver API is defined.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This file defines the crypto driver API, cipher is supposed to be just
one type of capability (other can be hash) of these drivers, just
change the file name to be consistent with it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add 'cipher' namespace in some in the driver API since these
operations are for cipher.
Set a namespace to make it clear that these are cipher operations,
this allow further functionalities, like hash, to be added in this
driver API.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The `gpio_dt_spec` structures where never initialised, therefore the driver
would always fault with "E: Reset GPIO device not ready" printed to the
console.
Fixes: 069bf6be44
("drivers: display: st7789v: use gpio_dt_spec")
Signed-off-by: Casper Meijn <casper@meijn.net>
Intel Audio DSPs have "IPC" interrupt delivery and shared memory
window hardware. The Sound Open Firmware project has historically
used the combination of these to implement a bidirectional
message-passing interface. As it happens, this protocol is an
excellent fit for Zephyr's somewhat geriatric but still useful IPM
interface.
This implements a SOF-protocol-compatible transport that will
hopefully prove a bit more futureproof for non-Intel SOF
architectures. It is a software-only device, built on top of the
underlying SOC APIs for the SRAM windows (in cavs-shim) and IPC
(cavs_ipc).
Note that SOF actually has two protocol variants (ipc3 and ipc4): in
both, the command header (passed as the "id" parameter in IPM) is sent
via the hardware doorbell register. But in ipc4, the second hardware
scratch register is used to transmit the first four bytes of the
command before involving the SRAM window (in ipc3, it's ignored).
Both modes are supported by this driver, set IPM_CAVS_HOST_REGWORD to
choose the "ipc4" variant.
Finally: note that the memory layout for the windows in question is
inherited from SOF, and for compatibility (with both SOF and with the
offsets used by the host!) these can't be changed without major
surgery. They're defined in kconfig, but should be treated as
read-only until we get a chance to rework the way Zephyr does its SRAM
window management (and probably in concert with the host drivers).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Some IPM devices support asynchronous command processing, where
acknowledgment of an IPM message can be delayed while handling
happens in a context other than the ISR that invoked the callback.
Expose this via a kconfig that can be selected by the driver, and add
a new "complete" call (a zero-overhead stub on non-supporting devices)
to signal the end of message handling.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Improve shell commands to support up to 32-bit addresses.
The check if function should use 8/16/24/32-bit address is basing
on the length of address used in function parameter. To address
registers below 256 using 16-bit, one should write them left-padded
with zeroes. Address is sent in big endian.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The tx_lock timeout is closely related to GSM_CMD_AT_TIMEOUT
& GSM_CMD_SETUP_TIMEOUT, and should be longer than both of
them, otherwise the gsm_ppp_stop might fail to lock the tx.
Define the timeout at the top of the driver and added a comment
to make it clear for the user.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The rssi_work_handle always exists in the gsm struct, so use
```
if (IS_ENABLED(CONFIG_GSM_MUX))
```
instead of
```
#if defined(CONFIG_GSM_MUX)
```
for better code readability.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
There's no need to cancel rssi work when CONFIG_GSM_MUX isn't
enabled, since it is not scheduled.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The rssi_work_handle should be submitted to the gsm workqueue
using the gsm_work_reschedule, fix that.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The 'attached' flag should be reset on gsm_ppp_stop, or else
some part of the gsm_finalize_connection won't be executed
during the next gsm_ppp_start.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Convert gsm_finalize_connection into a work so that the caller
work won't have to run again when gsm_finalize_connection
reschedule gsm_configure_work on error.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Currently the mux_setup set the state to the next one after
uart_mux_alloc is successful even if the mux_setup fails which
can be a problem.
Set the state after both mux_setup & uart_mux_alloc are
successful.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Remove redundant mux_enabled checks, the code execution will
not reach here if mux_enabled is false in the first place.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Customize the error logs in each connection finalization steps
so that it is easier to trace the error.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The gsm_configure will return if it fails to perform mux_enable,
therefore the disable part of the log will not be printed.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The `setup_done` and `mux_setup_done` aren't being used
anywhere in the driver, therefore should be removed.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Initializing rssi_work_handle on gsm_start would (re)init it
unnecessarily everytime the gsm_start is invoked, we only need
to initialize it once in the gsm_init.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
With the unification of OCM declaration & assignment between Zynq-7000
and Ultrascale/ZynqMP, remove the distinction between those two SoC
families so that the DMA area is always set up in the OCM regardless
of the current SoC type.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add a new hwinfo driver to get the reset cause on
SAM4S/SAME70/SAMV71 SoC series.
The user-nrst dts property has been added to enable external user
resets.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Instantiate the values of `sx126x` GPIO's when they are present in
devicetree. This was missed in #42230.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
spi_dt_spec structure initialization should not be done
in the runtime during spi bus initialization because it
caues kernel panic.
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/43046
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
It turns out XCC didn't like this change as it doesn't have a
__COUNTER__ builtin. Bummer.
This reverts commit e8389f2f53.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
1. Rename device data to dev_data to fix variable
name clash
2. Use Device Tree properties to setup the display
3. Delete unused Kconfigs
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Use CTS input to monitor HL7800 sleep state
when in SLEEP mode.
When CTS is high, shutdown the UART to
save power.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Conceptually, ring_buf_item_put() and ring_buf_item_get() are specialized
versions of ring_buf_put() and ring_buf_get(). Make it so to rationalize
the code to open the way for more optimizations.
This means we need specialized wrappers on top of ring_buf_init()
accordingly, given that the core machinery is now common and byte based.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The +CGATT: is followed by 'OK' or 'ERROR', so its handler
should not set error code and give sem_response.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Increase the default user-allocable number of RTC channels to 3,
which is the numer of physical RTC CC channels not used by Zephyr
on nRF52 series SoCs.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
The updated nrf_802154 API accepts 64-bit time in microseconds.
The shim layer is updated to use 64-bit time.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
sensor_value_from_double had a early overflow when converting the
fractional part (val2). This occured when input was more then
2147.493647 (inp >= INT32_MAX/1000000.0 + 0.01).
return value -ERANGE as this is what errno is set to by `strtod` and
similar posix functions.
fixes issue #39176
Signed-off-by: Simon Frank <simon.frank@lohmega.com>
Fix build break introduced in 03ab730347:
/zephyr/drivers/can/can_mcp2515.c:871:55: error: 'const struct
mcp2515_config' has no member named 'int_pin'; did you mean 'int_gpio'?
871 | LOG_ERR("Unable to configure GPIO pin %u", dev_cfg->int_pin);
/zephyr/drivers/can/can_mcp2515.c:942:14: error: 'GPIO_DT_SPEC_INST_GET'
undeclared here (not in a function)
942 | .int_gpio = GPIO_DT_SPEC_INST_GET(0),
| ^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
gd7965 broke after 42bbb30ecf:
/zephyr/drivers/display/gd7965.c: In function 'gd7965_init':
/zephyr/drivers/display/gd7965.c:379:23: error: passing argument 1 of
'device_is_ready' from incompatible pointer type
[-Werror=incompatible-pointer-types]
379 | if (!device_is_ready(&config->reset_gpio.port)) {
| ^~~~~~~~~~~~~~~~~~~~~~~~
| |
| const struct device * const*
Fix all the occurrences.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit implements the temperature sensor interface for
the Maxim MAX31875Low-Power I2C Temperature Sensor.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Add a name for the choice of gsm modem so that it can be
default to a certain type in board's Kconfig.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Properly set both pull up and down flags explicitly when
making changes.
Properly implement disabling interrupts on a given pin.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Correct MEC172x OOB register access that causes compilation error,
Use device-tree-based register access instead of HAL access
This occurs whenever CONFIG_ESPI_OOB_CHANNEL_RX_ASYNC is
enabled.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
I2C scan and recover functions didn't have mandatory parameters
specified, which resulted in not displaying the I2C controllers in
help message. Instead, the command was executed, and argv was
dereferenced outside of the bounds, providing invalid data to
device_get_binding function.
Other functions had defined mandatory parameters without taking their
names into account, they are provided as argv[0].
Signed-off-by: Michał Barnaś <mb@semihalf.com>
We're now using the Kconfig copied from the upstream lvgl repository. It
uses the LV_ prefix for all options while we're using LVGL_ for
Zephyr-specific ones. Make the latter consistent with upstream but also
make sure they're distinct from lvgl's by using LV_Z_ as the prefix.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@huawei.com>
With a number of the i.MX SoCs (e.g., the i.MX8M Plus), NXP has moved to
supporting the integrated Cortex-M cores with the MCUXpresso SDK (MCUX).
As a result, certain Zephyr drivers (such as the IPM driver) need to be
updated to utlize this new MCUX-based SDK.
This change adds support for the MCUX Messaging Unit driver pulled in by
this PR:
https://github.com/zephyrproject-rtos/hal_nxp/pull/130
Additionally, this change enables the new IPM_IMX_REV2 config for the
mimx8ml8_m7 SoC target which utilizes this new revision of the driver.
Signed-off-by: Chris Trowbridge <chris.trowbridge@lairdconnect.com>
The driver was re-using the display log level, however, it is no longer
part of the display driver category.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Cleanup list of includes
- Remove unused structs/definitions
- Make init function static (is called by system init)
- Make config/data naming and access consistent
- Remove redundant zero initialization of data
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver is sleeping in milliseconds using a custom wrapper around
k_busy_wait, move to k_sleep.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Modernize the driver a little bit by using i2c_dt_spec. Note that the
RGB on its own is another I2C device connected to the same bus. Ideally,
both should be defined in Devicetree, but this has not been done for
now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver was never migrated to Devicetree, this patch converts the
driver to a proper Devicetree based device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver does not implement a display API, it has a custom API. Having
it under display is confusing, since display API consumers may expect
they can use it. These sort of custom drivers fit better under
drivers/misc.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add CAN controller device statistics support.
Initially the following per-device statistics are supported:
- Dominant bit transmission errors
- Recessive bit transmission errors
- Bit stuffing errors
- CRC errors
- Format errors
- Acknowledge errors
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The current MCUX IGPIO driver assumes that the target SoC supports
the DR_SET, DR_CLEAR, and DR_TOGGLE functionality, but some do not
(namely, the M7 core of the i.MX8M Plus SoC). Current releases of
the MCUXpresso SDK IGPIO driver contain utility functions to set,
clear, and toggle pins which include provisions to support SoCs
with and without DR_SET, DR_CLEAR, and DR_TOGGLE, and this change
switches to using these utility functions.
Additionally, this change enables GPIO support on the mimx8ml8_m7
target.
Signed-off-by: Chris Trowbridge <chris.trowbridge@lairdconnect.com>
In the I2C ISR, it prints the error message when SMBST is set to an
unexpected value. However, we found a spurious interrupt which caused
the SoC to enter the ISR with SMBST=0. Because the spurious interrupt
will not break the I2C operation, this commit limits the error log to
print if SMBST is not equivalent to 0 to prevent a false alert.
Signed-off-by: Andrew McRae <amcrae@google.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
STM32H7B3 supports max SYSCLK and AHB clock frequencies of 280 MHz,
and max APB frequency of 140 MHz
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
This adds support for the ads101x (ads1013, ads1014, ads1015) and
ads111x (ads1113, ads1114, ads1115) family of i2c adc devices.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
The crypto driver API is 6 years old, has 5 different implementations,
and is widely used.
Remove the EXPERIMENTAL marking from the API. Each implementation may
still choose to mark itself as EXPERIMENTAL.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Initialize the i2c config of the emulator based on the clock_frequency
property.
The emulator can be used without calling the i2c_configure function, but
the i2c_get_config would return an error. With this change, it is
possible to get the config prior to the i2c_configure call.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This register is a pre-define hardware slave A and can be accessed
through I2C0. It is not currently used, so it can be disabled to
avoid illegal access.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Helpers like dev_cfg have been removed from all in-tree drivers, this
one was missed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the IF_ENABLED macro helper to conditionally initialize the int_gpio
field. This avoids duplication of initialization code.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device instance can be obtained at compile time. Here
DEVICE_DT_GET_OR_NULL is used as the following code seems to accept a
NULL condition, meaning instance is optional.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using spi_dt_spec. Most internal
functions now take a device reference to simplify the operation, since
config did not exist before.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device already has a DT compatible (and uses DT properties).
Instantiate the device using the DT-based macros and remove hardcoded
name.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using spi_dt_spec. Note that driver
has 2 SPI configurations, identical except the speed. For this reason,
the slow config is still kept in RAM and copied from the one obtained
via the SPI dt_spec macros. A better solution would be to have macros
that allow to override the SPI frequency, but this can be improved
later. Most internal helpers have been adjusted to accept a device
reference to make SPI (and future GPIO) transition easier.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Controller device can be obtained at compile time, so make
implementation more efficient thanks to that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Controller device can be obtained at compile time, so make
implementation more efficient thanks to that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The controller device instance can be obtained at compile time using
DEVICE_DT_GET, so do that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use DEVICE_DT_GET instead of device_get_binding, since the device
reference can be obtained at compile time.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PCIe device can be obtained at compile time, so make code more
efficient thanks to that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using gpio_dt_spec. To simplify
migration, all internal functions now take a device reference instead of
device data. As a result, the redundant config pointer in data has been
removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using gpio_dt_spec. As a result, the
driver data structure has become unused and so removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using gpio_dt_spec. Note that as a
result, the driver data structure has become obsolete/unused and so has
been entirely removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify the driver implementation by using gpio_dt_spec. Note that most
internal functions have been changed to accept a device instance instead
of data/config references to make transition easier and to align with
most other drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
An optional reference to the temperature sensor can be obtained at
compile time, update implementation.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device configuration field access was dropping const qualifier for
no reason, don't do that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use struct i2c_dt_spec to simplify code. This change also allows to drop
device_get_binding usage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The bus device can be obtained at compile time, so use DEVICE_DT_GET
instead. Device configuration is now used to store the bus device
reference.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The select uart instance used in uart driver initialization won't
work as expected because the index used was not correct. This
fixes the macro call to use proper index value.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
As a complement of 7689abee34,
which fixed an issue where gpio number could errouneously be
set to a number greater than 32 in DTS, there is also another
situation where driver instance can be configured with a pin number
greater than 32.
This PR adds another check in GPIO driver to confirm
whether the PIN number is within valid bounds.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Use index zero, not one. The Xtensa tools emit the timers in priority
order, and as mentioned in the kconfig warnings using high priority
timers doesn't work. This also makes room for using software
interrupts that can preempt a timer interrupt for test purposes.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Do not used generated macro from devicetree subsys directly
in driver.
Remove definition of it's own "FOREACH_STATUS_OKAY".
Redefine "DT_DRV_COMPAT" for each supported compatible string.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (struct _uart*) are no longer
needed. UART_STRUCT has also been dropped in favor of using the config
pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (struct pl011_regs *) are no
longer needed. PL011_REGS has also been dropped in favor of using the
config pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (UART_T *) are no longer
needed. UART_STRUCT has also been dropped in favor of using the config
pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (struct uart_reg *) are no
longer needed. HAL_INSTANCE has also been dropped in favor of using the
uart field from the config struct now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from (uint8_t *) to (struct uart_cmsdk_apb*)
are no longer needed. UART_STRUCT has also been dropped in favor of
using the config pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
When CONFIG_PM=y, the IRQ function also needs to be stored, something
the "generic" uart_device_config cannot support. This uses the config
irq_config_func field to store the function in all situations, thus
removing unnecessary logic and finally dropping uart_device_config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Instead of using "generic" uart_device_config fields, store the right
pointer to avoid unnecessary casts. This change makes code simpler and
more idiomatic.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This enables the below configuration so the AP and EC are able to
communicate over eSPI:
CONFIG_ESPI_PERIPHERAL_EC_HOST_CMD
CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION
CONFIG_ESPI_PERIPHERAL_CUSTOM_OPCODE
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When sleep modes are used, configure sockets
to restore on boot. Letting the HL7800 manage
this means the driver does not have to do it.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit sets the power down bit of the module SDP, UART3, UART4,
and I3C by default. The module's driver should take the responsibility
to clear it to turn on the power. It helps reduce the power consumption
when an application doesn't use these modules.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
If CONFIG_ETH_NATIVE_POSIX_RANDOM_MAC=n and
CONFIG_ETH_NATIVE_POSIX_MAC_ADDR="", the MAC address can be set with a
net_mgmt call before the driver is initialized.
Signed-off-by: Björn Stenberg <bjorn@haxx.se>
The ADC sampling of it8xxx2 needs to read each channel in sequence,
so it needs to wait for an interrupt to read data in the loop
through k_sem_take().
In test_adc.c, k_timer_start() is used in the interval test, so we
need to use polling wait instead of k_sem_take() to wait, otherwise
it will cause kernel panic.
k_is_in_isr() can determine whether to use polling or k_sem_take()
at present.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Makes the IRQ_CONNECT macro statically declarable for Xtensa (nothing
prevented it except its structuring). Allows for IRQ_CONNECT usage
on a xtensa only platform to be declared statically avoiding the
fluff of setting up and enabling irqs for cavs gpdma.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Intel's adsp needs to set, at a minimum, a clocking bit before the driver
can initialize the designware dma controller. In many ways it is the
designware dmac IP but with additional registers and functionality added
on top of it. So the code structure here follows how the hardware
appears to be designed, layered on top of the designware driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Move most of the designware driver into a common compile unit with a
a header that exposes the common functionality.
This allows for derivative hardware, such as that in intel's adsp (cavs)
to use the common functionality while extending.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
STM32L5 has option to disable dual bank support.
When this is disabled, the flash page size is changed
from 2k pages to 4k pages. This PR adds support for this
diversity.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Add power management constraints to the entropy driver.
This prevents the hardware block to lose it's clock when
going into any stop mode of the cpu, which would cause the
clock error flag to be set while filling the pool.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Add Kconfig switch to disable automatic eSPI slave boot
acknowledgement.
This allows to perform lenghty operations before continue any eSPI
handshake with eSPI master.
Required for eSPI SAF boot configuration.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Currently pwm_npcx_pin_set() disables and reconfigures the PWM
controller every time its called, causing the PWM line to pulse even if
only the duty cycle is changed.
Modify the function so that controller is only disabled if any of the
configuration has to be changed, only set the new DCR otherwise.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Due to serialization restrictions radio api calls cannot be nested, any
violation of this rule leads to a deadlock. This commit fixes the bug
by transferring the nested radio api call to ot_radio_workq.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This patch adds GPIO and 96board LS (Low Speed)iexpansion connector
support for SiFive HiFive Unleashed and also enables GPIO basic test.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Add pwm-0 to support tests/drivers/pwm/pwm_api.
Solve tests code runtime error on it8xxx2_evb:
1.If the pwm channel target frequency is < 1, then we will
return an error code.
2.If the target_freq is <= 324Hz, we will configure that this pwm
channel need to output in EC power saving mode.
In test_pwm_cycle() case, the period is 64000, then the
target_freq is 8000000 / 64000 = 125Hz and <= 324Hz, so we will
switch the prescaler clock source from 8MHz to 32.768kHz.
Then the target_freq is 32768 / 64000 = 0.512Hz and < 1Hz,
this will return an error code. In order to get the same
target_freq, we always return PWM_FREQ in
pwm_it8xxx2_get_cycles_per_sec().
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
The driver enabled extended error code (AT+CMEE=1) during
setup but is missing a handler for the +CME ERROR, fix that.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Waits until the network interface goes down before switching the
GSM_MUX. It uses the NET_MGMT_EVENT to signal a semaphore to
contiue when closed. This allows for the LCP state machine to
properly terminate. When skipping this wait, the second time
connecting, the connection might fail.
Tested on a real modem.
Fixes GSM PPP behavior in combination with: #41802
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
There is a part of the AT2X driver that handles controlling WP pin
connected to the EEPROM chips, but in some systems, the WP line can be
controlled by another component.
Check if any AT2X node defines wp-gpios, if not - do not compile the
code related to WP to save space.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Reduce the number of TX buffers in use on the MCP2515 from 3 to 1 in
order to avoid CAN frame priority inversion.
The MCP2515 is unable to do internal TX frame arbitration based on the
CAN-ID of the frame. Priority must be set per TX buffer and the priority
cannot be rewritten unless the frame transmission is aborted.
Fixes: #26541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch the Bosch M_CAN driver from TX FIFO mode to TX Queue mode in
order to avoid priority inversion of CAN frames.
Fixes: #26541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Similar to commit be32e33774, this
replaces the use of DEV_NAME macros with dev->name directly. This also
fixes#42996 for i2c_sam_twi.c in particular.
Signed-off-by: Ryan Armstrong <git@zerker.ca>
Change the way this shim driver configures the I2C frequency, so that
it is possible to use also 1 MHz on nRF5340 (the nrfx driver performs
extra initialization steps for this frequency, hence it needs to be
reinitialized when the shim is reconfigured).
Correct the shim to handle selection of 1 MHz (or FAST_PLUS) bitrate
both through dts and I2C API.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
There are some pins that do not support internal pullup/pulldown.
This PR make sure to check that and return error if needed.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ESP32 has 2 GPIOs: gpio0 and gpio1.
Zephyr DTS model requires pin definition in dts file
from 0 to 31, meaning that when some pin within gpio1 range
is required, gpio driver needs to increament this value
by 32, required by LL API.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Limit gptp range_adjust range for improved performance.
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Xabier Marquiegui <xmarquiegui@ainguraiiot.com>
mcux enet driver updates:
a) add mutex to access the ptp timer variables
b) use thread for rx(cooperative) andfor tx cleanup(cooperative)
c) use a thread for ptp inner clock updater(pre-empty)
This patch fixes the following issue:
```
ENET_SendFrame error: 4004
```
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Co-authored-by: Seb Laveze <sebastien.laveze@nxp.com>
Signed-off-by: Xabier Marquiegui <xmarquiegui@ainguraiiot.com>
GPT timer driver was announcing progress to the kernel too soon when an
announcement was requested via sys_clock_set_timeout() on a tick
boundary. Fix rounding to add a tick worth of cycles.
Fixes#42665
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
MCUX watchdog timer supports min window of 500ms. Increase maximum task
watchdog timeout window to 500ms by default, so that this sample can run
on iMX RT SOCs. Also update iMX RT watchdog driver to reject timeout
maximums under 500ms with a useful error message
Fixes#40153
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The st7789v_transmit function accepts a device, not device data. As a
result, driver could not be compiled when reset GPIOs were not defined
in Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The configuration initializer had a syntax error (missing =). The driver
could not be compiled as a result.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Restore the testcase to run on the qspi nor-flash controller
of the disco_l475_iot1 board
of the disco stm32f746 board
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Like the stm32 flash driver, in case of QSPI nor flash controller
the read or write or erase returns '0' if data is of null size.
This avoids useless QPSI low level access to the controller.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Currently the generic driver is always unconditionally compiled. Fix
this by compiling it only when needed.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This is a follow-up to commit 11bbdb030d.
When RX is automatically disabled because all provided RX buffers have
been filled up, the rx_enabled flag needs to be cleared, otherwise it
will be impossible to enable RX again.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
added UART interrupts driver for Raspberry Pi Pico board
moved baudrate from config to data structure
Signed-off-by: Andrei-Edward Popa <andrei_edward.popa@upb.ro>
if peripheral clock is not configured, uart init API function returns 0,
so we need to check the return value of this function
Signed-off-by: Andrei-Edward Popa <andrei_edward.popa@upb.ro>
The properties from dts to driver were not translated
correctly from - to _. This PR fixes this
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Only TCP sockets should send a NULL packet
if the server closes the connection or there
is a socket error.
UDP sockets do not need to do this because
they are connectionless.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The ADC driver now supports three different implementations. To maintain
readability, this patch implements an adc_fixup.h that permits more
generic access to relevant registers.
This patch also introduces support for a new third shape ADC - as found
in the SAML21 for example.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Previously this was expected to be equal to 1 at all times. This doesn't
play well with the sample or other users (e.g: adc_shell). Instead, we
should count the number of active channels in the bitfield, and ensure
that only one is identified.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
A common pattern here was to take the work item as the subfield of a
containing object. But the contained field is not a k_work, it's a
k_work_delayable.
Things were working only because the work field was first, so the
pointers had the same value. Do things right and fix things to
produce correct code if/when that field ever moves within delayable.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
UARTE does not support RO TX buffers. Added cache buffer to the
driver which is used when provided buffer is not from RAM.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Gives more explanation on uart_stm32_err_check function.
On stm32 F4X, F1X, and F2X, when clearing the usart Error Flag
(PE, ORE, FE, NE), the LL Clear function applies a software sequence
which reads the usart SR then the usart DR.
Consequently the RXNE flag is affected (cleared) by the
uart_stm32_err_check function call.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch adds fixes to the api so that it behaves as expected.
1 - The irq_tx_ready now only returns true if the tx interrupt is
enabled.
2 - The irq_tx_complete now functions as expected and returns true
only once all characters have been transmitted
Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
Replace '%s' with '%ld', so that 'long' value is properly printed with
shell_error(). This suppresses following warning:
zephyr/drivers/lora/shell.c:181:23: warning: format '%s' expects \
argument of type 'char *', but argument 4 has type 'long int' \
[-Wformat=]
181 | shell_error(shell, "Invalid bandwidth: %s", lval);
| ^~~~~~~~~~~~~~~~~~~~~~~ ~~~~
| |
| long int
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
API change was done in:
https://github.com/zephyrproject-rtos/zephyr/pull/39041
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
The handler was reworked to internal function and it
is called from the erase and the write
procedures automatically now.
This change was made due to deprecation of the flash write-protection
API.
Explanation for so late removal:
Reworked callback was introduced despite that the API had been
already deprecated at the addition time.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
On nRF53 Series SoCs, the highest SCK frequencies can only be achieved
when the HFCLK192M clock divider is changed from the default /4 setting.
Such change results in increased power consumption, so the divider needs
to be changed only for periods when it is actually necessary.
This commit modifies the driver behavior so that it changes the divider
only when a QSPI bus operation is performed.
However, when XIP accesses to the flash chip are also used, it may be
needed to keep the divider changed even when the driver is idle so that
the XIP access speed is not reduced, hence a custom API function that
allows forcing this is introduced for the driver.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Only run the `uninit` function if the SPI instance has previously been
configured. This stops an assertion in the HAL drivers from triggering
due to running `uninit` without a previous `init`.
Fixes#42299.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
HAL call function used to retrieve the configured baudrate
returns the real calculated value, which might not be exactly as
the configured. For baudrate of 115200, HAL api
returns 115201, which then causes uart_basic_api test
to fail. Instead of returning the calculated baudrate value,
returns the configured one.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Set enable configuration change bit in can_mcan_set_timing() because
the NBTP register can only be changed if we're in init mode AND
configuration change bit is set, per MCU docs.
Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
Invalidate the cache before the RX data block is passed to the DMA
engine and not after it is received. If the RX data block contains
dirty cache lines they can be flushed anytime, overwriting legitimate
data that have been prefilled by the DMA module.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
`qdec_sam` driver supports currently only position measurement and does
not support reading of the index signal. Unfortunately, the index
signal was internally enabled in the driver. If the pin to which the
index signal was connected was used by another driver it could lead to
a false detection of the signal change. Detection of the index signal
change resets the position measurement.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Fix handling of the return value by `eth_sam_gmac_set_config` function.
The function is used as a backend by
`net_mgmt(NET_REQUEST_ETHERNET_SET_MAC_ADDRESS, ...)` to change the
interface MAC address at run time.
Tested on sam_e70_xplained board.
Fixes#42151
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Remove unneeded NULL check in pmic init function. Not required as
device_is_ready() will handle NULL device structs.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Config struct in pmic regulator driver was being used as a non-constant
value when an array defined at compile time was cast to a struct used at
runtime. Move this pointer to the data struct in pmic driver.
Fixes#41951
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This corrects the following:
1. The priority of type cast is lower than member access. So don't need
the redundant parentheses.
2. The macro should be added to the parentheses.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
MCUX usb ISR was making usb callbacks directly, which caused assertion
failures when a callback attempted to lock a mutex. Move USB callback
handler to separate thread, and make ISR notify thread via message
queue.
Fixes#40638
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The CAN_BUS_UNKNOWN CAN controller state is only used to indicate that
the current CAN controller state could not be read.
Remove it and change the signature of the can_get_state() API function
to return an integer indicating success or failure.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The current driver doesn't handle the LBD flag, this leads
uart_stm32_err_check to return always true if a Line Break
is detected.
This PR adds Line Break Detection and the related flag clearing,
F0 series it's excluded from the changes.
Fixes zephyrproject-rtos#41339
Signed-off-by: Andrea Campanella <andrea.campanella@helvar.com>
The commit 44679c7bd8 introduced this
duplicated declaration of the local variable data.
This commit fixes this issue.
Fixes#42117
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
The initialization code was updating the freq field in the const
declared config block at runtime because the frequency is not
known at compile time. Add a get_freq() api call to handle any
runtime requests for frequency.
fixes#41953
Signed-off-by: David Leach <david.leach@nxp.com>
Device 'data' variable name was incorrect due to recent treewide naming
cleanups. Fix variable name to fix build error.
Fixes#42118
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Let's have dev_data for dev->data so it will not conflict with struct
call_back data variable.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Coverity identified valid error where the routine does a NULL
check for two different pointers after they have been dereferenced.
fixes#39868fixes#39874
Signed-off-by: David Leach <david.leach@nxp.com>
Current version of STM32 PTP clock reads current PTP time by querying
second and nanosecond registers sequentially. It is possible for second
to roll over between reading second and nanosecond registers, causing
returned time to be off by a second. This bugfix resolves that issue.
Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
Exposes the RC register so that the initial value can be set in
the device tree. This is useful in the case where the timer
generates an event but an interrupt is not required.
e.g generate event to sample adc on RC register match.
Tested on Atmel SMART SAM E70 Xplained Ultra board
Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
Current gpio and uart initialization level is set to
PRE_KERNEL_2, which won't let uart_console subsystem
to init its hook properly as it has same level.
Prioritize uart and gpio so that the console hooks
are properly initialized.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Current uart driver implementation is incompleted regarding the
usage of DT_INST_FOREACH_STATUS_OKAY. If uart0 and uart2 are selected,
build breaks due to peripheral number ordering, which would be
0 and 1 in this case. This fix PR fix this by re-working the macros
and setting proper uart peripheral instances in DTSI, required for signal
routing configuration.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update the Kconfig configuration items used to determine if the current
target is based on the Zynq-7000 SoC family as part of the re-organi-
zation of the Zynq-7000 SoC configuration data.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
Update the Kconfig configuration items used to determine if the current
target is based on the Zynq-7000 SoC family as part of the re-organi-
zation of the Zynq-7000 SoC configuration data.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
PR #41918 introduced a few warnings and build failure due to
missing data cofniguration and DEV_CFG() removal.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
After #41918, DEV_CFG removal triggered discard qualifer warning
during build. As uart_hal functions don't required const qualifier
and uart_context_hal_t has modified data, this PR moves hal instace
to data struct instead of config struct.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
After #41918, build started to warn discard qualifer
in config struct. This adds const into those structs.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updated H4 driver to initialize setup function. Finally bt_h4_vnd_setup
function must be implemented in vendor-specific HCI extension module if
CONFIG_BT_HCI_SETUP is enabled.
BT_HCI_SETUP feature is useful when the BT Controller requires execution
of the vendor-specific commands sequence to initialize the BT Controller
before the BT Host executes a Reset sequence.
To enable this feature the CONFIG_BT_HCI_SETUP should be enable.
Fixes#41140
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
- Added config BT_HCI_SETUP to enable HCI vendor-specific Setup feature,
- Added pointer to 'setup' function in bt_hci_driver structure.
BT_HCI_SETUP feature is useful when the BT Controller requires execution
of the vendor-specific commands sequence to initialize the BT Controller
before the BT Host executes a Reset sequence. To enable this feature the
CONFIG_BT_HCI_SETUP should be enable.
Fixes#41140
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Address the issue mentioned in zephyrproject-rtos#7412
Using printf() with "%x" to print an off_t value produces the
following warning:
format '%x' expects 'unsigned int', argument has type 'long int'
228 | LOG_DBG("Erasing sector at 0x%08x", offset);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~
| |
| off_t {aka long int}
In newlib off_t is long. Even though both int and long are 4 bytes wide
in the architecture in use, GCC wants to see "%lx" to printf() a long.
Using "%"PRIx32 still produces the same warning because PRIx32
(from inttypes.h) still expands to simply an "x" and not "lx".
PR zephyrproject-rtos#40004 has solved this by casting offset to
ssize_t. The same solution is emulated here.
Signed-off-by: Milind Paranjpe <milind@whisper.ai>
Fixed#41945
NO_PINT_INT can have the same value as a specific pin.
E.G. For 1 byte pint_pin_int_t it equaled interrupt1.
Now is instead always 1 higher than the highest pin.
Expects fsl to keep setting values from 0 to
(number of connected outputs - 1)
Signed-off-by: Martin Koehler <koehler@metratec.com>
Build shows warning due to incompatible
CPU vendor name. This fixes it and applies
necessary changes in files.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
* New m_can driver variant for STM32H7, as it uses the complete m_can
register set.
* Fix definitions for CAN_MCAN_RXF0S_F0FL, CAN_MCAN_TXEFC_EFSA_POS.
Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
1. Update to add support for Flexcomm8-13.
2. Fix the clock control driver, the enclosing #define
was incorrect.
3. Identify HS_SPI port using the appropriate Register
define
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
For multicore devices like nRF53, shim layer part of setting mac keys
and frame counters is called on application core where
CONFIG_NRF_802154_ENCRYPTION is disabled (the define concerns radio
driver for net core). This commit replaces
CONFIG_NRF_802154_ENCRYPTION with CONFIG_IEEE802154_2015.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This commit adds support for tickless operation on the MIPS CP0 timer.
The code closely follows the Xtensa and RISCV timer drivers.
All tests pass.
Signed-off-by: Remy Luisant <remy@luisant.ca>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
In order to preserve stack, this replaces the single-bus enumeration
loop by a stack based non-recursive pcie hierarchy iteration.
Each stack entry contains a bridge bus enumeration state.
When a bridge endpoint is detected on the current bus, it is
configured and this new bus is pushed on top of the stack in
order to be enumerated at next loop.
When enumeration ends on the bus, the current bus state is
removed from the stack to continue enumeration on the previous
bus.
This enumeration affects a sequential bus number to each new
bus detected in the same order as Linux & U-Boot does.
In this hierarchy:
[0 1 2 ... 31]
| | |
EP | |
| |
[0 1 ... 31] [0 ... 31]
| | |
| EP |
| [0 ... 31]
[0 ... 31] |
| EP
EP
We will get the following BDFs enumeration order:
00:00.0 Endpoint
00:01.0 Bridge => Bus primary 0 secondary 1
01:00.0 Bridge => Bus primary 1 secondary 2
02:00.0 Endpoint
... Bus secondary 2 => subordinate 2
01:01.0 Endpoint
... Bus secondary 1 => subordinate 2
00:02.0 Bridge => Bus primary 0 secondary 3
03:00.0 Bridge => Bus primary 3 secondary 4
04:00.0 Endpoint
... Bus secondary 4 => subordinate 4
... Bus secondary 3 => subordinate 4
The gives the following primary/secondary/subordinate map:
Bus 0 [0 1 2 ... 31]
| | |
| [0:1->2] [0:3->4]
EP 00:00.0 | |
| |
Bus 1 [0 1 ... 31] Bus 3 [0 ... 31]
| | |
| EP 01:01.0 |
[1:2->2] [3:4->4]
| |
| Bus 4 [0 ... 31]
Bus 2 [0 ... 31] |
| EP 04:00.0
EP 02:00.0
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds setup of Type 1 bridge endpoints in two steps, first when
endpoint is detected and secondly when enumerating the next endpoint.
First, the code configures the bus primary & secondary number and 0xff
as subordinate to redirect all PCIe messages to this bus.
Then memory & I/O base are programmed by getting the current allocation
bases.
Finally, now right away, we program the subordinate to the max bus
number under the bridge, here the same, and the memory & I/O limit,
here lower than the base.
This doesn't make the bridge totally usable, enumeration would work
bus not for nested bridges and BARs wouldn't be accessible.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In order to prepare support for bridges enumeration, split out the
actual endpoint enumeration code out of the enumeration loop.
Pass a skip_next_func boolean to indicate if the current endpoint
is multifunction of not, to continue to next dev or next function.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Type 1 endpoints has 2 BARs are the same position as the Type 0
BARS 0 & 1, so reuse the generic_pcie_ctrl_type0_enumerate_bars()
for both types by passing the number of possible BARs on the endpoint.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Initial implementation of a simple GPIO controlled power domain.
It exposes no API of its own, all functionality is contained inside
the runtime power management callbacks.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Some drivers explicitely casted data/config from void * to the
corresponding type. However, this is unnecessary and, in many drivers it
has been misused to drop const qualifier (refer to previous commits).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data
and dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data
and dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data
and dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
As suggested by Tomasz Bursztyka, it's clearer to move generic after the
domain prefix, here pcie.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
As suggested by Tomasz Bursztyka, translate is clearer than xlate in
the PCIe controller functions and callbacks names.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
When the csl is active the nrf_802154_sleep() is called unnecessary.
This commit fixes it.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This adds skeleton Kconfig/CMakeLists.txt and common implementation
of some sys_mm_drv_*() functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
GPT timer must continue running in low power modes, as it is the system
wakeup source. Set configuration to ensure peripheral will not stop
running in low power modes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
drivers/spi.h header is included when CONFIG_DSA_SPI
is enabled so there is no necessity to do that once again.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Remove the unused NUM_TX_EVENT_FIFO_ELEMENTS helper macro. There is no
dts property for setting the TX event FIFO size.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add watchdog0 to support tests/drivers/watchdog/wdt_basic_api.
Solve tests code runtime error on it8xxx2_evb:
1.When run the wdt tests api, we shouldn't reduce the warning
timer time, so I add config WDT_ITE_REDUCE_WARNING_LEADING_TIME,
this config will be enabled only on platform EC.
2.Upper limit window timeouts can't be 0 when we install timeout.
3.Since we support wdt_it8xxx2_disable(), then we should support
flag WDT_OPT_PAUSE_HALTED_BY_DBG, too. Watchdog can be stopped
by IT8XXX2_WDT_EWDSCEN bit of ETWCTRL reg.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
In order to align with macros used to obtain a device reference (e.g.
DEVICE_DT_GET), align the PM macros to use "GET" instead of "REF". This
change should have low impact since no official release has gone out yet
with the "REF" macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
gPTP module clock is enabled for rt11xx. gPTP is not working correctly
on the RT10xx or RT11xx series, but this module clock needs to be
enabled
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT11xx soc has multi ring enet IP, which has different HAL functions.
Update eth_mcux driver to account for this
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The SAM spi driver depends on GPIO driver to work. It seems that this
dependency chain it is not handled. This select GPIO driver when SPI
driver is enabled. It rework GPIO and SPI Kconfig to select driver by
devicetree and drop entries at Kconfig.defconfig.series file.
Fixes#41525
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit fixes compilation warning (unused variable)
generated in nrf5_config_mac_keys function, when the ASSERT
macros were disabled.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
If a transaction fails, the bus was not being returned to idle. This
increases power consumption, and can cause the following transaction to
be misinterpreted.
By issuing a STOP command on error, we can ensure that the bus returns
to idle correctly.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
When calling i2c_transfer(), the bus failes to enter the idle state when
performing a read, or an unacknowledged write. This increases power
consumption, and can cause the following transaction to be
misinterpreted.
This behaviour was observed on a SAML21 part. There appears to be a race
condition between the peripheral setting CLKHOLD, and the command being
correctly set up - so now we wait for the CLKHOLD field to be set before
issuing the STOP command, and this resolves this issue.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
This fixes both TX ready and completed uart
calls to meet valid condition.
Closes#41526Closes#41624
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Rework the transmit error handling in the NXP MCUX FlexCAN driver:
- Frame transmission must be automatically retried in case of lost
arbitration or missing acknowledge.
- Abort any pending TX frames when bus-off state is entered.
- Fail early in can_send() if in bus-off state.
Fixes: #19502
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for disabling automatic retransmission of CAN frames
(similar to CAN "one-shot" mode in the Linux kernel).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Introduce Pin Function Controller for Renesas R-Car family.
This first implementation support to set a given pin as gpio
or peripheral (GPSR), to set a peripheral function to a
pin (IPSR), to set pull-up, pull-down (PUEN, PUD).
In addition this driver allows to set driving capabilies(DRVCTRL).
Pins are identified thanks to the per SoC binding for
pin definition which also contains pin alternate function
parameters.
Some pins can also have driving capabilities, some have bias
capabilities.
In order to find the correct bias and drive registers pfc_r8a77951.c
describes the different registers.
Each SoCs or package will need to define getters
for these registers: pfc_rcar_get_bias_regs() and
pfc_rcar_get_drive_regs().
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
1. Rename DT_COMPAT_ST_BBRAM_IT8XXX2 to COMAPT_ITE_IT8XXX2_BBRAM
2. The default configuration "$( )" should be a parentheses instead
of curly brackets. The BBRAM for it8xxx2 can be driven after
correcting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
BBRAM content should be cleared when boot from cutoff. Compare magic
number to decide whether to clear entire BBRAM.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Refactors all of the on-chip flash drivers to use a shared driver class
initialization priority configuration, CONFIG_FLASH_INIT_PRIORITY, to
allow configuring flash drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers.
Driver-specific options for SPI-based flash drivers are left intact
because they need to be initialized at a different priority than on-chip
flash drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit updates the ieee802154 driver to match the current feature
set of the nRF 802.15.4 radio driver for nRF53 SoCs.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Clear ADRDY before enabling ADC to ensure the subsequent
wait for ADRDY does not stop prematurely in case ADRDY
was already set.
The "ADC on-off control" sections of the following reference manuals
were consulted. That gives at least one instance per series affected
by this change, even if not every affected MCU is covered.
- RM0438 (STM32L552xx and STM32L562xx)
- RM0351 (STM32L47xxx, STM32L48xxx, STM32L49xxx and STM32L4Axxx)
- RM0434 (STM32WB55xx and STM32WB35xx)
- RM0454 (STM32G0x0)
- RM0440 (STM32G4 Series)
- RM0399 (STM32H745/755 and STM32H747/757)
- RM0433 (STM32H742, STM32H743/753 and STM32H750)
- RM0453 (STM32WL5x)
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
Use a wrapper for LL_ADC_Enable that also waits for ADRDY if required
by the SoC to make sure it's properly enabled everywhere this is done.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
the stm32 spi drivers now takes the DTS frame_format property
from the include/ drivers/spi.h
It will be possible to select the Motorola (default)
or TI from the DTS entry of the device,
when soc supports it, else a run time error is raised.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add kscan0 to support tests/driver/kscan/kscan_api.
When running the tests code on it8xxx2_evb, it shows fatal
error: IRQ is enabled. We find that once polling_task() is
created and executed, the KSI interrupt will be enabled and
before we call irq_connect_dynamic(), so we switch both
function sequence.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add a dummy driver for the `vnd,adc` compatible to allow compilation of
drivers utilising an ADC when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
On some platforms, HPET is not wired to trigger IRQ 2.
This would make HPET non-functional if the legacy
interrupt routing bit is set in the global config
register. This adds a DTS flag so the driver won't
set the bit to enable legacy interrupt.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add an interrupt driven i2c driver for gd32 i2c peripheral.
The transmit and reception method refer from GD32 SoCs user manual.
Particularly, reception method choose the solution B.
There have some wait for state ready logic in the driver. It cause by
i2c device internal state change slower than i2c driver.
Signed-off-by: HaiLong Yang <cameledyang@pm.me>
We will soon need to do more boundary checking to test whether we are
reading secure or non-secure memory.
Refactor the boundary checking in preparation for this.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
GPIOTE channel was not freed when pin was reconfigured. This lead to
channel pool draining when pin was frequently reconfigured.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This PR adds the different handling of temperature sensor for the
STM32L5 soc. In this soc, there are some calibration settings which
need to be applied for temperature conversion.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
moving the conversion from adc value to the get function
which will be used for different handling of stm32 temp sensors
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Just minor styling changes to capitalize the first character
and removing the trailing comma on the brief doc description
on two copy functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add optional user data argument to can_set_state_change_callback() to
comply with Zephyr API design guidelines.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Subghzspi instances cannot have any pinctrl configs,
they are blacklisted by the dts binding. This caused an
initialization failure of the spi_ll_stm32 driver for
subghzspi instance because no "default" pinctrl was found.
This commit solves the problem by skipping the pinctrl setup
for subghzpi devices. The use_subghzpi_nss property is used
to identify a subghzspi device, as this is a required boolean
property only available in the subghzspi binding this is a
perfect indicator for such instances.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
This commit adds the API of get_config that will make test of
tests/drivers/i2c/i2c_api pass on it8xxx2_evb board.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Certain stm32 soc's have a single shared irq for all adc channels
on those soc's only a single channel is supported.
Added a Kconfig that enables a shared irq for stm32f2x, stm32f4x,
stm32f7x soc's. The shared IRQ uses a flag to limit the number of
interrupts defined to only 1. A shared irq handler is added which
determines which ADC instance the interrupt is for, it then calls
into the existing interrupt.
Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
The gd32_exti_isr function may be unused if the GPIO driver is not
enabled but EXTI is (no IRQ will connect to it). This may be improved in
the future by requiring explicit enablement of the exti DT node.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The default I2C channel 3 is used by alternate function of GPIO H1/H2
Krabby uses GPIO F2/F3 as I2C channel 3, so we need to add the
compatibility of the GPIO F2/F3.
TEST=test on it8xxx2_evb:
zmake configure -b zephyr/projects/it8xxx2_evb/
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Adding these definitions help ease of porting POSIX applications.
They currently do nothing in the core network stack and will
return an error if used. However, they help port some POSIX
without changing these. In particular, this enables using the
Nim programming language's standard library with Zephyr.
- The values copy Linux amd64, similar to the other SO_OPTIONS
- Add SO_SNDBUF to fix simplelink wifi
- Use compat options in simplelink wifi
Signed-off-by: Jaremy J. Creechley <jaremy.creechley@panthalassa.com>
An additional devicetree poperty `single-wire` is added
to uart and usart bindings of stm32. The driver checks this value
during initialization and enables the single wire mode when set.
Signed-off-by: Jonathan Hahn <Jonathan.Hahn@t-online.de>
Use pm_state_cpu_get_all to obtain CPU states instead of using extra ROM
duplicating existing information already holded by the PM subsystem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The Event FIFO start address (EFSA) field within the Tx event FIFO
configuration register (TXEFC) occupies bit 15:2.
Change the CAN_MCAN_TXEFC_EFSA_POS definition to reflect this.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Rename a few CAN API functions for clarity and consistency with other
Zephyr RTOS APIs.
CAN_DEFINE_MSGQ() becomes CAN_MSGQ_DEFINE() to match K_MSGQ_DEFINE().
can_attach_isr() becomes can_add_rx_filter() since a filter callback
function is not an interrupt service routine (although it is called in
isr context). The word "attach" is replaced with "add" since filters are
added, not attached. This matches the terminology used is other Zephyr
APIs better.
can_detach() becomes can_remove_rx_filter() to pair with
can_add_rx_filter().
can_attach_msgq() becomes can_add_rx_filter_msgq() and documentation is
updated to mention its relationship with can_add_rx_filter().
can_register_state_change_isr() becomes can_set_state_change_callback()
since a state change callback function is not an interrupt service
routine (although it is called in isr context). The word "register" is
replaced with "set" since only one state change callback can be in
place.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This patch controls the SPI of the stm32H7 mcu when using
the DMA transfer. Starting and ending the transfer
are specific according to the RefMan.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
A generic function is used to give the register address to the DMA.
The SPI of the stm32H7 serie has two data registers for Tx and Rx
When the DMA is getting the address it differs between Rx and Tx.
As the stm32cube/stm32h7xx/drivers/include/stm32h7xx_ll_spi.h
has no such LL functions, the register address is get direclty.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The spi_stm32_complete() is checking spi flags which are valid when the
intance is still enable: disable afterwards. No more need to disable
the DMA transfer then
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Defines a function to control the spi busy state during DMA transfer.
After the DMA Tx, the spi might still have some data to Transmit.
The driver must wait for the SPI Tx before sending the next packet.
This is not required for the Rx part as the DMA Rx is already done.
Some mcus like stm32H7 have a TX complete bit, other must wait for the
TXE and BSY line.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Initial version of a PWM driver for GigaDevice GD32 SoCs. Only PWM
output is supported for now (no capture support).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
NPCX7/9 has a different ADC register structure. NPCX7 has 3 threshold
detectors from offset 0x14 & has 10 input channels. NPCX9 has 6
threshold detectors from offset 0x60 & has 12 input channels.
This commit fixes the NPCX ADC register structure.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Theoretically, source id check is not mandatory in the context we use
VT-D here (i.e. non VM one, just multi-vector MSI support)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Not sure this is requered as we do not mangle with domains, but let's
make sure this cache is clear.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
A surprising issue: while sys_set_bit() on VTD_GCMD_REG work on
apollo_lake, it seems to create border effect on elkhart_lake: it may
reset some previous bit to 0.
So switching to full write of the register at once, which works for
both.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
VT-D will only be enabled if MSI multi-vector will also be requested,
on x86_64, for all boards BUT QEMU ones.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no point to enable VT-D if PCIE MSI multi-vector support is not
requested, as VT-D is uniquely being used to remap MSI multi-vector
based interrupts.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Those MMIO registers might be mapped in RAM and thus it's
really important to keep storage space for such mapping.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
QI operation are not supposed to last forever.
It's not an actual timeout based on clock, but a dummy counter instead.
That's because system clock might not have beed initialized yet, since
VT-D's init comes first (and that same init will use QI...)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Depending on a VT-D capability, it might be necessary to flush objects
from the cache.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Looks like it's mandatory to invalidate the Interrupt Entry Cache in
VT-D and the only way to do so is to enable Queued Interface.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
IR faults are non-recoverable, so it's good to know why. Thus let's
handle the fault event and print the fault.
Other faults are printed as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Looks like a source of fault if pieces of IRTE are written instead of
the whole 64 bits block it belongs to.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
If VT-D's interrupt remapping is in place, all IOAPIC RTEs need to get
remapped as well (or then they will be simply blocked).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding a way to pre-install the irg/vector on an irte and a way to get
an irte based on irq/vector.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will not only be used by MSI remapping but by all relevant
interrupts.
Fix also IRTE settings:
- handle x2apic for destination id
- destination mode is always logical (as for IOAPIC)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In XAPIC mode, it's possible to tell VT-D to let interrupt in compatible
format passing through.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SHV bit depends on the number of vectors allocated.
If it's facing a multi-vector MSI array, it will set the bit.
If not the bit must be 0.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Refactor to handle this case. This is valid only when MSI multi-vector
feature is enabled.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The is meant to fix a chicken & egg issue with MSI interrupt remapping.
Currently, drivers first connect the irq (by-passing any possible MSI
remapping), so the IRQ ends-up being remapped at the IOAPIC level which
is not what we want.
So adding a dedicated function to properly handle this case. This is
valid only for runtime dynamic IRQ connection obviously.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
And since it does yet another round of pcie_get_cap() on PCIE_MSI_CAP_ID
and PCIE_MSIX_CAP_ID, let's factorize that into a utility function and
change the relevant places to use that function instead.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The host reassembles fragmented advertising reports from the controller.
Non-complete advertising reports from different advertisers may not be
interleaved. If non-complete advertising reports from an advertiser
is received while advertising reports from another advertiser is
reassembled, an error message is logged and the advertising report is
discarded. Future scan results may be incomplete.
Advertising reports from legacy PDUs or complete extended advertising
reports may be interleaved as these do not require reassembly.
If the controller sends more advertising data than fits in the
reassembly buffer, the data is truncated. Further advertising reports
from the advertiser are discarded until the final complete advertising
report is received and discarded.
Signed-off-by: Herman Berget <herman.berget@nordicsemi.no>
Enable the emulated GPIO driver by default if instances exist in
devicetree. This removes the need to manually enable `CONFIG_GPIO_EMUL`
when `CONFIG_GPIO` is enabled.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
General refactoring to clean up and futureproof this driver.
Remove false dependency on CONFIG_CAVS_ICTL. This requires the CAVS
interrupt mask API, but doesn't touch the interrupt controller driver.
Remove a racy check for simultaneous interrupts. This seems to have
been well intentioned, but it's needless: the spinlock around the
last_count computation guarantees that colliding interrupts will
correctly compute elapsed ticks (i.e. the last will compute and
announce zero ticks, which is correct and expected). And this opened
a tiny window where you could incorrectly ignore a just-set timeout.
Factor out the specific registers used (there are only five) into
pointer-valued macros instead of banging them directly.
Unify interrupt initialization for main and auxiliary cores.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Instead of using maskstatus to see if an interrupt has fired,
use finalstatus instead. It has been observed that some
controllers do not update maskstatus correctly with incoming
interrupts, but finalstatus works fine.
FYI, the DW driver in Linux is also using finalstatus.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Recent changes in this function made the code now compatible
with the use of LL API to perform this configuration.
Use it to simplify the driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix hard fault due to NULL being passed as argument into
rssi_handler, which now derives the gsm_modem struct pointer from
the argument.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Disabling clock may conflict with concurrent usage of GPIOs and pins in
AF mode. This can be improved once a proper clock control API is in
place.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add GPIO driver for Gigadevice SoCs. The driver supports devices with
the AF and AFIO models.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add initial support for the GigaDevice External Interrupt Controller.
This driver is required to manage GPIO interrupts. Only EXTI lines 0 to
15 are supported for now (no LVD, RTC, etc.). Driver can be extended in
the future to add support for extra EXTI lines.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This change provides support for 4 IO read (via 4READ command) and
program (via 4PP). Flash memory pins SIO[0123], CLK and CS are used.
All of them are controlled by stm32 QSPI IP block.
The instruction code for fast reading as well as number of latency
cycles required are read from SFDP structure provided by flash memory.
The number of required read latency cycles when performing reading
is the sum of SPI-NOR memory mode bits and wait states (also named
as 'dummy cycles').
It also has been assumed that memory, which supports fast read (4READ),
also will support fast programming (4PP command) as this information is
not available in SFDP.
One also need to enable the QUAD IO support in board's device tree by
defining 'spi-bus-width = <4>' property. It is required as it may
happen that not all QSPI dedicated pins are used (for example only two
of them are available).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
For proper operation of QUADSPI IP block, both sides of communication;
NOR flash memory and STM32 controller need to support 4 IO
transmission.
After this change the QSPI stm32 driver is able to program NOR flash
memory to switch itself to use all 4 IO lines (SIO[0123]) to transmit
and receive data.
The QE bit (in SPI-NOR's Status Register) is the non-volatile one, so
setting it is done only once (at first boot of the device).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit provides define for reading the control register (CR) on
the flash memory.
In that register the information about 4B addressing is stored.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Some flash memories connected to QUADSPI IP block on stm32[fh]7 devices
require proper reset pulse before configuration.
This patch adds two new properties - the 'reset-gpios' phandle,
which allows specifying GPIO pin for RESETn pulse and
'reset-gpios-duration', which provides the time (in ms) for reset
duration.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The 'flash-id' property defines the number of QSPI's dedicated GPIO
bank (and flash ID), which will be used to communicate with flash
memory.
For example, on stm32h7xx it is possible to use 'quadspi_bk1_*' and
'quadspi_bk2_*' set of pins, so one may need to select between them
when required.
By default - pins from 'quadspi_bk1_*' bank are used, so the
'flash-id = <2>;' property, when your use case (e.g. PCB design)
requires it, forces usage of 'quadspi_bk2_*' pins.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The stm32 HAL code for qspi (SHA1: 5c8275071ec1cf160bfe8c18bbd93):
stm32cube/stm32h7xx/drivers/src/stm32h7xx_hal_qspi.c implicitly
depends on the stm32h7xx_hal_mdma.c driver as it uses unconditionally
'HAL_MDMA_Abort_IT()' function.
To avoid build breaks - no matter if QSPI IP block works with DMA
or interrupts - the CONFIG_USE_STM32_HAL_MDMA shall be defined.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
In npcx_itim_evt_isr, it updates the cyc_sys_announced variable and
then calls sys_clock_announce() to update the kernel curr_tick variable.
If an ISR handler with higher priority preempts the timer ISR after the
sys_clock_announce is updated and before the sys_clock_announce() is
called, it will read the wrong time when calling k_uptime_get() because
the cyc_sys_announced and the curr_tick are not synchronized.
The commit fixes the problem by raising the timer's interrupt priority
to the highest one (i.e. 1 in npcx's configuration).
This commit also moves the computation of the delta cycle inside the
spinlock in sys_clock_elapsed() to prevent another potential racing
condition.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Convert the CAN loopback driver from being configured via Kconfig to
multi-instance configured via devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
gsm_ppp_stop should cancel possible running work items.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
The 'work' argument of a delayable work's handler should be
converted to delayable work before passing into the CONTAINER_OF
macro.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
This commit introduces the following changes:
* nrf_rtc_timer is extended with a capability to handle RTC overflow,
allowing it to operate on absolute RTC ticks, rather than relative
ticks.
* overflow handling is ZLI-proof and relies on the sys clock
handler being executed twice every RTC counter's overflow.
* callbacks are given an absolute RTC tick value as a parameter instead
of CC register's value. The absolute RTC tick value is the RTC counter
value set during CC channel configuration extended to 64 bits.
* in case the timer's target time is in the past or is the current tick,
the timer fires as soon as possible, however still from the RTC's ISR
context.
* in case an active timer is set again with the same target time, it is
not scheduled again - only its event data is updated. Otherwise, the
timer is scheduled as usual.
* a scheduled timer can be aborted.
* system clock functions are now using 64 bit values internally.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Paweł Kwiek <pawel.kwiek@nordicsemi.no>
ESP32 uart_poll_in should return 0 on success and not
the total amount of data read.
This also adds a check in fifo_fill call to
avoid negative values, otherwise it would send garbage
to uart
Closes#41352
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Don't re-enable the DIO1 interrupt when the modem is in sleep mode. This
fixes the power regression introduced in Zephyr v2.7.0 #41026.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The msg_sram resides in the sram region, where the
m_can controller direcly access it. Whenever the driver
writes to the msg_sram and operations are triggered, the
cache needs to be invalidated.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
RM 0453: the sw is allowed to write the Oversampling
ratio or shift of the ADC Config.Reg.2 only when ADSTART = 0
(no conversion is on-going). So disabling it will be stopped.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
RM 0453: the sw is allowed to write the Data Resolution bits
of the ADC Config.Reg.1 only when ADEN = 0 (ADC disable).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add a dummy driver for the `vnd,gpio` compatible to allow compilation of
drivers utilising GPIO when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit adds the API of page_layout that will make test of
test/drivers/flash pass on it8xxx2_evb board.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change the can_tx_callback_t function signature to use an "int" (not an
uint32_t) for representing transmission errors.
The "error" callback function parameter is functionally equivalent to
the return value from can_send() and thus needs to use the same data
type and needs to be able to hold negative errno values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The driver performs AT commands configurations using the
system workqueue, this can delay the workqueue by up to 6
seconds to wait for the modem replies, which isn't ideal.
This PR creates a dedicated workqueue for the gsm, and
provides a helper function to reschedule work items to the
gsm workqueue.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
STOP command was issued in the same transmission message
and as from esp-idf, this should be moved into a new
transmission.
Although it works in most scenarios, SHT3X sensor is one
case that presents reading error.
Closes#41385
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
PR #38482 made the sam0 i2c send NACK when receiving a single message
Fixes#38878Fixes#41016
Signed-off-by: Christoffer Zakrisson <rustypig91@gmail.com>
SYS_INIT can be used for the same purpose, what is being run is simply
an initialization hook.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If there are no console messages input at an interval of 15
seconds, the system will be able to enter suspend mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add length checks before calls to net_buf_add_mem
for dynamically sized data.
This should give a better error response than hitting
the __ASSERT in net_buf_simple_add.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
some build error due to adding rt11xx support without testing
update mclk enable to avoid add pinmux driver
note:
some other PRs still in progress to full enable i2s on rt platform
this fixing: #41153
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Specify in the API that the callback must be registered before the
channel is enabled, fix the NRFX IPC driver to be compliant and change
the MBOX sample.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Fix a problem introduced in 6ea54db334 that caused the poll operation to
take 10x more time than intended.
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
MCHP ADC configuration register need to be updated with appropriate
clock time values for high & low time clock.
Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
Deprecate the can_attach_workq() API call.
This API is limited in its functionality (it does not work with
userspace, it uses one common buffer size for all work queue instances).
Similar functionality can easily be implemented using the
can_attach_msgq() API along with the generic triggered work API
(e.g. using k_work_poll_submit()).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert the CAN shell from using can_attach_workq() to using
can_attach_msgq() and triggered work via k_work_poll_submit().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Driver was not behaving according to API description and
was not returning -EBUSY when uart_rx_enable() was called
on already enabled receiver.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This is a follow-up to commit 4dfab40cac.
The calculation of the pixel period is done incorrectly and results
in higher than configured refresh frequency if pixels are refreshed
in groups. Fix that and lower the base frequency for the timer and
PWM so that wider range of refresh frequency can be used also with
the pixel grouping.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Sending AT+CWLAP was introduced with commit f2859f9501 ("drivers:
wifi: esp_at: changes to scanning") as a way to easily test introduced
changes, rather than on purpose. Remove that now, as there is no
particular reason to send it and additionally it breaks setup phase:
<err> modem_cmd_handler: command AT+CWLAP ret:-5
<err> wifi_esp_at: Init failed -5
with ESP-AT firmware v2.1.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
PCIE now uses the new interface. And pcie_alloc_irq() is only made
available when CONFIG_PCIE_CONTROLLER is unset. So only for x86 atm.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
i2c_burst_write can have portability issues with certain i2c
peripherals that can fail when this api is called. This fixes the case
where this can be easily replaced with i2c_write in mcp230xx,
pca95xx, stmpe1600, max17055, and tmp112.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
So far driver was using SENSE mechanism for all or none edge
interrupts. This was not convenient since in some modules may
require IN event to be used and other did not. Converting it to
use a mask specified in the device tree. Pins indicated in the
mask will use sensing.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add a new DT property named "pixel-group-size" that allows users to
configure the driver to refresh the matrix by illuminating multiple
LEDs in particular rows simultaneously. This way the maximum possible
brightness of the LEDs can be increased (as they can be lit longer)
and the timer interrupt handler is executed less frequently, what
results in decreased CPU load, but more GPIOTE/PPI channels needs to
be allocated if the PWM peripheral cannot be used. Thus, it is left
to users to select the configuration that suits them best.
Update definitions of both the bbc_microbit boards with this new
property, using the maximum available group size (to achieve maximum
possible brightness). For v2, no new resources are used (only all
channels in the already used PWM peripheral are now utilized).
For v1, two more GPIOTE and PPI channels are allocated.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix pin disconnection when COFNIG_PINCTRL=n, so that less power is used
in suspended state. This seems to be a copy-paste kind of bug, since
when both resuming and suspending the same configuration was applied.
Fixes: 5567d7ae07 ("drivers: serial: nrfx_uart: add support for
pinctrl")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Some STM32 series need to configure health test register
for proper RNG behavior.
In addition, some also require to write a Magic number
before writing the configuration.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Rework bbc:microbit display support to use nRF LED matrix
display controller driver and allow to use it with
bbc:microbit v2 board.
This patch turns the driver into a higher level driver
using the display controller API. Code that directly
accesses hardware (GPIO) is removed.
This driver is reworked to be more generic. It still
has a lot of potential for improvement, but it requires
changes in all applications that use this tool.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
- Supporting multiple instances of ivShMem virtual devices.
- Introduces DT based configuration for ivShMem devices.
- Add DTS overlay file to test new multiple ivshmem instance capability.
- Enable BDF unspecified device initialization.
(limited to one instance. An improved version of pcie_bdf_lookup()
will come soon that fixes this limitation)
- Make PCIE DTS file macros available for a proper ivshmem device
properties parsing.
Sample for dts file:
pcie0 {
label = "PCIE_0";
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
ranges;
ivshmem0: ivshmem@800 {
compatible = "qemu,ivshmem";
reg = <PCIE_BDF_NONE PCIE_ID(0x1af4,0x1110)>;
label = "IVSHMEM";
status = "okay";
};
};
Signed-off-by: Michael Schmidt <michael1.schmidt@intel.com>
The commit changes the default size of write_from_nvmc,
defined by CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE, to 4,
making the write_from_nvmc operation enabled by default.
The Kconfig description for the option has been changes more clearly
describe how does the option impact compilation.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Modifying configuration to enable with gd32vf103
- Add usart definition to devicetree.
- Define USART_STAT as alias of USART_STAT0 if not defined it.
- Enable USART if SOC_SERIES_RISCV_GIGADEVICE_GD32VF103.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Change the settings to support pinctrl on the GD32VF103.
- Split soc/arm/gigadevice/common/pinctrl_soc.h
and put it into include/dt-bindings.
- Leave some definitions that can't handle with device tree compiler
in pinctrl_soc.h.
- Remove dependency to SOC_FAMILY_GD32 because always enabled it
if GD32_HAS_AF(IO)_PINMAX was selected.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
GD32V SoC uses divided clock from core-clock for machine timer clock.
Add config of clock divide factor to support GD32V.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Implemented driver for the simcom sim7080 modem.
This driver features Socket offloading, TCP, UDP, DNS,
SMS, GPS and FTP.
Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
In this commit, the driver sets the PM constraint to prevent the system
from entering the suspend state for a CONFIG_UART_CONSOLE_INPUT_EXPIRED
period when data come in. The constraint releases after the
CONFIG_UART_CONSOLE_INPUT_EXPIRED time expires, .
With this change, the PM policy doesn't have to check the timestamp
by calling npcx_power_console_is_in_use() explictly. So the related
npcx_power_console_is_in_use*() functions can be removed.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
The function that sets the driver's state of the sensor's
config register has a bug. This commit fixes that.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Instead of checking the SPI register flags, the spi_ll_stm32.h
has dedicated functions for that purpose.
They are abstracting the STM32 registers of SPI instance.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit introduces the following changes:
* nrf_rtc_timer is extended with a capability to handle RTC overflow,
allowing it to operate on absolute RTC ticks, rather than relative
ticks.
* overflow handling is ZLI-proof and relies on the sys clock
handler being executed twice every RTC counter's overflow.
* callbacks are given an absolute RTC tick value as a parameter instead
of CC register's value. The absolute RTC tick value is the RTC counter
value set during CC channel configuration extended to 64 bits.
* in case the timer's target time is in the past or is the current tick,
the timer fires as soon as possible, however still from the RTC's ISR
context.
* in case an active timer is set again with the same target time, it is
not scheduled again - only its event data is updated. Otherwise, the
timer is scheduled as usual.
* a scheduled timer can be aborted.
* system clock functions are now using 64 bit values internally.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Paweł Kwiek <pawel.kwiek@nordicsemi.no>
So far the lengths provided in event and ACL packets were not being
checked at all, which could have caused an overflow if the contents were
not to fit inside the net_buf.
Check the length and discard the packet when it doesn't fit.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Move odr and range properties for both accelerometer and gyro
from Kconfigs to Device Tree.
Fixes#41117
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This sample writes the tmp108 temperature to the console
once every 3 seconds. There are macro definitions included
for turning off and on alerts if that is set up, and
also using low power one shot mode.
Signed-off-by: Jimmy Johnson <catch22@fastmail.net>
Adding support for the TI TMP108 temperature sensor. This includes
over/under temp interrupt support as well as one shot, continuous
conversion and power down modes.
Signed-off-by: Jimmy Johnson <catch22@fastmail.net>
The init struct for DMA peripheral is allocated in stack
and must be initialized (e.g. with LL_DMA_StructInit here)
to avoid loading undefined values in the DMA peripheral
registers.
Signed-off-by: Abel Radenac <a.radenac@lacroix-sofrel.com>
DT_INST_HAS_PROP macro is not available, DT_INST_NODE_HAS_PROP needs to
be used instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a display driver and the corresponding devicetree binding for a LED
matrix with rows and columns driven by nRF SoCs GPIOs. Such matrix can
be found, for example, in the BBC micro:bit boards.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Some tests like:
tests/kernel/sched/metairq/kernel.scheduler.metairq
tests/kernel/profiling/profiling_api/kernel.common.profiling
tests/kernel/sched/schedule_api/kernel.scheduler
tests/kernel/sched/schedule_api/kernel.scheduler.multiq
tests/kernel/profiling/profiling_api/kernel.common.profiling
tests/kernel/workq/work_queue/kernel.workqueue
don't support that the current thread change when writing a message with
printk (which uses poll_out). So, we remove the call to k_yield which is
useful only for optimizing cpu usage by forcing a thread change if the
usart send stack is full.
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Replace usages of DT_PARENT(DT_DRV_INST(idx)) with more idiomatic
DT_INST_PARENT(idx).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Call `gpio_stm32_clock_request` unconditionally with "true" if no
runtime PM is enabled, "false" otherwise. In case the GPIO was enabled
(e.g. by a bootloader), the device will be left in proper state when
runtime PM is enabled.
Also added pm_device_runtime_init_suspended to indicate that device is
in a suspended state (will prevent pm_device_runtime_enable to suspend
the device again).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The function is only used by the driver itself. This likely comes from
pre-runtime PM API usage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make gpio32_stm32_configure use runtime PM API (so that it can be used
externally without further effort). The raw version of the function (no
PM put/get) has been introduced for internal use.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The suspend operation for this device is a clock gating operation (i.e.
fast), so use synchronous put to skip unnecessary overhead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PM runtime API (get/put) provides an inline implementation when not
built-in. Such implementation always returns 1, so it is safe to not
guard PM runtime calls and check for < 0.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PM runtime API (get/put) provides an inline implementation when not
built-in. Such implementation always returns 1, so it is safe to not
guard PM runtime calls and check for < 0.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The original parameter (k1) setting may let the I2C frequency be a
little bit higher than 100k Hz, which causes the timing Tsu:sta (set-up
time for a repeated START) to violate the spec. This change fixes the k1
parameter and also changes the HLDT to the suggested value in the
datasheet.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The STM32 docs state that the ADC may not be calibrated unless
the ADC is disabled (ADEN=0). This commit implements this constraint
Fixes#40936
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Change the function pm_device_runtime_enable() to return 0 on
success or an error code in case of error.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Create an explicit ina230 driver which is supposed to
work with 230 and 231 variants. While at it switch
to i2c_dt_spec helpers and change device-tree node
names to use - instead of _ in order to follow
convention.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
- B91 SoC requires to set RX mode again if channel is changed
- Fixed wrong ACK packet detection, mask should be used
Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
Add checks for the upper boundary in access_read/access_write
instead of the homeopathic ASSERTS.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit aligns lps22hh sensor driver to latest multi
instance sensor driver model.
In particular it makes use of the stmemsc common routines
and move ctx handler inside struct config, so that the
bus_init routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This flag may cause host to more ambitious power saving behavior,
not all Zephyr USB classes or applications may be ready for this
now. Allow to disable option USB_DEVICE_REMOTE_WAKEUP.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
PRE_KERNEL_1 is to be used for devices that have no dependencies
and do not use kernel features, such as those that rely solely on
hardware present in the processor/SOC. This commit updates these
gpios to initialize during the PRE_KERNEL_1 rather than the
POST_KERNEL. Some SoC drivers are moved to PRE_KERNEL_2 due
to dependencies.
A lot of 'other' drivers can depend on GPIOs though phandles
(such as reset lines, data or command gpios, etc...). Most of these
drivers that would need this would come up on the POST_KERNEL,
and it's likely the driver may not be up yet as it should be defined.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
USDHC driver did not pass disk test (failed during multiple writes). Add
logic to wait for the SD card to be idle before reading new data, so
that the test will pass. Also, add logic to reject OOB reads and writes
to the disk.
Fixes#39942
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
GD32 HAL use two USART status register name, USART_STAT and USART_STAT0.
This add a redefine to make USART_STAT as defaut name.
Signed-off-by: HaiLong Yang <cameledyang@pm.me>
Added a driver to enable the GPT timer on RT1xxx parts to be used
instead of systick as a clock source. The timer is set to run in reset
mode, and uses the low frequency 32kHz oscillator for power savings
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for the 8 channels TCA9548A I2C mux.
Added a new binding ti,tca9548a binding inheriting
properties from ti,tca954x-base and defining its own compatibles fields.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add an optional "reset-gpios" phandle-array
field to the driver common yaml.
The reset GPIO channel and pin can be defined
in device tree as a node property.
The driver then deassert the reset signal at mux
initialization if a "reset-gpios" has been specified.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Prepare the driver to upcoming support of more mux references.
Rename all TCA9546A related files to TCA954x.
Keep ti,tca9546a and ti,tca9546a-channel compatible
for backward compatibility reasons.
New tca954x-base binding embedding common properties,
tca9546a binding inherits from it and define its own compatibles fields.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Make use of the i2c and spi DT APIs introduced in
2946a535 and c894ad12 that get i2c_dt_spec and spi_dt_spec
as input arguments.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The warning below appears once -Waddress-of-packed-mem is enabled:
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c: In function
bmi160_gyr_channel_get:
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c:795:23: error: taking
address of packed member of struct <anonymous> may result in an
unaligned pointer value [-Werror=address-of-packed-member]
795 | data->sample.gyr, val);
| ~~~~~~~~~~~~^~~~
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c: In function
bmi160_acc_channel_get:
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c:807:23: error: taking
address of packed member of struct <anonymous> may result in an
unaligned pointer value [-Werror=address-of-packed-member]
807 | data->sample.acc, val);
| ~~~~~~~~~~~~^~~~
To avoid the warning, make the struct non-packed, since it is not
necessary in this case given that a union already guarantees that the
pointer to the union points to each member of the union equally..
More info in #16587.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The warning below appears once -Waddress-of-packed-mem is enabled:
/__w/zephyr/zephyr/drivers/gpio/gpio_sx1509b.c: In function
'port_write':
/__w/zephyr/zephyr/drivers/gpio/gpio_sx1509b.c:456:19: error: taking
address of packed member of 'struct sx1509b_pin_state' may result in an
unaligned pointer value [-Werror=address-of-packed-member]
456 | uint16_t *outp = &drv_data->pin_state.data;
To avoid the warning, use an intermediate void * variable.
More info in #16587.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add bindings for SDL based display controller.
Rework SDL based display controller driver to obtain
configuration from devicetree. Remove unnecessary casts,
add multi-instance support.
Add display controller node and chosen property
to native_posix devicetree.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
ssd16xx driver is not well designed and does not pass configuration
via device->config but via struct ssd16xx_data, this was not taken
into account in the commit 4d6d50e2bc
("display: ssd16xx: convert to spi_dt_spec").
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
this allows using a pin numbering scheme as per Espressif's
documentation and HAL usage, where pin counting does not wrap
up when reaching a given number.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Voltage scaling computation should be done in multiple cases.
Add a function that takes into account all cases.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Deprecate the use of CAN-specific error return values and replace them
with standard errno values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The init responsibility moves to the drivers themselves. The npcx itim
initialize doesn't work now. This adds timer initialization for npcx
itim to fix it.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
The original code erroneously used:
uint16_t *val;
sizeof val
instead of:
sizeof *val;
This commit fixes this problem and removes an unnecessary
buffer from the stack
Signed-off-by: Pete Dietl <petedietl@gmail.com>
SDK 2.10 changed the PHY API. These updates are
needed as part of moving to SDK 2.10
1. add phy / mdio ops init
2. update PHY_Read/Write HAL call
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Set pinmux driver to use RTCIO interface for to handle
dedicated IOs pull-up/down configuration.
Without this, some GPIOS won't have pull-up enabled
properly.
Also, current implementation automatically disables
output pin when input pin is set. It also performs the
oppositte. This PR changes it only to enable what is
requested, either input or output.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
irq_line and irq_enabled call is not necessary as the interrupt
allocater enables it during its initialization.
it also adds end packet to all write transmission instead
of only at the end (burst data scenario)
Add check in gpio configuration check to avoid wrong gpio pins
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Driver has dedicated workqueue for IRQ processing.
Submit work to dedicated workqueue intead of system workqueue.
It also fixes driver functionality when NET_TC_TX_COUNT is set to 0.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
STM32H7 has different power supply modes but now Zephyr supports just LDO
and direct SMPS. This commit introduses POWER_SUPPLY_CHOICE configuration
parameter and add support for missed power supply modes.
Signed-off-by: Gennady Kovalev <gik@bigur.com>
Fixes#40730.
A dead lock could happen if 2 threads with differents priorities use
poll_out. In fact, the lock data->tx_lock could be lock by a thread with
lower priority and then a thread with higher priority can't take the
lock. There was a race condition here:
/* Wait for TXE flag to be raised */
while (1) {
if (atomic_cas(&data->tx_lock, 0, 1)) {
/* !!!!!!!! RACE CONDITION !!!!!!!!!!!!!!
if (LL_USART_IsActiveFlag_TXE(UartInstance)) {
break;
}
atomic_set(&data->tx_lock, 0);
}
}
To fix race condition, the interrupts are locked in poll_out.
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Refactor the mcp230xx driver to generically also support
SPI IO expanders, renaming it to mcp23xxx in the process.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Add driver for MEC172x QMSPI with local DMA(LDMA). The driver
support SPI asynchronous operation.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
DMA controller is enabled and tested for cortex M7 core. The M7 core was
tested on the loop and channel link transfer tests.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds support for editing the voltage levels on the buck
regulators on the PCA9420 PMIC
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds a generic i2c regulator driver, and enables the NXP
PCA9420 PMIC IC using this driver. The regulator driver also exposes an
additional API in include/drivers/regulator/consumer.h, which allows
drivers to implement support for adjusting voltage levels and current
limits, if their device supports it.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
the RT685 contains an additional flexcomm peripheral, that supports
only I2C. This commit adds this peripheral to the device tree,
and enables pins and clocks for flexcomm15.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Catch up on the CAN driver API argument naming changes:
- Unify naming of callback function pointers as "callback".
- Unify naming of user-specified callback function arguments as
"user_data".
- Instances and pointers to struct zcan_frame are named "frame",
not "msg", to avoid confusion with the CAN message queue support.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds Xen consoleio serial driver. It is needed to receive
kernel messages from Zephyr in case it runs as Xen privileged domain
(Dom0). There is no console ring buffer for such domain, so regular
uart_hvc_xen driver can not be used (privileged domain input/output
are possible only through consoleio interface).
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds support of interrupt-driven API for UART-like Xen PV
console driver. It is implemented via Xen event channels. It allows to
send and receive data by chunks (not single symbols) and without
polling.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds support of Xen Enlighten page and initial support for
Xen event channels. It is needed for future Xen PV drivers
implementation.
Now enlighten page is mapped to the prepared memory area on
PRE_KERNEL_1 stage. In case of success event channel logic gets
inited and can be used ASAP after Zephyr start. Current implementation
allows to use only pre-defined event channels (PV console/XenBus) and
works only in single CPU mode (without VCPUOP_register_vcpu_info).
Event channel allocation will be implemented in future versions.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
In #40140, all on-chip gpios where made to use `CONFIG_GPIO_INIT_PRIORITY`.
The lmp90xxx and sx1509b are off-chip gpios. This commit reverts those
changes for these two devices.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
Adds a driver using the SNVS high power and optionally low power
RTC instances. A device specific function `mcux_snvs_rtc_set` is
provided to update the current counter value.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Update the SPI context during all transceive functions. This fixes a
deadlock where SPI transactions failed to give back the semaphore.
Verified on NPCX9 based Chromebook.
Signed-off-by: Keith Short <keithshort@google.com>
The internal functions of this driver needed either `device *`
or `st7789v_data *` as argument. Standardize to
using `device *`.
Signed-off-by: Casper Meijn <casper@meijn.net>
RT11xx USDHC lacks some watermarking features that RT10xx SOCs include.
Place #ifdef guards around these features.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This adds an spi master mode driver via bitbanged gpio. Only syncronous
transfers are implemented. Clock signal timing is accomplished via busy
waits, the gpios are manipulated via the standard gpio interface; these
two factors limit the frequency at which it can operate - but here
a simple and generic implementation was chosen over performance.
The driver supports the various clock polarity and phase
configurations, and can also work with word sizes which are non
multiples of 8bits, currently up to 16 bits.
A sample program is also added demonstrating basic use of the driver
with 9bit data words.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Rename the PM_STATE_DT_ITEMS_LIST macro to PM_STATE_LIST_FROM_DT_CPU to
make its purpose more clear. Similar naming scheme is found e.g. in the
GPIO API.
Associated internal macros and docstrings have been adjusted, too.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A couple of drivers violated MISRA 5.7 rule (Tag name should be unique),
triggering CI compliance errors.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A Cortex-M specific function (sys_clock_isr()) was defined as a weak
function, so in practice it was always available when system clock was
enabled, even if no Cortex-M systick was available. This patch
introduces an auxiliary Kconfig option that, when selected, the ISR
function gets installed. External SysTick drivers can also make use of
this function, thus achieving the same functionality offered today but
in a cleaner way.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Remove the weak symbol definition
- Notify about the capability of disabling via a selected Kconfig option
(CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT)
- Provide a dummy inline function when the functionality is not
available
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Split Kconfig into individual files for each driver. This improves
overall readability of the Kconfig options.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The weak symbol sys_clock_driver_init has been removed, therefore moving
the init responsability to the drivers themselves. As a result, the init
function has now been made static on all drivers and moved to the
bottom, following the convention used in other areas.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adds the ability for I2C drivers to report synchronous transfer stats
using a I2C specific macro to define the device instance.
The macro creates a container for device_state which allows for per
instance device class common data structure to be used in the device
class api (ex: i2c.h). This is used to maintain per driver instance
stats for all i2c drivers. This is a reusable idea across other device
classes as desired.
Using Kconfig device class stats may be turned on/off individually
this way as well, in this case I2C_STATS.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
MCUX PWM driver used hardcoded clock source. update driver to use clock
bindings to determine PWM peripheral clock frequency.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adds optional device tree properties to insert delays between spi chip
select assert/deassert and the clock edges, and also between spi
frames and transfers to the mcux flexcomm spi driver. If the properties
are not set, no additional delay is inserted.
Verified expected behavior on mimxrt685_evk and check with a scope
that the pre- and post-delay could be changed from the device tree
properties.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
The UART1 is not actually accessible on the HiFive1 since the
QFN48 package for the FE310, used by this board, does not expose the
required pads. However, it is still possible to use the UART1 on HiFive1
emulators (e.g. using UART0 for debugging and UART1 for SLIP).
Unfortunately, the UART0 and UART1 currently have different default
configurations when it comes to the configured transmission watermark
(txcnt). With a txcnt of zero (the default for UART1) the UART is not
actually usable (see #18118). Contrary to UART0 (see #23699), the UART1
does therefore not work by default on Zephyr which took me some time to
figure out.
This commit aligns the default UART1 configuration with the UART0,
thereby making it work by default.
Signed-off-by: Sören Tempel <tempel@uni-bremen.de>
Instead of busy wait until completed transaction, the constraint set
is used before enabling tx interrupt to not allow system to enter
suspend when tx is transmitting.
Application defined policy should use the pm_constraint_get function
to check if given state is enabled and could be used.
TEST=Test on hayato board(soc:it8xxx2), the logs print normally before
system enters suspend.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
After the commit "dts: ksz8974: change port number to start at zero."
(SHA1: aa6217697e)
the lan ports are numbered starting from zero (not as previously from
one), so code assigning tags shall take this into account.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After the "dts: ksz8974: add support for ksz8863"
(SHA1: b0e4886dfa) commit the port numbering
for KSZ8794 was wrong.
This IC has 3 ETH ports (with linear offset), with port 4 being the
"master" with non linear offset (i.e. 0x50 instead of linear 0x40).
Such situation can be explained with similarity of this IC to ksz8795,
which has 4 LAN ports, and then the 0x40 offset is used.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The name of macro to enable tail tagging support in DSA KSZ driver is
CONFIG_DSA_KSZ_TAIL_TAGGING, not DSA_KSZ_TAIL_TAGGING.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The check for CPU port on the KSZ8794 when the switch is initialized,
is not required as the last port number is always smaller than the CPU
port.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The device PM callback needs to be used only to suspend/resume devices.
If the system cannot be suspended because UART is in a particular
state, the pm_constraint_set/release API should be used. For NPCX UART,
the chip can't enter low power idle state until UART completes the data
transmission.
This commit changes NPCX UART to use pm_constraint_set/release & fixes
UART lost data from low power idle.
Fix#40621
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
- added messages check and fix before transfer
- fixed START and STOP signal generation conditions
- fixed semaphore release for empty messages
Signed-off-by: Konrad Sikorski <znfgnu@gmail.com>
Fixes: #40538
The TEMP_NRF5 setting requires MULTITHREADING, therefore add this
dependency to Kconfig.
The TEMP_NRF5 supports an alternative driver implementation using the
TEMP_NRF5_FORCE_ALT setting.
Because it cannot be known whether an alternative implementation has
the same dependency, then the MULTITHREADING is OR'ed with
TEMP_NRF5_FORCE_ALT, as to allow enabling of TEMP_NRF5 if an alternative
driver is provided.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This commit adds support for IMX6SX PWM.
The PWM module is the same module present on the IMX7D and so dts
bindings has been renamed following the one present on linux.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
Adds DMA support to NXP's LPSPI driver. This can be enabled by selecting
the KConfig symbol CONFIG_SPI_MCUX_LPSPI_DMA, and requires the LPSPI
instances enabled in the devicetree to have valid DMA instances
assigned.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Without this change, when DTS SPI device node has node ID = <0>, the
value of 0 is assigned during SPI configuration and written to
whichPcs member in master_config structure.
This value wrongly overrides the default value read from NXP's DSPI
HAL (kDSPI_Pcs0 = 1U << 0).
Such situation occurs on ip_k66f board, where the DSA device -
controlled via SPI has the node ID equal to 0 (i.e. reg = <0>).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is enabling the Debug support clock
like the stm32L0 or F0, the APB peripheral clock enable register 1
has a bit to clock DBGMCU before use.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is controlling the WWDG during the Stop mode in debug.
WWDG1 is frozen while the core is in Debug mode, setting the bit
of the DBGMCU APB1 peripheral freeze register (DBGMCU_APB1FZ2)
for the stm32MP1 soc devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is controlling the WWDG during the Stop mode in debug.
WWDG1 is frozen while the core is in Debug mode, setting the bit
of the DBGMCU APB3 peripheral freeze register (DBGMCU_APB3FZ1)
for the stm32H7 soc devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove check if frequency is equal to zero. A value of `ODR = 0` is
explicitly allowed by manufacturer / datasheet.
This has prevented applications from using the lis2dh power-down-mode,
which is set via `ODR = 0`.
For reference see "Table 28. Data rate configuration" in datasheet p.33.
Fixes#35486.
Signed-off-by: Markus Brüx <markus.bruex@grandcentrix.net>
In case of MSIS selected as system clock source it is necessary
to set Voltage scaling (VOS) when freqency is greater than 24MHz
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
When MSI trimming values where set to 0,
and MSIS is used as system core clock and MSI > 4 MHz,
it causes uart to fail.
There is no need to set thoses trimming values.
So keep the default reset value. (keep ST Factory calibration)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Because on stm32u5 MSIS is the default clock after reset,
changing MSIS range means immediate frequency change.
Thus it is important to do it after flash latency change
in case of higher new frequency.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The device PM subsystem _depends_ on device, not vice-versa. Devices
only hold a reference to struct pm_device now, and initialize this
reference with the value provided in Z_DEVICE_DEFINE. This requirement
can be solved with a forward struct declaration, meaning there is no
need to include device PM headers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make nrfx GPIO driver part of the PRE_KERNEL_1 initialization stage. As
a result, the GPIO driver can now be initialized before UART if
required, a device that is also initialized during PRE_KERNEL_1.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This patch adds support for the new pinctrl API to the UART driver. The
old pin property based solution is still kept so that users have time to
transition to the new model.
Notes:
- A new property to disable RX has been introduced: disable-rx. It is no
longer possible to do it automatically depending on pin information,
since it's not available when using pinctrl.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This patch adds support for the new pinctrl API to the UARTE driver. The
old pin property based solution is still kept so that users have time to
transition to the new model.
Notes:
- Some build assertions cannot be performed since the driver does not
have direct access to pin settings anymore. As a result user will not
be notified if HWFC is enabled but RTS/CTS pins are not configured.
- Hardware flow control can be enabled regardless of pin configuration,
it is now up to the user to configure RTS/CTS pins in DT.
- Some RX enable checks that were performed using pin information has
been replaced with a DT property that informs if RX is enabled or not.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for configuring UART/UARTE peripheral pins.
Co-authored-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add initial support for nRF pin controller driver. The implementation in
this patch does not yet support any peripheral. Only states
representation and basic driver functionality is introduced.
Note:
The nrf_pin_configure function has been marked as __unused since it may
not be used in certain scenarios until all peripherals are supported by
the pinctrl driver. For example, if only UART/E is supported but the
board does not enable UART, the function will never get called. However,
that board will likely have other peripherals that will gain support in
the future.
Thanks to Marti Bolivar for bindings documentation.
Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
commit 54907c7014
("drivers: spi: spi_context: improve support of multiple cs gpios")
added function to initialize all CS GPIOs defined in devicetree.
This function, spi_context_cs_configure_all, is intended to be
called during SPI driver initialization (POST_KERNEL init level).
It is also obvious that a SPI driver was not used at that time,
and no bus configuration (struct spi_config) is assigned to
SPI bus (spi_context.config).
The spi_context_cs_configure_all function has a homeopathic
ASSERT to validate CS levels, which causes a null pointer
dereferencing by ctx->config->operation if asserts are
enabled.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Use the new pinctrl API to configure pins.
Since STM32F1 series require pinctrl option and required register
address is parent timer address in place of own node register address,
use PINCTRL_DT_INST_CUSTOM_REG_DEFINE in place of usual
PINCTRL_DT_INST_DEFINE for this specific series.
Additionally, remove the automatic selection of PINMUX API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new pinctrl API to configure pins.
Additionally, rename usb_pinctrl to usb_pcfg to better fit
new pinctrl API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new pinctrl API to configure pins.
Additionally, rename eth0_pins to eth0_pcfg to better fit
new pinctrl API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add initial version for STM32 pinctrl driver. Driver has been written
re-using many of the already existing parts in
drivers/pinmux/pinmux_stm32.c.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use nrfx_gpiote and nrfx_ppi allocators to allocate channels
at runtime instead of fixed, device-tree based allocation which
is harder to maintain.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This adds :
- Generic PCIe Controller layer implementing the current PCIe API
- Generic PCIe Controller in ECAM mode driver
The Generic PCIe Controller layer provides:
- Configuration space read/write
- single bus endpoint enumerations
- Endpoint I/O, MEM & MEM64 BARs allocation
- Endpoint I/O, MEM & MEM64 BARs get & translation for drivers
The Generic PCIe Controller in ECAM mode driver provides:
- Raw DT RANGES properties into usable PCIe regions
- Configuration space read/write into ECAM config space
- PCIe regions allocation & translation
The limitations are:
- No support for PCIe prefetchable regions
- No support for PCIe bus configuration (only bus0 is supported)
- No support for multiple controllers (no domain-id in BDF)
Support has been designed to initially support Root Complexes with
Root Complex Integrated Endpoint, which was designed for Embedded
Systems with internal-only PCIe Endpoints on bus 0.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Replace unpacked in6_addr structures with raw buffers in net_ipv6_hdr
struct, to prevent compiler warnings about unaligned access.
Remove __packed parameter from `struct net_6lo_context` since the
structure isn't really serialized.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Replace unpacked in_addr structures with raw buffers in net_ipv4_hdr
struct, to prevent compiler warnings about unaligned access.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Change gpio_emul_input_set_masked_pend to log when it returns an error.
Changed all calls to gpio_emul_input_set_masked* to check the return
value.
Changed the function gpio_emul_input_set_masked_pend to apply the mask
to the provided values and not return an error if there are excess
values. In almost every call to that function, the value wasn't being
limited to bits set in the mask, so they were failing if there was more
than one gpio configured for INPUT|OUTPUT with a value of 1.
Fixes#40646
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Since drivers implement a callback based on action and not the state,
we should be using the API based on the action instead of the one based
on the state.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Fill in received bytes in USBIP_RET_SUBMIT packet
Currently this field is unconditionally set to 0 and therefore not
filled in conveniently. This may mislead the USB host which is correctly
acknowledged that the transaction was sucessful but it cannot check the
actual received bytes.
Test application:
```python
import usb
data = (0xFF, 0xFF)
print("Opening loopback device")
device = usb.core.find(idVendor=0x2FE3, idProduct=0x0009)
print("Writing test data", data)
written = device.write(0x1, data)
print("Written", written, "bytes")
```
Before:
```
$ ./test_loopback.py
Opening loopback device
Writing test data (255, 255)
Written 0 bytes
```
After:
```
$ ./test_loopback.py
Opening loopback device
Writing test data (255, 255)
Written 2 bytes
```
Signed-off-by: Raúl Sánchez Siles <rsanchezs@k-lagan.com>
Use DT_INST_ENUM_IDX_OR and always default to full-speed
if CONFIG_USB_DC_HAS_HS_SUPPORT is not set or maximum-speed
property is not defined.
Remove low-speed setting since device stack does not support it.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
In the current USB device support, the sizes of bulk endpoint
are mostly configure through Kconfig and do not care if a device
is high-speed capable. The information if a USB device controller
supports high-speed comes from devicetree. Add a Kconfig option to
map this information and configure bulk endpoint sizes
accordingly.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Define a custom IEEE802154 based L2. The user can then use those symbols
to implement their own 802.15.4 based L2, based on those symbols, w/o a
need to modify the Zephyr tree.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Some 802.15.4 L2 implementations expect that FCS length is included in
the overall packet length while others not. Allow to configure this
behavior, based on the selected upper layer.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Introduce a common config for all 802.15.4 based L2 implementations.
This way, any custom 15.4 L2 implementation will be able to
automatically enable use 15.4 driver, w/o a need to modify the actual
Kconfig.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The CAVS_IDC_IPM driver happens to be used only on non-2.5 hardware,
but it's best to be clear in the conditional compilation when we're
talking about hardware-dependencies and when we mean software
configuration. This was mixed up in a few spots.
Also fix a warning that creeps in on non-default drivers choices about
an undeclared ipm function.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
All the in-use contents of these files have now been moved to the
intel_adsp core, and they are configured via devicetree and kconfig.
Remove the legacy headers.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Each platform was defining its own shim.h header, with slightly
variant field definitions, for a register block that is almost
completely compatible between versions. This is made worse by the
fact that these represent an API imported fairly early from SOF, the
upstream version of which has since diverged.
Move the existing shim struct into a header ("cavs-shim.h") of its
own, remove a bunch of unused symbols, fill in definitions for some
registers that were left out, correct naming to match the hardware
docs in a few places, make sure all hardware dependencies are source
from devicetree only, and modify existing usage to use the new API
exclusively.
Interestingly this leaves the older shim.h header in place, as it
turns out to contain definitions for a bunch of things that were never
part of the shim register block. Those will be unified in separate
patches.
Finally: note that the existing IPM_CAVS_IDC driver (soon to be
removed from all the intel_adsp soc's) is still using the old API, so
redeclare the minimal subset that it needs for the benefit of the
platforms in transition.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This is dead code. It's based on the cAVS "IPC" mechanism to allow
communication to and from the host CPU. But there is no test rig in
the Zephyr tree for the protocol defined. And in fact the only
Zephyr-based user of the IPC mechanism (Sound Open Firmware) has its
own IPC driver and speaks its own protocol with the host kernel. That
driver needs to migrate into Zephyr soon and this legacy bit is just
confusing.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Recent work to this platform added a new, cleaner low level API to the
interrupt controller. Replace the hand-cooked register access with
that. This is still not as good as having proper multicore support in
the intc_cavs driver, but it's at least better.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Device data is cleared on deinitialization. This operation removes
some important information. Let's restore the defaults each time
the device is initialized.
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
fix uart_sam0_irq_update to only clear the RXS bit by writing only the
RXS bitflag to the INTFLAG register. Performing an |= opperation
with the bitflag for RXS incorrectly clears all pending interrupts set
since writing 1 to a INTFLAG clears that bit field. This causes a race
condition on when TXC will be cleared before all bytes have finished
being clocked out on tx and TXC being set 1 again. If tx finishes first,
any driver using uart_irq_tx_complete will deadlock the system.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
sam0 does not currently have a uart_irq_tx_complete method for interrupt
driven mode.
This is especially important since the sam0 platform has seperate
interrupt signals for TX data register empty and TX complete therefore
the TX register being empty does not nessisarily mean the data has been
shifted out.
Drivers should check uart_irq_tx_complete if it needs to guarantee
that the data has been fully transmitted in a hardware agnostic way.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
Aim of this change is to remove the need for the pinmux driver
on stm32f1 series to access the base address of the pinmux owner
device.
This is achieved by a modification in the device tree pin definition.
Instead of providing a generic information on type of the remap
(such as NO_REMAP, PARTIAL_REMAP, FULL_REMAP), the remap field
encodes all the information required to perform the remap register
configuration:
-Address of the targeted remap register in AFIO peripheral
-Position of the remap configuration in the remap register
-Mask used for the remap configuration encoding
-Value of the expected remap configuration.
All the possible remap configurations are encoded and predefined
in a new stm32f1-afio.h dt-bindings include.
To match this new configuration, all stm32f1 -pinctrl.dtsi should
be regenerated to use these new remap definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Review pinmux macro definition to a more portable format,
in preparation for new remap information encoding on stm32f1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
A lock was added to manage situation where the API poll_out and irq API
are used in same time.
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Program flow will behave incorrectly (memory and instruction fetches
return invalid data) if Flexspi is accessed by the Flexspi driver while
being used as XIP memory by the Cortex M7.
Set logging to disabled by when XIP mode is used in the memc and
flexspi drivers, and warn the user if they attempt to enable it.
Fixes#40133
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Extends STM32 PWM driver to support capturing pulse width, period,
or both.
The approach used is based on the PWM Input sections in reference
manual RM0351 by ST in the chapters on timers.
The LL library by ST is used for all extensions to the driver.
Only the disco_l475_iot1 board was available for testing on hardware,
using tests/drivers/pwm/pwm_loopback.
Since timers are a generic component, it is assumed that other STM32
boards will behave the same
Fixes#39394
Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
Current driver set a fixed prescaler value for the lpuart
that caused certain baudrate configurations to fail due to
LPUARTDIV overflow the LPUART_BRR register.
This PR attempt to calculate a suitable PRESCALER for the
selected baudrate, throws error and return if it couldn't get
an optimal one.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Add a pin control driver for GD32 SoCs using the AFIO model.
Thanks to Gerson Fernando Budke for testing and implementation
suggestions.
Co-authored-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Clock ISR was running 2x the frequency.
Also fixes clock_get_cycle which was returning
wrong values.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Check return value from recv() passed by usbip_recv().
Fixes: #39849Fixes: #39869
Coverity-CID: 240221
Coverity-CID: 240244
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
It does not make sense to use branch coverage with macro LOG_ERR().
It is still covered with line coverage.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
1.Putting the PWM_CHANNEL_X, PWM_PRESCALER_CX information
in the description.
2.Use the common definition EC_FREQ.
3.Use the common macro IT8XXX2_DT_ALT_ITEMS_LIST.
4.Stop using DRV_CONFIG, DRV_REG macro.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
HTS221 is a humidity and temperature sensor (thus HTS) that can be wired
on i2c or SPI bus. On SPI bus however, it uses the 3-wire mode, aka:
half-duplex.
Now that SPI API exposes half duplex operation, let's enable the SPI bus
on that sensor.
Let's move to a better DTS integrated driver as well, and also use
stmemsc interface.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is meant to expose half/full duplex configuration option on regular
configuration. So far, dual/quad/octal are not exactly supported, as it
would require extensions to the SPI buffer for a full support.
So moving these modes to an extended operation attribute
(32 vs 16 bits), disabled by default.
And exposing half/full duplex configuration bit. Full duplex being the
default option.
Fixes#19134
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Port some drivers to the recently introduced macros to showcase its
usage and be able to do some initial testing (nRF52840).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The macro already mentions in the docstrings that PM is not supported:
"Invokes DEVICE_DEFINE() with no power management support".
This patch removed the PM entry from the macro and ajusts its uses.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Define the device using DEVICE_DEFINE macro, so that a single option can
be used regardless of PM being enabled or not.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Since there are no more users and dependencies of
Kconfig option USB_UART_CONSOLE in the tree,
remove the remains and the option USB_UART_CONSOLE.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Do not change init level and priority of console driver
if Kconfig option CONFIG_USB_UART_CONSOLE is enabled because
commit 37f4d9ba63
("usb: cdc_acm: rework cdc_acm_poll_out to non-blocking")
changed CDC ACM UART driver so that it more closely mimics
the real controller and CDC ACM UART driver now uses the same
init level and priority as regular serial driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit fixes dual bank flash handling on stm32g0 targets.
In contrast to other Series (G4, L5) the flash page size does not change
in single bank configuration (2KiB in both configurations).
nSWAP_BANK:
While the reference manual(RM) only documents:
"This bit selects the bank that is the subject of empty check upon boot"
as expected, this behaves similar to BFB2 on G4 and SWAP_BANK on L5.
It has been observed that this bit swaps the address mapping of bank1
and bank2, regardless of DUAL_BANK bit being set or not.
As documented in the RM the nSWAP_BANK bit is ignored when the BOOT_LOOK
bit is set. This applies to the empty check as well as the address
mapping.
On this Series FLASH_CR_BKER must be set in single-bank as well as
dual-bank configuration for erase operations on bank2 regardless of
the swap status.
On a G0B1RE (dev-id: 0x467) I could not observe a difference between
DUAL_BANK flash option bit set and not.
It this may be different on 256KiB Flash targets.
The HAL indicates that "FLASH_SALES_TYPE_0" only uses a single bank if
OB_DUAL_BANK_VALUE is not set, but as I don't know which SoC this is
and I can't test the behaviour and the driver does not take this into
account.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit makes no functional changes, it only refactors the
driver such that dual bank flash handling can be easily added.
Instead of using HAL macros directly in the code, new macros
with STM32G0 prefix are defined.
The erase_page function gets passed the offset instead of the page,
and the FLASH CR reg is written once with all erase parameters.
flash_stm32_wait_flash_idle is already called before each
write to CR, consequently it is also made sure CFGBSY flag
is not set.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Some series (namely g0, u5, wb, wl, ?) use CFGBSY to indicate
that FLASH_CR is not ready to be modfied.
This commit adds this flag additionally to other the flash busy flags,
in flash_stm32_wait_flash_idle such that the driver waits before
trying to modify PG, PNB[6:0], PER, and MER bits in FLASH_CR.
Additionally, dual bank variants of STM32G0 have a seperarate BSY2 flag
for flash bank two.
Until now this was not yet checked in flash_stm32_wait_flash_idle.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In STM32G0 HAL FLASH_FLAG_xxx defines don't follow the pattern of
other Series to simply redefine the FLASH_SR_xxx Msk.
Instead an ID for the SR reg and the position of the Error flag
are defined.
As a result error checking in flash_stm32_check_status was not working
until this fix on stm32g0 series.
In order to avoid complexity in the driver, the ifdef-ery of the flags
was moved to the header file.
Other series except g0 use FLASH_FLAG_xxx defines, because those
are valid for both cores in dual core(wl) and in secure/non-secure
targets(l5,u5).
FLASH_STM32_SR_ERRORS mask is introduced to check for any active error
in the SR.
The flags for SIZERR, MISERR, FASTERR are newly introduced.
the latter two are only required once fast programming is used,
which is not yet the case for any series.
The FLASH_SR_OPTVERR flag (option validity flag) is also present
in the SR, but is not added.
Also ecc errors are generally not checked, but these are in a different
register.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
An attempt to simplify the ifdef-ery around FLASH_SR is made.
Define Registers and flags in the header file instead of including
several individual operations in the driver.
FLASH_FLAG_BSY is not only defined for STM32L5, but also other series.
Therefore use this flag instead of FLASH_SR_BSY.
Only the g0 series definition is not valid in our context,
therefore use FLASH_SR_BSY1 instead.
No functional changes, only refactoring.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
New Kconfig CONFIG_PPP_NET_IF_NO_AUTO_START
to have an option to disable of starting of the PPP networking interface
right after the init.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
IT8XXX2 uses shared ns16550.c driver which does not provide a power
management callback(pm_action_cb), so create driver to handle
IT8XXX2 specific UART features.
note: pm_action_cb(old name: pm_control_fn)
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
For port_set_bits_raw(), port_clear_bits_raw(), and port_toggle_bits(),
the second parameter sould be gpio_port_pins_t type. Currently, it
doesn't have other side effect, but it sould be fix. This commit fixes
it.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
For compatibility reason temporarily use pwm prescaler if it exists,
otehrwise use timers prescaler.
And thus avoid to avoid breaking boards out of tree.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Trivial fix of compilation error "invalid operands to binary "
when CONFIG_CAN_AUTO_BUS_OFF_RECOVERY = n
Fixes#40290
Signed-off-by: Lucas Dietrich <ld.adecy@gmail.com>
Updates to MEC172x eSPI driver to support ACPI shared
memory region and EC Host Command Subsystem through
ACPI_EC1 and Embedded Memory Interface (EMI).
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Refactors all of the on-chip GPIO drivers to use a shared driver class
initialization priority configuration, CONFIG_GPIO_INIT_PRIORITY, to
allow configuring GPIO drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
Driver-specific options for off-chip I2C- or SPI-based GPIO drivers are
left intact because they often need to be initialized at a different
priority than on-chip GPIO drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This driver aliases a regular `int` to `atomic_t` but that
should be updated to `long` with the change to `atomic_t`.
Added a comment to highlight that the variable was aliased.
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
The print specifier for `atomic_t` should be updated
to `%ld`, `%lu`, or `%lx` to account for the type
change of `atomic_t` to `long`.
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
In commit 918a574c88 ("clock: add k_cycle_get_64") this driver was
augmented with a count64() method to get a 64 bit cycle output from
the two-32-bit-word device registers.
Unfortunately it appeared to be trying to use a spinlock around the
two (low/high) reads to protect against overflow. But that doesn't
work: spinlocks protect against other CPU code using the same
spinlock, not against a hardware counter that is incrementing in real
time!
Thankfully there was already a count() routine in place that does a
detect-overflow-and-retry loop to solve this. Use that.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Add a macro to retrieve the iso data load length (the
length stored in the iso header) with a bit mask that
ensures that we only take the first 14 bits.
This is to remove any RFU bits that may have been set.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
When a frame is sent with a cleared ACK request bit, the transmit
metadata contains a NULL pointer to the ACK frame.
The pointer must not be dereferenced in such case.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
The modem sockets poll implementation does not allow
a combination of poll on modem sockets and on other sockets
like eventfd. This blocks trivial application signalling. Current
users are using a poll timeout, which needs to check if other
work needs to be done in the thread (eg: lwm2m engine).
To allow proper signalling with eventfd, the non offload poll
methods needs to work for the modem sockets.
This commit is implementing this for POLLIN.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Introduce combined GPIO drive strength flags for GPIO controllers only
supporting either default or alternative drive strength regardless if
the pin is driven to a high or a low level.
Fixes: #30329
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
ptp_clock_adjust() API call for mcux driver has a bug where
increment gets compared with an unsigned int, causing it to
always return -EINVAL.
Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
The return value of uart_fifo_fill could potentially be negative, so
make sure the code doesn't do anything bad in that case.
Fixes#39823
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Make sure negative error returns from uart_fifo_read() are correctly
handled.
In the same go, the logic of reading packet headers (ACL/event/ISO) is
refactored into its own helper function. This also fixes having an
appropriate name for the variable that tracks how many header bytes have
already been read (it was called "to_read" and now it's called
"bytes_read").
Fixes#39805
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This adds API to support datum more than 8-bit wide. Drivers are
still responsible for the implementation.
Fixes#31914
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The commit removes an error check from the erase loop and instead
add breaks in places where errors that would break an execution of
the loop occur.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The STM32U5x device has ADC instance of different versions
similar to the stm32H7 about the oversampling.
ADC1 of 14bit resolution has a ratio from 1..1024 on OSR[9:0]
ADC4 of 12bit resolution has a ratio on OVSR[2:0]
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit extends the configuration of the oversampling
ratio and shift for the stm32U5xx soc, depending on the
ADC instance: ratio is a value from 1..1024 or a LL_ADC_OVS_RATIO_x
to be used with the stm32Cube LL function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For some stm32 soc devices, the USART (or UART) flag RXNE is cleared
by the LL_USART_ClearFlag_RXNE function which directly writes
the RXNE bit of the Status register. This is the case with the
stm32F1x, stm32F2x,stm32F4x, stm32L1x.
Some other are using the Rx Data Flushing function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Uart post kernel initialization does not allow starting shell
properly. This issue was added in UART unifying PR.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Take into account the return code of the bus_init function
and propagate codes from the init* functions to the user
instead of hardcoded -EIO. While at it set the ERROR
level message to the logs.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
In some cases, it is quite useful to have the possibility to also
include zero-length buffers in a buffer set used in transfers
(for example, when frames in a protocol consist of several parts,
of which some are optional). So far, the behavior of spi_context
update functions was that the transfer in a given direction was
finished when a zero-length buffer was encountered in the buffer
set. Change those functions to simply skip such buffers. Correct
in the same way also the spi_context_buffers_setup() function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Do not use any timeout in the slave mode, as in this case it is not
known when the transfer will actually start and what the frequency
will be.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove the DT_CHOSEN_ZEPHYR_CANBUS_LABEL macro and replace it with
DEVICE_DT_GET(DT_CHOSEN(zephyr_canbus)) were possible.
Where both devicetree CAN controllers and Kconfig specified CAN loopback
controllers are supported, the macro is replaced with
DT_LABEL(DT_CHOSEN(zephyr_canbus)) for now.
This is the first pass for removing the requirement for devicetree
labels for CAN controllers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit makes nrf5_config_mac_keys function more generic.
Is uses lookup table for storing keys to override. It removes old keys
before storing new ones.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This is a follow-up to commits 99daca9bba
and ae03c0a6bf.
nRF SPI driver shims cannot use devicetree instance indexes, they need
to use the DT_NODELABEL macro and SoC peripheral instance indexes.
Correct the macros used in initialization of CS GPIOs in those shims.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Both DRDY and motion interrupts behaves like level signals since they
remain asserted until they're cleared. Configuring them as edge
interrupts is dangerous because if we ever miss an interrupt, it may
never get cleared and thus will never trigger again.
Treating them as edge signals seems to have no advantages, other than
being marginally simpler to implement.
The patch has gotten many hours of run-time on real hardware using a
nRF52-based board and a LIS3DH with both interrupts connected and
heavily utilized.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
This change adds `k_cycle_get_64()` on platforms that
support a 64-bit cycle counter.
The interface functions `arch_k_cycle_get_64()` and
`sys_clock_cycle_get_64()` are also introduced.
Fixes#39934
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
Kconfig USB_DEVICE_REMOTE_WAKEUP option depends only on
USB device controller capability, but is not controlled
by the USB device controller drivers configuration.
Move USB_DEVICE_REMOTE_WAKEUP option to drivers and
make it promptless.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Even if not used DMA HAL is required in L4/F7 SD HAL driver.
Add them for these specific series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds shell commands for the reset cause API
- show: show the persistent reset cause
- clear: clear the persistent reset cause
- supported: list all supported reset causes
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
This commit changes the shell argument name from shell to sh
to satisfy the warning
"Violation to rule 5.7 (Tag name should be unique) tag: shell"
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Rename the Zephyr chosen property for specifying the default CAN bus
controller from "zephyr,can-primary" to "zephyr,canbus".
The "zephyr,can-primary" property name was selected in antipation of
adding support for redundant CAN networks, which we have yet to
add. Meanwhile, the "primary" term causes confusion for non-redundant
CAN bus configurations (and the "can" term doesn't match the name of the
Zephyr CAN bus subsystem).
The CAN in Automation (CiA) 302-6, which deals with CANopen network
redundancy, uses the terms "default interface" and "redundant
interface". If/when we add support for redundant CAN networks, the
"zephyr,canbus" chosen property can be supplemented with a
"zephyr,canbus-redundant" chosen property.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The previous bf68b67 commit incorrectly passes minfo.mdm_rssi
value to the modem context data_rssi member during the driver
initialization which causes the `modem info` shell command
to return 0 as RSSI value. Fix that by changing data_rssi
modem ctx member to a pointer that is assigned to the RSSI
variable stored within the modem driver context structure.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
add ledc to board dtsi file,
change compatible and device define in pwm driver,
add yaml for board ledc support,
fix missing include for board in gpio include
Signed-off-by: Andrei-Edward Popa <andrei_edward.popa@upb.ro>
Changed pwm_pin_set_cycles into pwm_pin_set_nsec
to decrease power consumption. Changed default
value for period to 100000. There is no need in having
period for pwm leds equal to 100 cycles as human eye has ~100 fps.
Signed-off-by: Jan Zyczkowski <jan.zyczkowski@nordicsemi.no>
CONFIG_UART_MUX_DEVICE_NAME is used as a prefix for the uart muxes
name. Pointer comparison will always return false
Fix#39774
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
drivers: modem: gsm: Quectel EC21 and BG9x act as a gsm modem without
problem, but COPS commands can returns just one value with 'mode'.
Format and oper are not mandatory. This modification reads 'mode'.
Also a modification on modem_cmd_read_cops_cmd is needed.
Signed-off-by: Jair Jack <jack@icatorze.com.br>
Use i2c_hal functions to enable support for
multiple SoCs.
Use DT compat to enable I2C from device
tree configuration
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
PCA9633 driver does not cunnetly support multiple devices.
Updated the driver to use DT_INST_FOREACH_STATUS_OKAY to
configure all devices defined in the device tree.
Convert driver to use `i2c_dt_spec` helpers.
Fixes#40076
Signed-off-by: Daniel N. Hansten <dnh2000@gmail.com>
This joins all clock control handling to same source
by using hal clock functions. It also brings ESP32C3
clock support.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This commit enables the HSI48 clock for the stm32U5 soc family
to use the USB device peripheral.
Enable the VDD USB voltage supply.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Since cs gpios are initialized during driver initialization
remove spi_context_cs_configure that is not longer need.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Add extra cs_gpios and num_cs_gpios members into
spi_context structure that will be used to
initialize all defined cs gpios during the driver
initialization using SPI_CONTEXT_CS_GPIOS_INITIALIZE macro.
While at it add a new spi_context_cs_configure_all
function that allows the user to configure
all available cs gpios in inactive mode.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
A couple of SPI drivers use CONFIG_KERNEL_INIT_PRIORITY_DEVICE
as init priority for driver initialization. Let's change
it to the dedicated CONFIG_SPI_INIT_PRIORITY to make it
compatible with other ones.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Any exposed PTM root device will by default see their root capability
enabled so they will become PTM responder.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such module is missing and will prove to be useful for future features
and/or printing out debug messages on existing ones.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
When the "Read data register not empty" irq occurs,
this commit is cleaning the RXNE flag by flushing the RX register
since the Receive Data Reg. (USART_RDR) has not be read previously
This could be the case when aborting a Rx for example.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
During SDMMC card init, HW_FC is disabled by default, overwriting
driver configuration.
To avoid this, move HW FC configuration after card init.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Deinitialize the nrfx_qspi driver for periods when the device
is suspended. For flash chips with "has-dpd" property set, when
suspending/resuming the device, issue also the enter/exit Deep
Power-down Mode command, respectively.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the read-only device config structure (so far used only for storing
the flash chip size and its JEDEC ID) to store the nrfx_qspi driver
configuration (it is not modified after initialization, so there is no
need to keep it in RAM) and fill it with settings read from devicetree,
processing them all at compile time (e.g. use the DT_STRING_UPPER_TOKEN
macro instead of switch-case blocks for getting values of "readoc" and
"writeoc" properties).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactors all of the EEPROM drivers to use a shared driver class
initialization priority configuration, CONFIG_EEPROM_INIT_PRIORITY, to
allow configuring EEPROM drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are at2x and emul drivers which have dependencies on SPI,
I2C, or flash drivers and must therefore initialize later than the
default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The commit removes redundant flash_id argument that the function
can obtain itself from dev.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
If a transmission is made with poll_out and immediately after an other
transmission is made with interrupt api the transmission is locked.
We fix this behavior by clearing the tx_poll_stream_on flag during the
irq_tx_enable function
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Making function inline doesn't provide any benefit here, and is
inconsistent with all other definitions.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PM callback is no longer referenced as "pm_control" but
"pm_action_cb", so reflect this new naming on the callbacks.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to have Espressif SoCs working with
the same uart drivers, all low level functions
are now replaced to hal_espressif HAL calls.
This also changes pinmux, gpio and uart
init order to meet its dependencies.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Move all PM device runtime API calls from pm_device* to the
pm_device_runtime* namespace.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not limit the length of the prepared transfer to the shorter of
provided TX and RX buffers if both are used. The SPIS peripheral
cannot handle scattered buffers anyway, so there is no point in
getting the common part of TX and RX buffers for a partial transfer,
like it is done for SPI and SPIM peripherals; everything what is
possible needs to be transferred in one shot. For the same reason,
there is no point in calling spi_context_buffers_setup() and using
the related part of the spi_context structure, hence the call is
removed and buffer pointers are used directly.
Also return an error if a requested transfer length exceeds the SPIS
peripheral hardware limit, instead of silently limiting the transfer
like it was done so far.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In order to convert from degrees to radiants the SENSOR_DEG2RAD_DOUBLE
macro must divide the argument by 180 degrees and multiply by PI
radiants, and not the other way around. Please note that same macro
is already defined in the correct way in other sensor drivers as well.
(Fix#39483)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add a Kconfig symbol to enable use of SDMMC hardware flow control.
In specific cases, this feature could help to avoid FIFO ovderrun
and underrun errors.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add get_config function to I2C emulator.
Also update tests using I2C emulator to use i2c_get_config.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Add get_config function to NPCX I2C driver. The master mode is hardcoded
and get the speed from a controller.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Some applications need to get the current I2C configuration. Add a
proper callback to I2C API under Kconfig option not to change
applications that don't need this feature.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This commit is fixing the error on clock control for the AHB3
in the stm32_clock_control_off function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Added watchdog implementation which is using counter device
to implement watchdog driver API. Watchdog timeout is called from
counter interrupt context. Some counter implementations support
using ZLI interrupt level which can be use here as well. Watchdog
like this can be used along hardware watchdog to cover for its
limitations, i.e. Nordic watchdog resets unconditionally after
62uS after triggering watchdog interrupt. It is not enough time
to dump logging data.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Return -EBUSY (not 0) from pwm_pin_enable_capture() if PWM capture is
already in progress.
Fixes: #39817
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The FIU/UMA module in the NPCX chip provides an dedicated SPI interface
to access the SPI flash. This commit adds the driver support for it.
With this commit, the application can call the flash APIs
(via spi_nor.c) to access the internal flash of NPCX EC chips.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I32bbf09f6e014b728ff8e4692e48151ae759e188
Use a more precise Kconfig symbol name to avoid namespace conflicts when
more NRFX-dependent drivers will be added.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Refactors all of the DMA drivers to use a shared driver class
initialization priority configuration, CONFIG_DMA_INIT_PRIORITY, to
allow configuring DMA drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors the remaining display drivers that didn't already use the
shared driver class initialization priority configuration,
CONFIG_DISPLAY_INIT_PRIORITY.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit adds minimal support of Xen hypervisor console via UART-like
driver. Implementation allows to use poll_in/poll_out char interface for
uart_console.c driver directly to HV console instead of using Xen
virtual PL011 UART. Future implementation will support interrupt driven
interface on Xen event channels, currently it is under development.
Also this commit introduces early console_io Xen interface, which allows
to receive printk/stdout messages quickly after start, but requires Xen,
built with CONFIG_DEBUG option.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
The maximum number of concurrent filters depends on the hardware and
the driver implementation. This API allows the application to obtain
the maximum number of available filters.
Signed-off-by: Martin Jäger <martin@libre.solar>
Setting the power mode to enabled causes other initialization to not
occur. Restore the power mode set upon entry when exiting.
Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
Change format in various shell_error calls from int to long unsigned
int.
Warning:
warning: format '%d' expects argument of type 'int', but argument
6 has type 'long unsigned int'
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Fixes interrupt-driven operation. With the previous way of
handling the TX FIFO and the interrupt flags, the operation
of the UART was prone to stalling when using it as the
console I/O device.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add support for the Xilinx Zynq-7000 SoC family to this driver. This
includes some SoC-specific register accesses when setting an updated
TX clock divider, also, the device tree binding now supports higher
MDC clock divisor values when the current target SoC is a Zynq rather
than a ZynqMP.
With regards to the use of this driver in a QEMU simulation of the
Zynq-7000, the Kconfig file is modified so that the driver is not
enabled unless QEMU networking is set to Ethernet mode.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Modification of the ARM architected timer driver and its configuration
data in order to address an erratum which exists at least in the Cor-
tex-A9 CPU, and which can also be observed in the QEMU implementation
of the Cortex-A9.
Comp.: ARM Cortex-A9 processors Software Developer Errata Notice
ARM document ID032315
Erratum 740657
This erratum causes a spurious interrupt pending indication with the
interrupt controller if no new compare value is written within the
timer ISR before the interrupt is cleared. This is usually the case
in tickless mode. If the spurious interrupt is not prevented, the
timer ISR will be called twice, but on second execution, the pending
flag is not set within the timer's register space. Not handling this
issue will lead to erratic tick announcements to the kernel.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
A single PWM driver can be used for multiple LED numbers. In that
case -EALREADY may be reported. It should be ignored.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Rewrite the NRFX IPC driver to properly support multi-channel addressing
leveraging the newly introduced MBOX APIs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.
If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.
This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This is a driver for the Synopsys DesignWare MAC. It should work
with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x
and 5.x.
This driver uses a zero-copy strategy, meaning that the hardware
reads and writes data directly from/to packet fragment buffers
provided by the network subsystem without first copying the data into
a dedicated DMA bounce buffer.
Platform specific setup is necessary for the hardware to work.
Currently, only the STM32H7X series is implemented and tested.
While this part needs refinement, this driver performs better and uses
far less code space than the HAL-based alternative.
Not yet implemented:
- MDIO (it is WIP, currently relying on default PHY config)
- PTP support
- VLAN support
- various hardware offloads (when available)
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Refactors all of the DAC drivers to use a shared driver class
initialization priority configuration, CONFIG_DAC_INIT_PRIORITY, to
allow configuring DAC drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are dacx0508, dacx3608, and mcp4725 drivers which have
dependencies on SPI or I2C drivers and must therefore initialize later
than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Adds functionality to receive LoRa packets asynchronously. Reception
runs continuously until cancelled by another call to `lora_recv_async`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add RSSI member into gsm_ppp_modem_info structure in order to
get that information using the gsm_ppp_modem_info function.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Make modem_info structure public in order to allow the user
to get modem information using gsm_ppp_modem_info function.
Move modem info query commands into separate function
that's called only once during gsm configuring because
there is no necessity to re-querying modem since
they should not change.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
After recent changes in the driver, the predefined `data` pointer in
`uarte_nrfx_pm_control()` would not be used in CONFIG_UART_ASYNC_API
configuration. Fix this by replacing `get_dev_data()` calls with
predefined data pointer where applicable.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
On the stm32H7 family, there are ADC which have Oversampling ratio
of 10 bits OSVR[9:0] in the CFGR2 register. It means that oversampling
512x or 1024x are possible.
Other values are not allowed as the oversampling field of the struct
adc_sequence (adc.h) is 2^oversampling.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The adc_stm32_oversampling function is used to configure
the ratio and shift for each sequence->oversampling
depending on the soc serie and ADC instance in the serie
In the stm32H7 serie, only ADC3 of ADC_VER_V5_V90 version
have a LL_ADC_OVS_RATIO_x contant (other a 9bit value).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change the access to the PCSEL register by using the LL function
because on the STM32H7xx soc, some devices have no PCEL register
especially on ADC3 of the stm32H723.
The LL function manages this difference.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support for dynamic pin control, that is, allow to change device pin
configuration at runtime. Because no device de-initialization is
available yet, this API has limited usage options, e.g. modify pin
configuration at early boot stage (before device driver is initialized)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce Kconfig for setting the driver initialization priority across
the entropy drivers and add a call to the logging template.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The PM action callback had an incorrect signature, probably a leftover
from the actions conversion.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Convert cc2529 driver to `spi_dt_spec` and `gpio_dt_spec`. Required a
whole driver conversion from passing around the driver data struct to
passing around the driver itself.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Convert cc1200 driver to `spi_dt_spec` and `gpio_dt_spec`. Required a
whole driver conversion from passing around the driver data struct to
passing around the driver itself.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Convery mcp12s17 GPIO driver to `spi_dt_spec`. Also perform some minor
cleanup on non-standard device data pointers.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all drivers settings having `[EXPERIMENTAL]` in their
prompt has has been updated to include `select EXPERIMENTAL` so that
developers can enable warnings when experimental features are enabled.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all subsys/net and drivers/ethernet/Kconfig.e1000 settings
having `[EXPERIMENTAL]` in their prompt has has been updated to include
`select EXPERIMENTAL` so that developers can enable warnings when
experimental features are enabled.
The following settings has EXPERIMENTAL removed as they are considered
mature:
- NET_OFFLOAD
- NET_PROMISCUOUS_MODE
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The setting UART_ASYNC_API is no longer considered experimental.
Also remove `new` from title and help test as the feature no longer can
be considered new.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Refactors all of the console drivers to use a shared driver class
initialization priority configuration, CONFIG_CONSOLE_INIT_PRIORITY, to
allow configuring console drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEFAULT to preserve
the existing default initialization priority for most drivers.
The driver-specific option, CONFIG_NATIVE_POSIX_CONSOLE_INIT_PRIORITY,
is left intact because the native posix console driver needs to
initialize after the UART console driver when both drivers are enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors all of the counter drivers to use a shared driver class
initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to
allow configuring counter drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are the maxim_ds3231 and mcp7940n drivers which have a
dependency on a SPI driver and must therefore initialize later than the
default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors all of the CAN drivers to use a shared driver class
initialization priority configuration, CONFIG_CAN_INIT_PRIORITY, to
allow configuring CAN drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The exception
is the mcp2515 driver which has a dependency on a SPI driver and must
therefore initialize later than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Move odr options from Kconfigs to Device Tree. Moreover add
in DT a power-mode option to select among 4 possible values
(PD, LP, HR, HF). The power mode cannot be currently set from
sensor APIs.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit aligns lis2ds12 sensor driver to latest multi
instance sensor driver model.
In particular it makes use of the stmemsc common routines
and move ctx handler inside struct config, so that the
bus_init routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Port the lis2ds12 sensor driver on top of the lis2ds12_StdC
HAL interface (in modules/hal/st/sensor/stmemsc/).
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Make use of the new DT facilities that introduced two new
bus structures, spi_dt_spec and i2c_dt_spec, as well as the
macros, SPI_DT_SPEC_INST_GET and I2C_DT_SPEC_INST_GET, to
retrieve info from DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Fix the usage of sensor shell module that calls sensor_sample_fetch
function with SENSOR_CHAN_ALL id which is not supported and
causes the following error:
uart:~$ sensor get INA237 current
Failed to read sensor: -134
channel idx=31 current = 0.000000
Fix that by adding support for SENSOR_CHAN_ALL channel id.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all subsys/canbus, subsys/net/l2/canbus, and drivers/can settings
having `[EXPERIMENTAL]` in their prompt has has been updated to include
`select EXPERIMENTAL` so that developers can enable warnings when
experimental features are enabled.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all subsys/bluetooth and drivers/bluetooth/hci settings having
`[EXPERIMENTAL]` in their prompt has has been updated to include
`select EXPERIMENTAL` so that developers can enable warnings when
experimental features are enabled.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
When the ITS is configured with a large number of DeviceID bits,
up to 32, the Device Translation Table can be configured as
"indirect" mode consisting of a 2-level table with the first
level entries pointing to a second level table for each
group of DeviceIDs.
This is necessary to support platforms with DeviceID bits > 16.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This PR updates GPIO driver to use DTS information
regarding gpio availability.
This also fixes interrupt handling and
also removes kconfig definition for GPIO port.
A few configuration checks were also added to
improve code usage.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Use of '__DEPRECATED_MACRO' was not compatible with the way macro
is used later in this driver.
Remove it and keep the warning as vector for deprecation information.
Additionally, replace DT_NODE_HAS_PROP with DT_INST_PROP as
using the former is not recommended with boolean properties.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Refactors all of the ADC drivers to use a shared driver class
initialization priority configuration, CONFIG_ADC_INIT_PRIORITY, to
allow configuring ADC drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are lmp90xxx, mcp320x, and mcux_adc16 drivers which have
dependencies on GPIO, SPI, and/or DMA drivers and must therefore
initialize later than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The current modem sockets poll implementation has 2 limitations
as of today:
- not following posix spec wrt timeout of -1 (should be forever,
but as today it's was returning immediately)
- not able to poll from multiple threads on different sockets
on the same modem.
This pull request should implement these limitations.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
DT_INST_NODE_HAS_PROP() returns true always since the boolean
tag is valid. Use DT_INST_PROP_OR() to get the real value.
Fixes: baecd7e55a drivers: uart_ns16550: Remove CMake-based templating
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Fix the limits for the timing parameter calculations.
The lower limit for the phase_seg2 value is wrongly specified as 1 to 7,
but 1U is substracted before writing it to the CTRL1:PSEG2 register
field. This results in register field values between 0 and 6, but 0 is
an invalid value for the PSEG2 register field.
The upper limits for several of the timing parameters are wrong as well,
but this does not result in invalid register field values being
calculated. It can, however, result in not being able to meet CAN timing
requirements.
The confusion in specifying the limits likely stems from the timing
calculations and timing limits using the "physical" values, whereas the
registers fields all use the "physical" value minus 1. When the
datasheet says "The valid programmable values are 1-7", the
corresponding limits should be set to 2 to 8 to take the "minus 1" into
account.
Fixes: #39541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Refactors all of the clock control drivers to use a shared driver class
initialization priority configuration,
CONFIG_CLOCK_CONTROL_INIT_PRIORITY, to allow configuring clock control
drivers separately from other devices. This is similar to other driver
classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_OBJECTS or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
The even lower defaults for STM32 and Arm Beetle are preserved by
SoC-family level overrides.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This enables accessing the hyperflash through the flash api.
Added a feature to memc_mcux_flexspi that waits for flexspi bus to be
quiet.
Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
There is no power channel within the name array that
is used by e.g INA23X so let's add it to have support
in sensor shell commands.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Use the shared CONFIG_SERIAL_INIT_PRIORITY for driver initialization
priority.
Override the default value for the NEORV32 SoC to ensure the serial
driver is initialized after the syscon driver by default.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
When creating a socket, be sure to check the address
family and set the correct address family option in
the AT command.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Add a Kconfig option, similar to the one that is already available
for nRF5340, that allows enabling the REG0 (VDDH) DC/DC converter
in nRF52840. Make use of this option in Nordic boards: nRF52840 DK
and nRF52840 Dongle.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Not all STM32 parts have at least 5 DMA interrupt vectors for DMA2. In
particular, some STM32F1 XL-density devices only have 4 DMA2 interrupt
vectors, with Channels 4 and 5 sharing the same vector. Added
#if DT_INST_IRQ_HAS_IDX(1, 4) to prevent compiler errors on these SoCs.
Signed-off-by: Josh Hansen <jhansen3141@gmail.com>
Refactors all of the serial drivers to use a shared driver class
initialization priority configuration, CONFIG_SERIAL_INIT_PRIORITY, to
allow configuring serial drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The one
exception is uart_lpc11u6x.c which previously used
CONFIG_KERNEL_INIT_PRIORITY_OBJECTS.
This change was motivated by an issue on the frdm_k64f board where the
serial driver was incorrectly initialized before the clock control
driver.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Both nRF I2C drivers (i2c_nrfx_twi and i2c_nrfx_twim) perform the bus
recovery procedure in reaction to timeout (500 ms) of any requested
message transfer. Add implementation of the I2C API recovery function
in both these drivers so that it is also possible to execute this
procedure directly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Size of data pointer for event revival must be at least sizeof
event queue item.
Update to send whole event (id + event)
Signed-off-by: Pavlo Hamov <p.hamov@venstar.com>
Add __printf_like modifier to validate strings used by shell.
Fixing warnings triggered by this change.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
1) Allow use of interrup driven instance.
ROM implementation could be selected via dts compatiable.
2) Use UART rx fifo and timeout interrupt for end of message detection.
Added to decrease interrupts count on data reception
3) Use ESP_LL api.
Signed-off-by: Pavlo Hamov <p.hamov@venstar.com>
When CLOCK_CONTROL_NRF_FORCE_ALT is enabled then calibration is
performed outside of the driver. In that case certain Kconfig
options where present which were dedicated for case when calibration
is performed by the driver. Side effects of those options lead to
conflicts when CLOCK_CONTROL_NRF_FORCE_ALT was enabled. Fixed
those conflicts by introducing Kconfig option which indicates
whether calibration is performed by the driver or not.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Model descriptions in Kconfig.ssd1306 should be ssd1306 instead of
ssd16xx, these may be copied from driver for ssd16xx.
Signed-off-by: Huang Qi <no1wudi@qq.com>
- Per datasheet (Rev 1.0, Page 29): When enabling adv_power_save, there
needs to be a 1ms inter-write registers delay. With this addition, the
driver will work at SCLK frequencies faster than 100kHz.
- Added helper function reg_write_with_delay() to factor these writes.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
However, there are cases when milliseconds granularity is not
enough and can significantly reduce a throughput, e.g. 1ms is
100 bytes at 1Mb.
Updated 4 drivers which implement asynchronous API. Updated
places where API was used.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Replaces the prefixes of gpio_matrix_in and gpio_matrix_out
to unify those function calls on all supported socs.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
When the driver was called to set the period length for a channel
to 0, it set the COUNTERTOP register in the PWM peripheral to 0,
what resulted in an undefined behavior of the peripheral (and lack
of the STOPPED event sometimes).
The PWM API does not precise how should a zero length period be
handled; some drivers return the -EINVAL error in such case, some
do not. This patch fixes the pwm_nrfx driver so that it does not
change the previously used COUNTERTOP register value when the period
length is set to 0, and because the pulse cycles are always limited
by the driver to period cycles (so 0 in this case), in result the
relevant channel is simply deactivated. This allows users to switch
off a channel by requesting the pulse width to be set to 0 without
providing a non-zero period in such call.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Implement the CPU idle task. The system should enter this task when
there is no any task to ensure power saving.
Tested on it8xxx2_evb board. It will reduce 12.5mA when system enters
the CPU idle task.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
STM32G0/F0 SoCs allow to remap PA11/12 to PA9/10. Some boards
were manually configuring this remap. This patch centralizes this
functionality to the pinmux driver, allowing boards to enable the
remap directly in board dts file.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When existing stop mode 1&2, VCO is set to range 4
and should be set back to range 1 to allow full speed
operations.
Rather than setting VCO at startup, set it inside clock
setting procedure so that it could done
in clock reset procedure when existing stop modes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If CONFIG_WIFI_ESP_AT_SCAN_MAC_ADDRESS: mac addr included in
scanning results.
if CONFIG_WIFI_ESP_AT_SCAN_PASSIVE: passive scanning is used instead of
default active scanning.
If CONFIG_WIFI_ESP_AT_SCAN_RESULT_RSSI_ORDERED: scanning response
ordered by RSSI.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
On LSM6DSO sensor the INT1 pin is used for both generating the drdy
interrupt and for switching to I3C hotjoin mode just after reset if
it is at logical '1' level. It might happen that after a board
reset the logical level '1' is preserved (maybe a level shifter)
forcing the LSM6DSO to enter erroneously in I3C mode, breaking any
attempt to communicate with it. (Fix#38902)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This kconfig is only used for one board and is simply an alias
to another kconfig. So remove CONFIG_DW_ICTL_OFFSET and apply
the value directly to the other kconfig.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Uptime in milliseconds is assigned to uint32_t variable, which results
in integer overflow after enough time has expired. Additionally
milliseconds part (which should be 0-999) is assigned directly from
uptime, without subtracting full seconds.
Fix both issues by using int64_t variable and calculating milliseconds
with modulo.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Convert all CS control logic to be based on the `gpio_dt_spec` member
instead of the standalone `port`, `pin` and `flags` members.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
async_rx_disable does not re-anable RXNE interrupt, it was disabled
during async_rx_enable
Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
Removing two unused "struct fdc2x1x_data" to fix warnings
when compiling with PM_DEVICE=y.
Signed-off-by: Igor Knippenberg <igor.knippenberg@gmail.com>
All ARC CPUs (supported by Zephyr) don't lose core interrupt
controller configuration after switching to sleep mode / modes,
so we don't need to save & restore it's configuration with PM.
This PM code most likely was added for Arduino 101 (Genuino 101)
board which isn't supported by Zephyr anymore - so we can drop
it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
We don't use '_VectorTable' in the driver, so let's drop it's
declaration.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
In some configurations (e.g. edge interrupt triggers),
an interruptible event occurs during ISR and the host interrupt
controller does not see the new event due to IIR is constantly
asserting interrupts. For example, the callback handles RX and
then TX. If another character comes in before end of TX processing
(TX interrupt still asserts while raising RX interrupt), the host
interrupt controller may not see this new event. So if needed,
the IER is being toggled to re-assert interrupts at the end of ISR
to nudge the host interrupt controller to fire the ISR again.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove Kconfig options for enabling device instances in favor of
taking that information only from device tree. Prior to that
change there was a mix of devicetree and Kconfig.
Bring back use of CONFIG_GPIO_NRF_INIT_PRIORITY.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Allow the user to register function callbacks that
are executed during gsm modem configuring and stopping.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
GPIO L/K groups:
On IT81202 (128-pins package), the pins of GPIO group K and L aren't
bonding with pad. So we configure these pins as internal pull-down
at default to prevent leakage current due to floating.
GPIOH7:
On IT81202/IT81302, the GPIOH7 isn't bonding with pad and is left
floating internally. We need to enable internal pull-down for the pin
to prevent leakage current, but IT81202/IT81302 doesn't have the
capability to pull it down. We can only set it as output low,
so we enable output low for it at initialization to prevent leakage.
After setting: power saving=2.26mA
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The magnetometer on the LSM303DLHC has a different gain conversion
factor for LSB to Gauss for the Z axis than it does for X, Y. This
commit takes into account the different conversion factors, and
adds the correct coefficients for each gain setting and axis.
Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
This constraint on the AHB prescaler is removed.
The ahb-prescaler is allow from 1-512.
For stm32 common and stm32U5 devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove APIs used in the pre-DT era. In case manual access is required,
`stm32_dt_pinctrl_configure` can still be used as a shortcut with data
initialized in the expected format.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fixes: #38959
Currently, the I2C driver returns I2C status register value as error
code when error happen. This PR fixes returning system number and
the return values is negative for error.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change the REMAP bits of the AFIO_MAPR of the stm32F1x soc
with local MACRO without changing the SWJ_CFG (write-only bits).
The serial wire JTAG configuration is taken from the Z_AFIO_REMAP
(value of the CONFIG_GPIO_STM32_SWJ_xxx))
and not read from the MAPR register.
It accesses to the MAPR register directly instead of LL functions.
Note that Remapping on the MAPR2 is not to change.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Timer STM32 LPTIM currently supports 2 clocks sources: LSE & LSI.
LSE (external) is defined as default but its availability depends
on board support package and then may not be available.
This ends up in situations where users have LSE implicitly selected
while no crystal is available on board, leading to non functional
LPTIM.
To avoid this situation, makes LSI clock, which is always available
(since internal to the SoC), the default LPTIM source clock.
Then, default case will be functional. Users will then be able to
select LSE if needed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some functions were being re-defined as macros if certain conditions
were not met.
Fix violations to rule 5.5
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
console_input_init is only used in the same scope it is implemented.
There is not need to have it defined elsewhere.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
interrupt controller, also places its relevant
peripheral sources allowing drivers to use the
DT macros instead of espressif headers.
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
Changes the modem_context_sprint_ip addr to write into a provided
buffer. This approach fixes a referencing to a non existing stack
variable, without using a lot of stack space.
Tested using the by building all used modems and tested on HW using
IPv4.
Fixes: #38459
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
Depending of the soc and SPI peripheral, the Frame-Format of the
SPI can be configured to support TI or Motorola protocol.
This is configured through a new DTS property.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- correct the names of buffers used by message queues so that it
is possible to have multiple instances of the driver (in case
such need appears in the future)
- make `stop` and `discard_rx` normal structure members, not bit
fields, as they are modified in the interrupt handler and that
could lead to overwriting of other bit fields located in the
same memory unit
- add a log message providing the actual frame clock (WS) frequency
(i.e. PCM rate) that the driver was able to configure (due to
hardware limitations, it is not always possible to achieve the
exact requested frequency and the driver selects the closest one
available, so make it more visible to users
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unnecessary condition that effectively limits the usability
of the I2S format to two channels mode only.
Although the description of the `i2s_config` structure contains
a remark that for the I2S format the specified number of channels
is ignored and always two are used, in fact only one other in-tree
driver (i2s_sam_ssc) applies such limitation.
The nRF I2S hardware has no problem with handling the I2S format
with audio data for only one channel, so there is no need for having
this limitation in the driver, and without such mode of operation of
the driver it is impossible to feed it with PCM data directly from
the PDM peripheral working in one channel mode.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When creating a socket, all of the registered socket implementation are
processed in a sequence, allowing to find appropriate socket
implementation for specified family/type/protocol. So far however,
the order of processing was not clearly defined, leaving ambiguity if
multiple implmentations supported the same set of parameters.
Fix this, by registering socket priority along with implementation. This
makes the processing order of particular socket implementations
explicit, giving more flexibility to the user, for example when it's
neeed to prioritze one implementation over another if they support the
same set of parameters.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Put the maximum number of bytes into Tx FIFO in the fill_fifo routine
to reduce CPU usage.
Previously, the THRE bit was checked in a loop, but, according to doc -
"In the FIFO mode, it is set when the XMIT FIFO is empty, and is
cleared when at least one byte is written to XMIT FIFO.", so only one
byte was transferred every interrupt. That was generating a big amount
of interrupts, which consumes CPU time.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Update drivers regarding latest multicast group join/leave monitor
changes which now supports both IPv6 and IPv4 multicast addresses.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
The args_number and args_no structures could be removed
But other parameter checks we still preserved.
Signed-off-by: Dennis Ruffer <daruffer@gmail.com>
This is a frequently used command during hardware bringup
The listen command was not actually implemented
Also uncrustified and check_compliance.py
Signed-off-by: Dennis Ruffer <daruffer@gmail.com>
This implements support for the optional Interrupt Translation Service
(ITS) module of the GICv3 Interrupt Controller.
The current implementation is designed for MSI/MSI-X interrupt delivery
in mind.
The gicv3 driver calls each ITS INVALL command when LPI interrupts are
enabled/disabled.
A simple atomic integer is used to allocate unique LPI INTIDs to ITS
users.
CPUs numbers are directly mapped as ICIDs into the Collections Table.
As a limitation it doesn't support indirect Device table to simplify
implementation but may use a large amount of memory.
INV, DISCARD, MOVI and MOVALL commands are not implemented.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The LPI (Locality-specific Peripheral Interrupts) are edge-triggered
message-based interrupts that can use an Interrupt Translation
Service (ITS) to route an interrupt to a specific Redistributor and
connected PE.
This implement the necessary LPI support when an ITS is enabled.
The LPI states are stored in memory-backed tables.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Implements a shim layer driver using st hal for
I3G4250D gyro, mounted for example on stm32f3_disco_E.
No support for triggers included yet.
Signed-off-by: Jonathan Hahn <Jonathan.Hahn@t-online.de>
When SMP is enabled all the cores are announcing a tick and this is
causing too many ticks to be announced. Announce the tick even if this
is zero.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This reverts commit 43309296b8.
Fixes: #38403
The referred commit introduced `zephyr_library()` for pinmux drivers but
also resulting in #38403 because several boards has `CONFIG_PINMUX=y`
without selecting any pinmux drivers from `drivers/pinmux` thus
generating the following warning:
> No SOURCES given to Zephyr library: drivers__pinmux
>
> Excluding target from build.
This commit reverts the changes so that this warning disappears.
This results in pinmux drivers from `drivers/pinmux` to be located in
libzephyr.a which is messy, but has been so for a long time, even before
Zephyr 1.14 LTS.
The future pinctrl API will be designed in such a way that this problem
will not occur. Thus the old behavior is acceptable until the transition
to pinctrl API has completed.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
GPIO initialization was moved to PRE_KERNEL_1 with commit
590162a5cc06c72b70dee93f410b878bc0935f1f.
This had the consequence of having AFIO init done after GPIO init
as a consequence, this sequence ends up with AFIO clock disabled,
and hence negative impact on AFIO expected services.
Additionally, to save some flash, compile out afio init when not
required.
Fixes#38870
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixes: #38403
Removing unneeded `imply GPIO` and `CONFIG_GPIO=y` occurrences where no
files are added to the gpio zephyr library.
Also removed `CONFIG_GPIO=y` occurences where this is handled by
defconfigs for the soc or board.
Selection of GPIO without selecting any drivers results in the warning:
> No SOURCES given to Zephyr library: drivers__gpio
>
> Excluding target from build.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #38403
The two eth_native_posix.c and eth_native_posix_adapt.c are now added
to the common drivers__ethernet Zephyr library.
Instead of creating a dedicated library for just two files those files
are now added to the common ethernet library, see also #8826.
Instead, the dedicated compile definitions required for those files are
specified using COMPILE_DEFINITIONS on the source files.
This also avoids the following warning as the ethernet library is no
longer empty.
> No SOURCES given to Zephyr library: drivers__ethernet
>
> Excluding target from build.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #38403
Adding NET_DRIVERS menuconfig so that network drivers are grouped
together in its own menu entry under drivers, similar to most other
drivers.
This further has the advantages that `CONFIG_NET_DRIVERS` can be used
for testing to determine if network drivers has been selected.
This changed revealed a dependency loop where both `select` (for SLIP)
and `depends` (for PPP) which both depends on NET_DRIVERS` where in use
in the dependency tree for Qemu networking, especially NET_SLIP_TAP.
This is handled by defaulting `NET_DRIVERS` to `y` when building for a
Qemu target.
`SLIP` had a dependency to `!QEMU_TARGET || NET_QEMU_SLIP`. This is
changed so that SLIP prompt depends on `!QEMU_TARGET` which provides
full user control in hardware but makes the symbol promptless on Qemu
targets.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #38403
Changing Bluetooth drivers from being a menu into a menuconfig.
This aligns the Bluetooth driver configuration with other driver
configurations as well as provides a setting which identifies if
Bluetooth drivers has been enable.
This further helps to avoid empty Zephyr libraries for bluetooth
samples.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Setting Oversampling also applies on stm32L5 but disabling
the ADC will cause endless loop except for the stm32L0 serie.
Errata applies only on stm32G0 soc series when
writing ADC_CFGR1 register.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add hardware flow control support for the EFR32MG21 and other modules
using GPIO_USART_ROUTEEN_RTSPEN (and GPIO_USART_ROUTEEN_CTSEN) instead
of the Kconfig SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION.
The driver already contained the section settings the RTS and CTS pins
for modules using the GPIO_USART_ROUTEEN_(RTS|CTS)PEN define, but it was
not compiling because of an #ifdef checking only for
CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION and not both.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
Code removed:
- IT8XXX2 doesn't support soc level software interrupt hence remove
them.
- To use common macro to access csr (control status register).
- To remove CONFIG_RISCV_HAS_PLIC related code. IT8XXX2 uses its own
interrupt controller code.
- To remove ite_write and ite_read. We don't use them anymore.
Code changed:
- Return true from arch_irq_is_enabled() when external interrupt-enable
bit, and SOC's IER are both true.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Update sam0 i2c driver to directly send/receive next message if it is
in the same direction and the current message has no stop or restart
flags. Seems like in some drivers this is the expected behaviour.
Fixes#36857
Signed-off-by: Christoffer Zakrisson <rustypig91@gmail.com>
The st7789v_transmit function does not return any error code (void), so
ret = st7789v_transmit(...) is wrong.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The interrupt config flags for an IO should be separate
from the standard IO configs because the interrupt config
is a separate API.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
k_work_schedule may return other non-negative value than 0.
When driver was adapted to the new k_work API that was not
taken into account.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add support for Quectel modem in gsm_ppp modem driver.
The CMUX cmd is based on MUX application notes v1.0(2020-09-22)
for BG95, BG77 and BG600L. Tested and working on EC21e.
As the gsm_ppp doesn't do power control, it is required to power
on the modem manually in the application.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Apply the same changes as the previous commit made in the spi_nrfx_spim
shim, to keep these two shims aligned.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
According to the nRF5340 PS, for 32 Mbps high-speed SPI using SPIM4,
drive configuration H0H1 must be used. The underlying nrfx_spim driver
does it properly in its initialization function, so change the shim to
(re)initialize the driver when the SPI configuration is to be changed
(only then the speed to use is known), to avoid the need of duplicating
the corresponding code in the shim itself.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
According to the nRF5340 PS, SPIM4 only supports 32 Mbps when
the application core is running at 128 MHz. This patch adds
the corresponding check.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Ensure the GPRS connection APN settings match the PDP
context. This it best to ensure proper IP connectivity.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Ensure that the IP family is synchronized between the PDP
context and the GPRS connection.
There were cases where they could get out of sync.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Assign the IPv6 address from the LTE network to the
network iface.
Configure DNS resolver with IPv6 DNS address from the
LTE network.
Fix socket AT commands to account for IPv6 addresses.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
In the DNS work callback ensure the iface is up
(on the LTE network) before trying to reconfigure the
DNS resolver with the DNS address.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The stm32wl version of the sx126x driver disables the NVIC interrupt in
the radio isr to prevent retriggering while the event gets handled in
the workqueue. Since the interrupt condition is still present while the
line is disabled, the interrupt pending bit remains set in the NVIC, so
after the handler finished, when irq_enable() gets called, the interrupt
fires immediately again with no status bit set in the radio registers.
Apart from the no-op interrupt, this has the side effect of bringing
the radio out of sleep as soon as the interrupt bit are read and
cleared, which increases the idle state power consumption.
Adding a NVIC_ClearPendingIRQ() before irq_enable() seems to fix the
problem. It should not cause any issue with missing interrupt events, as
if there are pending bit on the Radio, the NVIC pending bit would be
re-set immediately.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
1. Add support for multiple syscon entries (as a side effect, this also
fixed syscon.c implementations which weren't being linked to their
syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon
Signed-off-by: Yuval Peress <peress@chromium.org>
These are the only two display drivers initializing in APPLICATION.
Dependency exposed with LVGL with initialization at same level and
priority.
Fixes#38690
Signed-off-by: David Leach <david.leach@nxp.com>
When CONFIG_PM_DEVICE_RUNTIME is enabled, if a pin is configure as
input after an output pin has already being configured the device is
wrongly suspended.
Fixes#38433
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Now that we're clearer around pm constraints management in various
TX cases (poll streams, irq driven or async), make some code
simplifications to ease readability.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Introduce new logic to set/release pm_constraint during serial TX
transactions.
First change is to introduce an internal flag and utility functions
to control the set/release constraint balancing per uart device.
This way, whatever the mix of transactions or API calls, we
ensure a single uart device can only do 1 or 0 to the PM state
constraint. Constraint can't then be set more than once, released w/o
having been set or released more than it was set.
The last part of the change reworks the triggers for constraints
set/release operations.
In order not to disturb driver operations, if irq driven mode or PM is
enabled, don't enable TC interrupt handling by default.
Instead, map the pm_constraint setting to the way TC flag is handled
in normal mode of operations (irq driven or async).
As a consequence, in irq driven mode, pm_constraint is set/released on
tx_enable/tx_disable api calls, which gives API user full control
on transaction protection vs low power operations.
Finally, we emulate the same behavior on TX poll transaction, by
enabling TC irq at the start of a stream and disabling TC irq once
stream is completed. This is controlled with a dedicated device flag.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
TWIM peripherals cannot perform write transactions from buffers
located in flash. The content of such buffers needs to be copied
to RAM before the actual transfer can be requested.
This commits adds a new property (zephyr,flash-buf-max-size) that
informs the driver how much space in RAM needs to be reserved for
such copying and adds proper handling of buffers located in flash.
This fixes an issue that caused that e.g. the DPS310 sensor driver
did not work on nRF SoCs that only have TWIM, not TWI peripherals.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Issue an error logging message when the i2c_nrfx_twim driver lacks
a concatenation buffer big enough to properly handle a call to
i2c_burst_write() function, to give the user a hint what is wrong.
Also use by default a 16-bytes long concatenation buffer for every
instance of the i2c_nrfx_twim driver. Such value should cover most
of the simple uses of the i2c_burst_write() function, like those
in the stmemsc sensor drivers, and when a longer buffer is needed,
the user will be provided with the above message pointing to the
property that should be adjusted.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
If CYC_PER_TICK does not divide the (now - last_count) quantity exactly with integer math, the subsequent multiplication before incrementing last_count causes a drift. This commit eliminates the redundant division-followed-by-multiplication and fixes https://github.com/zephyrproject-rtos/zephyr/issues/37852
Signed-off-by: Berend Ozceri <berend@recogni.com>
Fix power-save-mode (PSM) operation.
When in PSM, do not bring the networking interface down
when an out-of-coverage event occurs.
When PSM goes into hibernate, this will cause an
out-of-coverage event to occur, even though the device
still has access to service.
Keeping the networking interface in the up state
allows an app to send data whenever it needs to.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Using DTR to control sleep modes is a legacy mode
of operation. Remove control of DTR IO.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Sleep mode 0 (driven by DTR) is only recommended for use
as a legacy option.
Sleep mode 1 is recommend by Sierra Wireless.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
uart_sam0_dma_tx_done callback triggers when the last byte
is transferred from the tx sram buffer to the sercom DATA register.
However the byte has yet to be transmitted completely which can lead to
incorrect event handling if UART_TX_DONE is expected to signal
the end of transmission.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
Fixes a compile error for the err_check function not being found if
if CONFIG_UART_INTERRUPT_DRIVEN is not enabled.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
fixes peripheral drivers such as async uart that rely on dma being
ready failing because dma is not initialized yet.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
On those STM32 series, setting of this feature is conditioned to
the ADC state: it is allowed to set/reset the oversampler (OVSE bit)
and set the Oversampling ratio (OVSR bits) in the ADC_CFGR2 register
only when ADC is disabled or enabled without conversion on going.
Then is the ADC re-enabled.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On those STM32 series, setting of this feature is conditioned to
the ADC state: it is allowed to write the Data resolution (RES bits)
in the ADC_CFGR1 register only when ADC is disabled (ADEN=0).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The ticker `ticks_drift` is propagated via the ticker
elapsed callback, in order to provide necessary information
to correctly calculate total elapsed durations by states and
roles that use ticker extensions to mitigate scheduling
collisions by drifting within a permitted window.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The function usdhc_board_access_init was returning a non-zero
value as the variable "ret" is also used to store the GPIO
level for card-detect.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The net_core device initialization has a subtle dependency
on the PTP clock initialization. Adding a Kconfig and set
it to a priority level less than net_core. This will ensure
the initialization sequence.
Fixes#38571
Signed-off-by: David Leach <david.leach@nxp.com>
Snprintf calls should be avoid when not necessary, instead snprintk
should be used as it offers the same functionnalities at a lower cost
in flash.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
commit id ec2b9d42af missed that ivshmem
uses pcie_msi_enable as well, thus fixing it now.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
According to reference manual, use of TC is "to avoid corrupting the
last transmission when the USART is disabled or enters Halt mode.". It
is safe to remove it since it is not checked when CONFIG_PM=n.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In the current implementation the STM32 UART driver required to enable
`CONFIG_PM_DEVICE` when `CONFIG_PM=y` to function properly. The main
reason is that in some situations, like in polling mode, transmissions
are not fully synchronous. That is, a byte is pushed to the _queue_ if
it is empty and then the function returns without waiting for it to be
transmitted to the wire. This makes sense to make things like per-byte
transmission efficient. However, this introduces a problem: the system
may reach idle state, and so enter low power modes before the UART has
actually finished the last data in the queue. If this happens,
communications can be interrupted or garbage data may be put into the
UART line.
The proposed solution in this patch uses PM constraints to solve this
problem. For the IRQ/DMA case it is easy since we can set the constraint
before transmission start, and when the completion (TC) interrupt is
received we can clear it. However, the polling mode did not have the
capability to signal the completion. For this case, a simpler IRQ
routine is provided to just release the constraint. As a result, the PM
hooks are not required and so system can operate with just `CONFIG_PM`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not set DLAB bit in Line Control Register when the access to
the baud rate divisor registers is not needed.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This function wasn't being defined when SMP_BOOT_DELAY was set or when
SMP wasn't enabled. There's no reason for either, then function
doesn't depend on any kconfig-dependent build-time state, and (given
that we use -ffunction-sections) it won't appear in output binaries
unless called.
And there are use cases (e.g. z_smp_start_cpu()) where we need that
function even when BOOT_DELAY is enabled.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When the MSI clock is selected as source on the stm32wbx device,
the MSI has a range to choose the MSI input frequency.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When affinity routing is enabled for Non-secure state
( GICD_CTLR.ARE_NS is '1'), need to set routing information
for the SPI interrupt.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
The equality check for remap was not being performed since the local
variable remap was assigned to the value being checked just before the
check. Some minor simplifications have been performed (fixed variable
types).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit now sets the Zephyr library property `ALLOW_EMPTY` to
silence the warning:
`No SOURCES given to Zephyr library: drivers__interrupt_controller`
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The struct stm32_pinmux_conf structure (and stm32_pin_func_t type)
are not used, so remove them.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The val2 calculation was done using (1000000 / 40960) as
multiplying factor, which was sometimes leading to a
int32 overflow. So, let's use the equivalent (but smaller)
(3125 / 128).
Fix#38090
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The driver code for the Maxim DS3231 has repeated code for bit
manipulation to transform time data between binary and binary coded
decimal. Use the new BCD header functions instead.
Signed-off-by: Jake Swensen <jake@swensen.io>
This adds shell support for FPGA drivers.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This adds driver for EOS_S3 SoC FPGA.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This adds new FPGA controller which allow to control FPGA chips.
FPGA controller has been created to enable bitstream loading
into the reprogrammable logic. It adds completely new API,
which enables to check status of the FPGA chip, power it on
or off and reset it.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This patch changes condition of 'depends on' of sifive UART driver
to support other SoCs of SiFive Freedom series.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Add a shim that allows using the nrfx PDM driver via the Zephyr API.
Add also missing devicetree nodes representing the PDM peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-pdm" binding with a new property that allows
specifying the clock source to be used by the PDM peripheral (so that
it is possible to use HFXO for better accuracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The free run timer will be used to count before entering hibernate
mode. Move the related registers to the head file for accessing.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Remove the locally MSI/MSI-X capabilities ID define and use the
newly introduced one from the PCI Code and ID Assignment
Specification Revision 1.11 document header.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Extend the PCIe API to find Extended Capabilities in the PCI Express
Extended Capabilities located in Configuration Space at offsets 256
or greater.
Note: the Root Complex Register Block is not supported
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
enable spi driver to support dspi edma
add support for shared dma mux spi port
for shared spi port we need judge the irq source
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
The additional depends on SOC_FAMILY_SAM was redundant.
Add sam4l_ek to dfu sample exclude since it was failing on
arduino_due.
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
IRQ_CONNECT macro last argument is architecture-specific flag,
but now there is instance id at this place.
This PR set architecture-specific flag to 0.
Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
Atmel sam0 adc peripheral have multiple interrupt vectors for same5x
devices. This configure interrupt vector by name to ensure that proper
interrupt handle will be executed.
Fixes#37779
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The Kconfig refactor that replaces some single-symbol 'if's with
'depends on' added a second entry. That entry allows flash driver
be selected for SoC's without support. This fixes the 'depends on'
entry to allows only SAME/V SoCs.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The code was wrongly calling DMA_Abort on a channel
that not initialized. This fixes Issue#38078
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Position over LTE (PoLTE) can be used to locate a device as
an alternative to GNSS.
Increase RX thread stack size for PoLTE processing.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Allow application control for starting modem driver.
This allows network attach to be randomized.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
So fare flash simulator had been forced to use the statistic
subsystem.
This patch introduces CONFIG_FLASH_SIMULATOR_STATS which allow to select
whether the statistic is involved in flash_simulator operations.
This patch allows to reduce flash footprint when the statistic is
not required.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
For getting the address of the RAM region in the application we need to
extend the api for the flash_simulator.
This path introduce flash_simulator_get_memory() call which allow to
do so.
Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Fixes the issue where uart_sam0_irq_tx_ready would return true if
the INTFLAG was set even though the INTSET bit for the given
interrupt was not enabled yet through uart_sam0_irq_tx_enable.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
For low power operation, set the IP connection reconfig
flag when receiving a startup report.
This will ensure the GPRS connection is reconfigured
before any socket operations take place.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Allow the driver to run if a SIM card is not present.
This allows public HL7800 APIs like firmware updates
to be used even if no network is available.
Remove duplicate query ICCID command.
Signed-off-by: Andrew Hedin <andrew.hedin@lairdconnect.com>
This changes "__nocache K_HEAP_DEFINE()" to use the new
K_HEAP_DEFINE_NOCACHE() macro. This fixes a build error
as K_HEAP_DEFINE() is specifying its own linker section
so that it is no longer possible to specify another
linker section.
Fixes#38108
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For some reason, XCC fails to build complaining segfault
during CGPREP phase. Adding an assignment to a volatile
return value seems to fix this. This provides an easily
revertable commit to workaround the issue.
Fixes#37734
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When ack data for extended address is set with the
nrf_802154_ack_data_set function, the extended address
must be reversed to the IEEE 802.15.4 address transmit
order in order to be properly matched.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Error handling was missing in numerous places, mostly on GPIO related
callbacks. Some error codes were not correct (-EINVAL vs -ENODEV) and in
some cases error was not propagated correctly.
Fixes#38117
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Error handling was missing in numerous places, mostly for GPIO related
callbacks. An assertion has been used in the context of thread callback.
Fixes#38132
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Apply the same fix in bd8afe9365
(" drivers: sensor: clean up zephyr_library calls") to remove
redundant code in the sensor driver build system files. Additional
instances of the antipattern have crept in.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The result of temperature and relative humidity ticks ranges from 0 to
65535 which is the range of a uint16_t variable. Intermediate tmp
variable type has also been adjusted.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The max-erase-time property was introduced for the STM32 flash driver,
but it was inserted as an optional property in the generic
soc-nv-flash binding which is used by other SoCs.
Make it a required property in a new st,stm32-nv-flash binding
instead, since it is at present a vendor specific property.
Update the DTS files accordingly. Keep the existing "soc-nv-flash"
value in the compatible list in each case, so that DT_HAS_COMPAT(...
soc_nv_flash) tests on these nodes will still succeed, but put it
after a newly added "st,stm32-nv-flash" compatible, so that the
SoC-specific binding will be used as it is discovered first by the DT
tooling.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add logging for NRFX_USBD_EP_ABORTED event inside
control transfer events handling, otherwise "Unexpected event"
error message in this regard confuses the users.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Note that the it8xxx2 does not support a status register so that
functionality is omitted.
This change also adds driver tests that build both the npcx and it8xxx2
drivers.
Signed-off-by: Yuval Peress <peress@chromium.org>
There was a typo that snuck into the bbram driver for npcx.
Fix the driver and update the Kconfig to automatically include the
driver if the compatible string exists in the dts. This ensures that
the driver is built when building the npcx evbs.
Signed-off-by: Yuval Peress <peress@chromium.org>
Change IPM_STM32_HSEM Kconfig definition so that it picks the correct
default automatically depending on which cpu node is enabled in the
device tree, rather than relying on board specific Kconfig overrides.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This changes pci_msi_enable() to take IRQ number as a function
parameter. The old behavior relies on putting the IRQ number
into the interrupt line register in the PCI config space
during IRQ allocation, and reading it back when enabling IRQ.
However, the interrupt line register is only required to be
read-/writable when legacy interrupt is supported on the device.
Otherwise it has undefined behavior. On ACRN, they don't even
care about this register and always wires it to 0x00.
So this commit changes the behavior in pci_msi_enable() to not
require reading back the interrupt line register and instead
takes the IRQ number via function parameter.
Fixes#36765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
by including interrupt allocation feature whenever an Xtensa-based
Espressif SoC is selected.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
to make use of Espressif's hal in order to ease both
driver maintenance and code reuse between socs.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
In the dma.h there is a dma_ctx structure using a magic code
to be identify. This structure must be prepared as a new
element of the dma_stm32_data.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This fixes/improves the rounding errors that are introduced
through the truncation of integer division.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
This commit removes PHY and MDIO specific code from the ATSAM
Ethernet driver and instead relies on a separate PHY driver to
handle the PHY.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
This commit adds support for Ethernet PHY drivers via a PHY API.
It also includes a driver for a generic MII compliant PHY
which supports most PHYs on the market.
Separating PHY driver from the SoC specific Ethernet driver
simplifies the Ethernet driver code and enables code re-use.
Drivers for specific PHYs with more advanced features, such as
RGMII delay in PHY can be developed independent of the Ethernet
MAC driver.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Some GPIO related calls were not being checked for error.
This patch also fixes coverity issue 236651.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related functions were not being checked for errors.
This patch fixes coverity issue 236653.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related calls were not being checked for errors.
This patch fixes coverity issue 236650.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
gpio_add_callback was not being error-checked. Some other minor cleanups
(rc var to the top, remove redundant log).
This patch fixes coverity issue 236649.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related calls were not being checked for error.
This patch fixes coverity issue 236648.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related calls were not being checked for error.
This patch fixes coverity issue 236647.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the formula used to compute RH/ticks formula according to the Table
9 of the datasheet.
This patch also fixes coverity issue 238360.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the formula that computes T/ticks according to the details found on
Table 9 of the datasheet.
This patch fixes coverity issue 238343.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
I2S direction was not checked correctly in the i2s_nrfx_configure
function.
This patch also fixes coverity issue 238365.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add Digital-to-Analog Converter driver (based on DACC module) for Atmel
SAM MCU family. Only SAME70, SAMV71 series devices are supported in
this version.
Tested on Atmel SMART SAM E70 Xplained board.
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add sam4l full finite state machine based on Atmel Software Framework.
This allows driver detect protocol errors and sync all requests. This
version is compliance with Linux USB tests.
Note: Tests are timing sensitive and log may affect results.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The RISC-V Platform-Level Interrupt Controller (PLIC) was moved from the
RISC-V Privileged Specification v1.11 to a separate specification
(see https://github.com/riscv/riscv-plic-spec).
Reflect this by not automatically enabling the PLIC interrupt controller
driver for all RISC-V privileged SoCs, but only for SoCs with the
CONFIG_RISCV_HAS_PLIC Kconfig option enabled.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Follow up on commit bfd45e5b8c
("drivers: remove Kconfig option CONFIG_UART_CONSOLE_ON_DEV_NAME")
Remove Kconfig options
CONFIG_BT_UART_ON_DEV_NAME and CONFIG_BT_MONITOR_ON_DEV_NAME
since all UART drivers are converted to devicetree and we can just use
DEVICE_DT_GET(DT_CHOSEN(zephyr_bt_uart)) and
DEVICE_DT_GET(DT_CHOSEN(zephyr_bt_mon_uart)).
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Microchip MEC172x series I2C driver implementing controller
and target modes. The driver implemenents its own I2C port
pin control functions and does not depended upon pinmux. Future
updates will make use of PINCTRL when that subystem is finalized.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
After update of stm32 cube l1 V1.10.3,
SPI_CR2_FRF doesn't exist for all stm32L1 MCU,
thus LL_SPI_SetStandard() is also not defined for all stm32l1 MCU.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This adds basic support for the Silabs Si7210 hall effect magnetic
position and temperature sensor. It is able to get magnetic field and
temperature in the default scale of the sensor (depending on the
variant). It also supports going into sleep mode without measurements
through the device power management infrastructure.
It is most notably missing support for scale change, measurement
averaging and filtering, and alert pin configuration (threshold,
hysteris, tamper).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
the correct value is returned when using sensor channel get function to
read z-axis value
Signed-off-by: Vojislav Milivojevic <milivojevicvoja@yahoo.com>
Reduce interval of warning timer, so we can print more
warning messages (ex. MEPC, task ID...) before watchdog reset.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
We add disable event timer at the beginning of critical section
for two reason:
1.For K_TICKS_FOREVER case: since no future timer interrupts
are expected or required, so we disable the event timer.
2.Others case: according it81202 spec, when timer enable bit
from 0->1, the timer will reload counts and start countdown.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
On STM32WL, HSE clock can take 2 specific options:
-hse-tcxo
-hse-div2
Enable support for these options.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The conversion to devicetree seems to be half lost
for this driver. There are already bindings and nodes for
compatible "altr,jtag-uart", update driver to use it.
Remove last mention of CONFIG_UART_CONSOLE_ON_DEV_NAME.
Resolves#37207
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Remove CONFIG_UART_MCUMGR_ON_DEV_NAME and use
DEVICE_DT_GET(DT_CHOSEN(zephyr_uart_mcumgr)).
Add usb.overlay, which contains chosen node and cdc-acm-uart node,
to smp_svr sample.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Remove device_get_binding(CONFIG_UART_CONSOLE_ON_DEV_NAME)
and use DEVICE_DT_GET(DT_CHOSEN(zephyr_console)) to get
chosen "zephyr,console" node.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This adds support for the TI INA219 Zero-Drift, Bidirectional
Current/Power Monitor with I2C Interface
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
bugfix: NULL termination is required by
dns_resolve_reconfigure API so null terminate the DNS
server list.
Fix checkpatch warning.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Include sys/atomic.h instead of sys/atomic_builtin.h, so that build for
platforms with non-default atomic implementation will still succeed.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
net_buf_skipcrlf() will remove all \r\n characters from the buffer.
If the data after CONNECT\r\n contained \r or \n it would
be removed, resulting in dropped data.
Fix this to only remove two bytes to ensure data is not dropped.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Change socket RX trailer (EOF) missing to warning and
keep socket RX data instead of discarding.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
So far pcie_get_mbar() has been the only way to retrieve a MBAR. But
it's logic does not fit all uses cases as we will see further.
The meaning of its parameter "index" is not about BAR index but about
a valid Base Address count instead. It's an arbitrary way to index
MBARs unrelated to the actual BAR index.
While this has proven to be just the function we needed so far, this has
not been the case for MSI-X, which one (through BIR info) needs to
access the BAR by their actual index. Same as ivshmem in fact, though
that one did not generate any bug since it never has IO BARs nor 64bits
BARs (so far?).
So:
- renaming existing pcie_get_mbar() to pcie_probe_mbar(), which is a
more relevant name as it indeed probes the BARs to find the nth valid
one.
- Introducing a new pcie_get_mbar() which this time really asks for the
BAR index.
- Applying the change where relevant. So all use pcie_probe_mbar() now
but MSI-X and ivshmem.
Fixes#37444
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is the configuration of the stm32h723 where the
dma1 & dma2 of type V1 with a MUX. Even if DMA is of type V1,
the 'feature' does not exist with DMAMUX
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The RT1170 platform adjusted the result parameter in the callback
function to be a uint64_t. The adjustment is to conditionally change
the callback definition and then cast the result value to a size that
fits the reported values across the various SOCs.
With error results, cast result to uint64_t and modified the called
function to print a uint64_t value.
With the RX/TX status, result is a MB value that doesn't exceed 64
so the result value is cast down to a uint32_t.
Fixes#37691
Signed-off-by: David Leach <david.leach@nxp.com>
1. Add support for NXP LPC USB controller
2. Do not check the return value from the
kUSB_DeviceControlRun command as not all SDK drivers
return a value
3. Use the kUSB_DeviceControlPreSetDeviceAddress
command to set device address
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Enable PWR clock unconditionally for L4, L5 and U5
like it is done on other stm32 series
Fixes#37781
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The delay will ensure last byte has been latched in before
This also change the method of reading status register from re-send
read status command on each read to read status register continuously.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When there is no grove sensor driver enabled, cmake warns
that the library has no sources. Fix that by adding
a new kconfig to be used by CMake to selectively
include the grove directory.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When there is no sensor driver enabled, cmake warns that
the library has no sources. Fix that by wrapping cmake
library instructions inside kconfig.
Fixes#37765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When there is no console driver enabled, cmake warns that
the library has no sources. So only include the console
directory when CONFIG_CONSOLE is enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Detect failed transmissions using `lora_send` by only waiting for some
multiple of the actual on-air time before giving up.
We use this instead of the inbuilt TxTimeout functionality because the
value of this timeout is set by `lora_configure`, and therefore doesn't
change with different packet lengths. This is a limitation of the
underlying `RadioSend` function, not the Zephyr driver.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Change the behaviour of `lora_send` to block until the transmission
completes. The current asynchronous behaviour is exposed through the
new function `lora_send_async`. This naming convention brings LoRa in
line with other asynchronous subsystems.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
1. Do not throw an error when FSL_FEATURE_USDHC_HAS_HS400_MODE
is defined
2. Add support for the case when the card detect is handled
by the USDHC module
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The original NIOS-II developer and former vendor is Altera, which is
now part of Intel. Let's not add a new vendor prefix for something
that already exists and has been acquired; move it to use the existing
'altr,' prefix instead.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Rename:
- grove,light to seeed,grove-light
- grove,temperature to seeed,grove-temperature
The "grove" brand applies to a family of products by Seeed (sic):
https://www.seeedstudio.com/category/Grove-c-1003.html
Therefore we should use the existing vendor seeed.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
I can't find any reference anywhere showing that the manufacturer of
the LPD8803 or LPD8806 LED scripts is a company called 'colorway'.
Use 'greeled' instead; these seem to actually be manufactured by
GreeLed corporation.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
It should be "maxim,max30101", because the vendor prefix for this
company is "maxim", not "max".
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
It should be "u-blox,sara-r4", because the vendor prefix for this
company is "u-blox", not "ublox".
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This PR will change accessing the related pinctrl macro from soc_dt.h
And the pinctrl of SCL and SDA were got from pinctrl-0 and pinctrl-1,
respectively. Change it to get from pinctrl-0 only.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This adds the driver for Omnivision OV2640 image sensor.
The driver provides support for 10 different resolutions in range from
160x120 to 1600x1200 in both JPEG and RGB565 pixel formats. There are
also mutliple configuration options, e.g. hflip, vflip, saturation and
brightness control.
Signed-off-by: Robert Szczepanski <rszczepanski@antmicro.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some display drivers may actually be initialized after LittlevGL
as those drivers and LittlevGL's lvgl_init() all have SYS_INIT()
at APPLICATION and init priority the same as application init
priority. Depending on how the final binary is linked, these
drivers may initialize after lvgl_init() resulting in it not
able to find a display driver. This changes the value of
CONFIG_DISPLAY_INIT_PRIORITY so that the display drivers that
make use of this kconfig are initialized a bit earlier to
ensure that they are actually initialized before lvgl_init().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Note that the include to subsys has been moved from
under the drivers into subsys, as it is actually
the subsystem's job to make sure the include
directories are correct.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a, simply
build a separate static library for the top level of sensor
drivers. Also, for those that were not building its own
static library, make them do so as majority of sensor
drivers are building their own static libraries.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Note that the include to subsys/bluetooth has been
moved from under drivers/bluetooth to subsys/bluetooth,
as it is actually the subsystem's job to make sure
the include directories are correct.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting the object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This changes the build command so the I2C EEPROM slave
is being grouped into the I2C static library.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This changes the init priority of native posix console to 99.
When building for native_posix, it is usually assumed that
the output would be stdout. With old priority at 60, UART
console, for example, can be initialized later which means
printk() would not go to stdout. So changing the native posix
console to be (hopefully) initialized last.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The STM32_DMA_SLOT macro from include/drivers/dma/dma_stm32.h
must be used here, especially for dma of type v2bis.
In this case, the dma-cell is not defined and slot is null.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The log level was always set to debug. Defining BT_DBG_ENABLED same
as for other bluetooth files allows to switch off debug log messages.
Signed-off-by: Martin Jäger <martin@libre.solar>
The current code uses dev->data for finding back the instance data
structure in various places, but for the dio1 irq callback, dev refers
to the GPIO device node (not the LORA radio one), so dev->data returns a
pointer to the GPIO data rather than a "struct sx126x_data".
Fix that by using CONTAINER_OF to find back the correct structure from
the callback pointer.
The bug was introduced in:
74efaa920a drivers: sx126x: refactor few functions for stm32wl support
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
LOG_INF: It's meant to write generic user oriented messages.
LOG_DBG: It's meant to write developer oriented information.
use LOG_DBG instead of LOG_INF to hide debug message.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Updating to the SDK 2.10.0 for select platforms.
west.yml:
- Update to point to the NXP HAL update with SDK 2.10.0 files
- modules/tee/tfm needed to be updated to synchronize the
LPCXPRESSO55S69 platform SDK to version 2.10.0 to be in sync
with Zephyr usage of SDK 2.10.0
drivers/counter/counter_mcux_pit.c:
- underlying SDK 2.10.0 adjusted the setting by -1 so need
to adjust the reported value set by +1
drivers/ethernet/eth_mcux.c:
- SDK2.10 ethernet driver provided an assert test that highlighted
we were using the wrong clock source on various platforms.
drivers/memc/memc_mcux_flexspi.c:
- SDK2.10 added compile time conditional on whether a field was
defined for the flexspi configuration structure.
Signed-off-by: David Leach <david.leach@nxp.com>
Max SPI chunk len was missing from the
implementation, causing SPI to hang up in some
conditions.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
add flow_ctrl filed and give it initialized value
based on hw_flow_control.
Initialize mcux lpuart based on flow_ctrl
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
This introduces a new kconfig CONFIG_DISPLAY_INIT_PRIORITY
to specify the initialization priority for display devices.
Most of the display devices are using APPLICATION and
CONFIG_APPLICATION_INIT_PRIORITY which is not entirely
appropriate for devices. Due to linking order, the display
device may be initialized after application code at same
init level and priority. This results in the display device
not ready to be used for application code. So this kconfig
option allows the display devices to be initialized earlier
if needed.
For the drivers using CONFIG_APPLICATION_INIT_PRIORITY,
they have been changed to use CONFIG_DISPLAY_INIT_PRIORITY
instead.
Note that the default value for CONFIG_DISPLAY_INIT_PRIORITY
is the same as CONFIG_APPLICATION_INIT_PRIORITY at 90 to
avoid any functional changes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add ADC driver version 2 for MEC172x using new in-tree headers
and device tree properties. Update the ADC shell for the new driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add config macro to set interrupt as level triggered for ARM CPUs
Merge all timer configures into one place, then no need to overwrite
hpet_timer_conf_get/set() functions in SoC layer
Make hpet_timer_comparator_set() as the only register access function
to implemented in the SoC layer
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
According to Atmel SAM datasheet when writing data to the latch buffer
"32-bit words must be written continuously, in either ascending or
descending order. Writing the latch buffer in a random order is not
permitted." To enforce the requirement we need to call a memory barrier
instruction after copying every word of data to the latch buffer. In
the absensce of __DSB() call the ARM processor is free to change order
of AHB transfers. This has caused the driver to occasionally corrupt
data programmed in the flash.
Fixes#37515
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
When enabling MSI & MSI-X, the code seemed to handle fallback to MSI
when MSI-X is not available, but the logic uses MSI-X even if not
available and the MSI path never gets used.
Fixes: a2491b321e ("drivers/pcie: Add support for MSI-X")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
When building on non-X86 platforms K_MEM_PERM_RW gets undefined.
Fixes: a2491b321e ("drivers/pcie: Add support for MSI-X")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Convert ws2812 LED strip driver to `spi_dt_spec`. Also moves the init
function implementation outside the declaration macro.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Convert the at2x eeprom driver to `spi_dt_spec` and `i2c_dt_spec`.
I2C functions are not fully converted due to the non-standard addressing
scheme.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Microchip XEC has been using the standard NS16550 driver.
Using the standard NS16550 driver requires extra HW programming
for XEC UART in board level and did not support XEC GIRQ interrupt
programming. We add an XEC specific driver and remove UART specific
register programming from the board level and implement interrupt
support. Also, by implementing a SoC specific driver we can add
driver PM in the future.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
based on uart rom functions, also enable console driver
on top of this driver, which enables logging
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Add optional support for the DRDY/INT pin. This avoids waiting a fixed
time for the temperature and humidity conversion to finish.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Soft-reset the TI HDC20XX sensor during init to bring all registers in a
known and consistent state.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The temperature and humidity samples are 16 bits long and can therefore
fit in a uint16_t variable. This save 4 bytes of RAM.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Some STM32 SOC, like stm32h745 and stm32h747 doesn't have IPCC.
Provide a STM32 HSEM based ipm driver for these SOC.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Make the `lora_recv` operation thread safe by copying memory directly
in the callback instead of deferring copying to the original caller.
To ensure pointer validity, this requires performing operations "inside"
the `modem_release` context.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Ensure that the modem is not asked to perform new operations before the
previous operation completes.
An atomic variable is used instead of a mutex as multiple threads need
to release the lock. A semaphore isn't used as there is no indication
whether `k_sem_give` gives the semaphore or not, which is required to
determine if `Radio.Sleep()` should be run.
`Radio.Sleep()` is only ever run by the context that successfully
releases the modem usage, to guard against double calls.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Transition the receive synchronisation method from a single driver
semaphore to a function specific k_poll_signal. This is required to
allow the modem to be released without introducing race conditions on
the signalling mechanism.
Without this change, the RX can either be signalled before the modem is
released, unblocking the calling thread before the modem is put back to
sleep, or after the modem is released, in which case a second thread
could start using the semaphore before the original thread is signalled.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
If no packet was received in the provided timeout, manually transition
to sleep mode. If a packet was received, the rx_done callback
automatically transitions the modem to sleep.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Fixes issue 34879
This PR updates previous PR's 37138 and 37139.
Refer to issue 34879 for information from MCHP HW
designers. A delay after enabling interrupts is a
more appropriate work-around than depending upon
behavior of ARM DMB instruction.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
RT platforms that support TRNG IP (rt10xx and rt6xx) need to set
RNG and CSRNG to Xoroshiro and CTR_DRBG respectively instead of
using TRNG as random source.
Fixes: #37307
Signed-off-by: David Leach <david.leach@nxp.com>
This is a follow-up to commit 3656ba5ae9.
Do not enforce pull-up resistors to be enabled on RXD and CTS pins
in nRF UART drivers, as in certain hardware designs this may be
undesirable or may even make certain hardware not working.
Instead, provide devicetree properties that allow enabling of those
resistors when it is actually needed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Driver's RX thread can wait some time before a free buffer is available.
When resources are limited we can easily run out of them.
Fixes#36891.
Signed-off-by: Jan Pohanka <xhpohanka@gmail.com>
Extended driver configuration in device tree to enable ZLI interrupt.
When zli is set in the device tree then event handlers for alarm and
top is called in ZLI interrupt context. It means that kernel primitives
cannot be used there.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Extended driver configuration in device tree to enable ZLI interrupt.
When zli is set in the device tree then event handlers for alarm and
top is called in ZLI interrupt context. It means that kernel primitives
cannot be used there.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Before entering initialization mode, we left sleep mode, then request
to leave again sleep mode before returning from can_stm32_init() is
useless.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Disabling the time-triggered communication mode (TTCM) is done twice in
the setting of the master control register (MCR). So, let's remove the
second.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The driver only support use case where the channels are used in mutual
exclusion.
Origin: Original
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
Fix for issue 34879.
Microchip MEC GPIO hardware can trigger a spurious interrupt when
interrupt detection is set to edge mode especially falling edge mode.
Clearing the status immediately after enabling interrupt detection does
not work because the hardware takes a small number of AHB clocks to
set the status. After interrupt detection enable we use an ARM data
memory barrier to insure the write completes before clearing spurious
status and enabling the interrupt in the GIRQ.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Deprecate the xoroshiro128+ PRNG algorithm in favour of xoshiro128++.
xoshiro128++ is a drop-in replacement which is invisible from the user
perspective.
xoroshiro128+ is unsuitable because it is explicitly a floating-point
PRNG, not a general-purpose PRNG. This means that the lower 4 bits of
the output are actually linear, not random (from the designers,
https://prng.di.unimi.it/). This means 1/8th of the generated data is
not random.
Additionally, xoroshiro128+ is not a 32bit algorithm, it operates on
64bit numbers. For the vast majority of Zephyr devices, this makes the
PRNG slower than it needs to be. The replacement (xoshiro128++) is
32bit, with no loss in state space (still 128 bit).
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit adds flash driver in non-secure mode for stm32l5x
series with icache enabled. This commit also adds a flash
programming error status check applicable for all platforms
except stm32f1 series.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Instead of passing target states, use actions for device PM control.
Actions represent better the meaning of the callback argument.
Furthermore, they are more future proof as they can be suitable for
other PM actions that have no direct mapping to a state. If we compare
with Linux, we could have a multi-stage suspend/resume. Such scenario
would not have a good mapping when using target states.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
According to the documentation the OFF state has to be used when the
devices is fully turned off, ie, power removed. Most drivers were using
a sort of fall-through for all non-active states, leading to behaviors
not following the specifications.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Return -ENOTSUP if the requested state is not supported
- Remove redundant "noop style" functions.
- Use switch everywhere to handle requested state (not necessary in all
drivers, but better take off with consistency in place after current
changes).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The verb tense for the suspended state was not consistent with other
states. The likely reason: state was being used as a command/action.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The difference between low power and suspend states is a thin blur line
that is is not clear and most drivers have used indistinctly. This patch
converges to the usage of the suspend state for low power, since
contrary to the low power state, it is used by both system and runtime
device PM. The low power state is still kept, but its future is unclear
and needs some discussion.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some devices are using PM_DEVICE_STATE_FORCE_SUSPEND as a sort of low
power state, something that is not correct. In fact, this state is not
an actual state and will be eventually moved, if found necessary, to an
action or command.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device PM control function will only be called if the requested
state is different from the current one. A significant amount of drivers
were checking for state changes, now unnecessary. This patch removes all
this redundant logic.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Since the state is no longer modified by the device PM callback, just
use the state value.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The callback is now invoked to set the device PM state in all cases, so
the usage of ctrl_command is redundant.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device PM subsystem already holds the device state, so there is no
need to keep duplicates inside the device. The pm_device_state_get has
been refactored to just return the device state. Note that this is still
not safe, but the same applied to the previous implementation. This
problem will be addressed later.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Update the Microchip XEC pinmux driver to use system I/O
routine for read/write of registers instead of direct use
of volatile and CMSIS defines. Add GPIO port number to
bindings instead of using hard coded value from chip headers.
Modify SoC DTSI pinmux syntax, requires "pinmux: pinumx {..."
or the DT macros will not work. Since pinmux is used by MEC152x
we update its chip pinmux DT.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add support for TI TLC59108 an I2C 8-bit LED driver.
Supported blinkink period: 41ms to 10730ms
Supported brightness value: 0 to 100%
This driver supports the following APIs:
1. led_blink
2. led_set_brightness
3. led_on
4. led_off
This is a modified version of the NXP PCA9633 driver.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
The USB configuration option is actually a global switch
to enable USB drivers in general, but currently only
the device controller drivers are meant.
USB device controller drivers also have USB_DEVICE_DRIVER option.
Thus the option USB is actually redundant and can be replaced
by the self-explanatory option USB_DEVICE_DRIVER.
The name USB itself is not unique and should not be used as an
configuration option.
With these changes the option USB_DEVICE_DRIVER generally
enables USB device controller drivers. The option USB_DEVICE_STACK
enables USB device support. It is sufficient to enable only option
USB_DEVICE_STACK because it selects USB_DEVICE_DRIVER.
CONFIG_USB Kconfig option is temporary added to subsys/usb/Kconfig.
This is necessary to pass CI and will be removed again
when the USB configuration has been adapted in modules.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
based on uart rom functions, also enable console driver
on top if this driver enabling logging
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
The LL_ADC_ConfigOverSamplingRatioShift function for
the stm32H7xx soc serie differs from other for the 'ratio':
"This parameter can be in the range from 1 to 1024"
Note that in the stm32h7xx_ll_adc.c the LL_ADC_OVS_RATIO_xxx value is
defined for ADC of type ADC_VER_V5_V90.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Use macros and types from usb/usb_ch9.h header where it
is possible. This patch also adds local macros, USB_REQTYPE_GET_DIR
and USB_REQTYPE_GET_TYPE, which is an intermediate solution and
these will be removed later.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add watchdog support to the mimxrt685 platform.
The mimxrt685 platform is excluded from the watchdog
test case because the test case uses variables in the
noinit section that need to be retained through a reset
but the rt685 does not retain this memory through a
reset.
Signed-off-by: David Leach <david.leach@nxp.com>
When building tests/drivers/build_all/modem on native_posix_64 we get:
modem_cmd_handler.c:545:9: error: ret may be used
uninitialized in this function
[-Werror=maybe-uninitialized]
Fix by adding simple initialization of ret = 0 at start of function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Texas Instruments TCA9538 is an 8 pin GPIO port expander.
It operates on an I2C bus with 2 configurable address pins. The
device has an interrupt output pin that is asserted when any pin
configured as an input changes state.
Added under the PCA953X name to allow other similar parts to
use the same driver.
Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
After powering-on the sensor, and before every measurement, it loads
the NMV. We must wait until this process is completed otherwise
we will read weird values.
Since it was observed that the time may be a bit long after a cold
start, it is more convinient to just wait until the sensor iready,
without a timout.
Signed-off-by: Efrain Calderon <efrain.calderon@aquarobur.com>
To ensure that we have the same behaviour with a power cycle
and by pressing the reset button, we can perform soft reset
in `bme280_chip_init()`.
Signed-off-by: Efrain Calderon <efrain.calderon@aquarobur.com>
Microchip MCP7940N is a Real-Time Clock/Calendar. It operates on a I2C
bus. It can be used to set a calendar time and has two alarm channels.
When an alarm is asserted the state of the MPF pin of the MCP7940N will
change (depending on gpio active high/active low setting) to trigger an
interrupt.
Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
Add Atmel sam0 sercom[uart] pinctrl bindings and implements pinctrl at
driver level. It changes all sam0 boards to use new feature and remove
pinmux driver dependency for sercom[uart]. The samples that require a
binding were update to keep consistency and avoid errors.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Introduce soc_port common functions. The sam0 pinmux driver was
refactored to use soc_port_pinmux_set common function.
This create the common base to implement sam0 pinctrl functions.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Busy check APIs now return boolean type. Due to that change, the
function names have also been adjusted. The common name pattern for
boolean check type APIs is "PREFIX_is_CONDITION". For example,
"pm_device_is_busy". pm_device_busy_check has been renamed to
pm_device_is_busy and pm_device_any_busy_check to pm_device_is_any_busy.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The following device busy APIs:
- device_busy_set()
- device_busy_clear()
- device_busy_check()
- device_any_busy_check()
were used for device PM, so they have been moved to the pm subsystem.
This means they are now prefixed with `pm_` and are defined in
`pm/device.h`.
If device PM is not enabled dummy functions are now provided that do
nothing or return `-ENOSYS`, meaning that the functionality is not
available.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
TI recently released a new version of the HDC2080 datasheet, which
slightly update the temperature conversion formula, with a temperature
offset of -40.5°C instead of -40°C. Adjust the code accordingly.
In addition the datasheet also describes a voltage dependent
compensation of -0.08°C/V above 1.8V, however it's not something easily
doable with the current sensor framework, so just ignore that part.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Microchip HAL update used by MEC152x projects with eSPI
definition changes. Remove hack from XEC ESPI driver since
the missing symbol is in the HAL.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The STM32 G0, G4, H7, L0, L4, WB and WL series have hardware support for
oversampling. This patch adds support for it, using the oversampling
value provided in the adc sequence. The result is shifted right
accordingly to not change the resolution of the measured value, like it
is done on other ADC drivers.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Driver does not correctly take ic out from sleep mode on init.
Added logic to update mode register on init to take the leddriver
out from sleep mode.
See datasheet for register details.
Fixes#37180
Signed-off-by: Daniel N. Hansten <dnh2000@gmail.com>
Add clock_control driver to stm32u5 support.
For this series, now deprecated STM32 clock Kconfig symbols
are not added.
Due to a divergence in MSI clock definition, PLL1 use
instead of PLL and lack of sufficient abstraction abstraction
for these a dedicated file has been added.
This should be reshuffled:
- once a better abstraction is provided by LL API for these
- when some stm32 clock control driver rework will be done
after complete removal of Kconfig STM32 clock symbols.
Tested in MSI, HSI, PLL based HSI and PLL based MSI.
Not tested on HSE due to lack of compatible hardware.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixed the following assertion causing by high level functions
enable gpio interrupt at the same pin at least two times:
ASSERTION FAIL [!arch_irq_is_enabled(irq)]
@ ZEPHYR_BASE/arch/common/sw_isr_common.c:84 IRQ xxx is enabled
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This is more or less the flow of AT+CIPSEND:
RX TX
-- --
AT+CIPSEND=<...>
OK
>
<data to be sent>
SEND OK / SEND FAIL
'sem_response' semaphore is released by receiving 'OK'. Then after
receiving '>' (which releases 'sem_tx_ready' semaphore) actual data is
sent. Waiting for 'SEND OK' or 'SEND FAIL' is implemented by waiting on
'sem_response' (the same as for 'OK'), which mean that resetting this
semaphore just after sending all data is racy.
Fix that race condition by resetting 'sem_response' just after receiving
'OK', so that neither 'SEND OK' nor 'SEND FAIL' will appear yet (they
will not be sent as long as we won't send whole payload).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Sending AT+CIPSEND=<...> command results in following reply:
OK
>
modem_cmd_send_nolock() invocation was setting command handlers for '>',
but as 'OK' was received first, it was handled as a generic reply. After
receiving 'OK' this function was unsetting command handlers. Then
modem_cmd_handler_update_cmds() was called once again in order to
register '>' handler once again. There was a small period of time where
'>' was not being handled at all.
Fix that race condition by using just introduced modem_cmd_send_ext(),
which allows to leave commands handlers in place and get rid of race
condition where expected command could be missed.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There are currently modem_cmd_send() and modem_cmd_send_nolock()
functions, each with slightly different behavior regarding acquiring (or
not) sem_tx_lock. Introduce a generic function that will allow caller to
select behavior using flags.
While at it, add possibility to disable setting and unsetting command
handlers. This will be useful in situations when there are multiple
replies expected one after the other coming as a response to single
command. This is the case for example with ESP-AT driver, which expects
following data as response to AT+CIPSEND command:
OK
>
where 'OK' is handled by static CMD_RESP (so releasing response
semaphore right away), while '>' is handled by dynamic
CMD_HANDLER (which is releasing another semaphore). Keeping command
handlers in place allows to receive '>' without race condition because
of small period of time where command handlers are not set.
Convert modem_cmd_send_nolock() and modem_cmd_send() to static inline
functions, as they are just a specific invocation of
modem_cmd_send_ext() function.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add a shim that allows using the nrfx I2S driver via the Zephyr API.
Add also missing devicetree nodes representing the I2S peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-i2s" binding with a new property that allows
specifying the clock source to be used by the I2S peripheral (so that
it is possible to use HFXO for better accurracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Create version 2 of the MEC GPIO driver to support MEC172x to not
interfere with MEC152x. When the MEC172x ECIA interrupt aggregator
driver is ready, this driver will use ECIA for registering GPIO
interrupt callbacks instead of maintaining its own interrupt table.
Add V2 DT binding.
Add the Kconfig configuration settings for the MEC172x GPIO
V2 driver at the SoC and board level.
Add port id to DT allowing use of DT FOR EACH macro in the driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This driver supports the TI INA230 and INA231 Bidirectional Current
and Power Monitors. The devices work on the I2C interface and are
created from DT nodes with a compatible property matching "ti,ina23x".
The following datasheets were referenced while developing the driver:
https://www.ti.com/product/INA230https://www.ti.com/product/INA231
Twister passed:
twister -T tests/drivers/build_all/sensor/
Testing was performed on the stm32g071b_disco board with the following:
Load: ~170 ohms
Voltage: 5V
Measured Values:
Voltage: 5.1 V
Current: 0.032 A
Power: 0.157 W
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Use `dma_reload()` instead of `dma_config()` within DMA callbacks. This
significantly shortens time required to reconfigure DMA engine to
transmit / receive the next data block and allows to configure higher
I2S bus data rates.
The maximum I2S data rate supported by the driver is still lower than
that of underlying hardware. To fully support hardware capabilities the
I2S driver would have to use scatter-gather / linked-list DMA transfer.
This is currently not supported by the DMA driver.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Update Microchip XEC RTOS timer driver adding MEC172x support and
using more device tree properities in the driver. We must also update
the XEC counter driver to use the new GIRQ DT properties.
Add new properties to RTOS timer and RTC timer YAML. These two timers
are linked due to option using a high speed timer for kernel busy wait.
Add Kconfig logic for XEC RTOS timer to MEC172x SoC.
Enable the Microchip XEC RTOS timer in the MEC172x evaluation board.
Add device tree nodes for most peripeherals.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The KBC/ACPI event data is 4-byte in width and composed of
event/data/type fields. However, the field position is defined by each
chip vendor via macro and not unified in the current implementation.
The commit uses the structure bit field to define and unify the field
position. It helps the application access it with a common approach.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change DSA API to use `net_if` directly to make API calls instead of
indirectly via `dsa_context` and `switch_id`.
Remove unused `switch_id`, `switch_enable_port`, and `dsa_get_context`.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Changed slave interface initialization code to be more generic and less
dependent on a specific number of ports.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Changed port numbers to start at zero since they're used as indexes
into various arrays in the code.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
In the eeprom read operation, when rambuf was available
mutex was not unlocked after the read. Consequence of that is
that device was blocked after that read for incoming operations.
This commit fixes the issue
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Add driver implementation and header files for a MEC172x
aggregated interrupt driver. Enable the parent(ECIA) node
to have the driver initialize interrupt hardware for use.
Enable child nodes for those GIRQs used for aggregation.
Refer to chip documention for the list of GIRQs restricted
to aggregation and those which support direct mode.
Add chip level device tree node for MEC172x EC interrupt
aggregator parent and GIRQ children. Each child node contains
a list of sources representing the source bit position in the
GIRQ registers.
Add DT bindings for ECIA and GIRQ nodes.
Add build file(s) and configuration items for the MEC172x ECIA
aggregated interrupt driver. Add and enable the MEC172x interrupt
driver on the MEC172x evaluation board(EVB). Enable parent node to
initialize ECIA hardware. Child nodes are left disabled until a
future driver needs them.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add basic counter driver based on Timer Counter (TC) module for Atmel
SAM family.
Remarks:
- The driver is not thread safe.
- The driver does not implement guard periods.
- The driver does not guarantee that short relative alarm will trigger
the interrupt immediately and not after the full cycle / counter
overflow.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Change naming of TC_CHANNEL to TcChannel in Tc struct to align with
a new convention used by samv71, samv71b series.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
According to the Reference Manual of several series(G0,L5,WL,WB,...)
RNG_DR register value should only be used if it is different from 0:
"Because when it is the case a seed error occurred between RNG_SR
polling and RND_DR output reading (rare event)."
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces an automatic recovery procedure in cases an
entropy source error was detected.
- On Series with soft reset support a soft rest is executed.
- On Series w/o soft reset support the pipeline is cleared by reading
the RNG_DR 12 times.
With this changes the check for seed errors uses SEIS flag instead
of the SECS flag.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Interrupt polarity register don't support rising and
falling edge triggered at the same time, so I correct
logic operation to match this.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
This commit adds crypto support for several series which have
the same/very similar or same AES IP.
This includes G0, G4, L5, WL.
WB is also very similar but, expects the app to load the key via CKS.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
z_smp_init() is only available if CONFIG_SMP is defined,
smp_timer_init() also depends on two Kconfig parameters. Also make it
conditional in cavs_timer.c. Also clarify some SMP-related comments
there.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The irq will be enabled at the condition of start or repeat
start of I2C. If timeout occurs without being wake up during
suspend(ex: interrupt is not fired), the irq should be
disabled immediately.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add support for power management and the shutdown mode for bq274xx fuel
gauge sensor. This now allows boards that have any kind of low power
mode to turn on or off the sensor.
Tested on a Company's custom board with bq27421 sensor on it.
Signed-off-by: Luka Lopotar <luka.lopotar@greyp.com>
The flag source_periph seems to be incorrectly set in dma_stm32.
In case the transfer direction is from periph to mem, then the
stream->source_periph is 1 (true) else it is false.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
All the macro for dma-cells are now in the
include/drivers/dma/dma_stm32.h header file.
So the include/dt-bindings/dma/stm32_dma.h is no more
useful and removed from #include.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The macro to set the element of the dma-cells for each peripheral
are defined in the dma_stm32 header file
and used in the periph driver (as dma client)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the dma V2bis which is particular DMA V2 instance for
stm32F1 and STM32L1 soc series. This DMA does not use the dma slot
Otherwise it is similar to version V2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Implement a clock control driver for Microchip MEC172x handling
configuring the 32 KHz input sources for the PLL and peripheral-32k
clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source
for both PLL and peripherals. MEC172x allows the two domains to use
independent 32 KHz sources. Device tree updated to provide addresses
of hardware used by the driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
the macro STM32_LSE_CLOCK is always defined and therefore systems
without lse crystals hang on startup.
Used #if instead of #ifdef.
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
Because these two functions are called from threads and ISR.
And they run a bit-wise OR operation on the interrupt registers.
So protect them to prevent race condition between thread and ISR
context where causing an interrupt won't enable as expected.
eg.
- Pseudo code of thread enable IER1's bit1:
1. load word from IER1 (0x40) and write into CPU register S1
=> S1=0x40
2. Or S1's bit1
=> S1=0x42
(But if an interrupt is triggered here)
3. Store word to IER1 from S1
=> IER1=0x42
(IER1 will be 0x42 not 0x43, IER1's bit0 is disable again due to the
race condition above)
-Pseudo code of ISR enable IER1's bit0
1. load word from IER1 (0x40) write into CPU register S2
=> S2=0x40
2. Or S2's bit0
=> S2=0x41
3. Store word to IER1 from S2
=> IER1=0x41
4. Go back to thread.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit adds a driver implementation for the LM75 I2C temperature
sensor.
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
reuse the lpc's lpadc driver for rt1170, modify the dts and add
some macro to shield some code of LPC series. Also add the
board support inside the tests/drivers/adc/adc_api/src/test_adc.c,
and a dts node:zephyr,user inside
samples/drivers/adc/boards/mimxrt1170_evk_cm7.overlay
Signed-off-by: Crist Xu <crist.xu@nxp.com>
This converts register access from macro to functions.
This allows SoCs to override these functions if needed.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the HPET timer to use kconfig to specify clock
frequency instead of relying on calculation at runtime.
When the frequency is known at build, this allow the toolchain
to optimize some calculations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This renames MIN_DELAY to HPET_CMP_MIN_DELAY, and also allows it
to be overridden. The default delay is for HPET with relative
high frequency, and may not suitable for all HPET
implementations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This extracts the hard-coded value into a macro which can be
overridden. This is in preparation for SoCs where the period
is not in femptoseconds.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch states that the Everlight B1414 LED controller is compatible
with the Worldsemi WS2812. Some information about it is added to the
WS2812 DT binding and driver Kconfig files.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Since this driver is working reliably, let's use k_usleep() instead of
k_busy_wait() (as suggested in a TODO comment) to latch and reset the
LED strip controller.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different reset/latch
delay.
This patch introduces the "reset-delay" optional property for the WS2812
DT binding and adds support to the ws2812_spi driver. This new property
allows to configure the reset/latch delay of a WS2812 compatible LED
strip controller from its DT node.
If omitted the driver uses 8 microseconds by default (which is good for
the WS2812 IC).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different channel to
color mappings (e.g. RGB, BGR, RGBW, etc).
This patch introduces the "color-mapping" required property for the
WS2812 DT binding and adds support to the ws2812_gpio and ws2812_spi
drivers. This new property allows to configure the color to channel
mapping of a WS2812 compatible LED strip controller from its DT node.
Since this property also allows to know if a white channel is available,
then this patch removes the "has-white-channel" property.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
When DMA switches from one buffer to another ENDRX followed by
RXSTARTED is generated. Code flow assumes that ENDRX will be
handled before RXSTARTED but this may not be the case if there
is a short between ENDRX and RXSTARTED and event occurs after
ENDRX event check but before RXSTARTED event check. In that case,
RXSTARTED event is handled first. Such case may happen if there
is a higher priority interrupt that may preempt UARTE interrupt
handler.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add a new property to the "nordic,nrf-clock" binding to allow
configuration of the HFCLKAUDIO frequency.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactors the mcux lpc driver to use DT_INST_FOREACH_STATUS_OKAY instead
of hardcoding each instance. Tested with samples/basic/button and
samples/basic/blinky on mimxrt685_evk_cm33.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In certain build cases we get the following compiler warning:
i2c_rcar.c: In function 'i2c_rcar_transfer_msg':
i2c_rcar.c:168:6: warning: 'ret' may be used uninitialized in
this function [-Wmaybe-uninitialized]
Fix this by initializing ret to 0 at start of function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit aligns the nRF5 ieee802154 driver with the latest
API changes necessary to handle security-related flags properly.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
RTC interrupt was reading CC value and passing it to the handler.
However, higher priority interrupt could preempt RTC interrupt
and set new CC value. In that case CC value read in the RTC
interrupt context was not the one that triggered the interrupt.
Added fallback to COUNTER value if that case is detected.
Using COUNTER is not as precise as CC because it returns time
when event was handled and not when event occured but it is the
only option since CC value is overwritten.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The zephyr sam gmac driver don't get register address and, in some
cases, peripheral id from devicetree. This replace headers constants
in favor of devicetree values.
This fix wrong Atmel SAME7x/SAMV7x gmac register address and add
missing peripheral id property for SAM family.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current GMAC compatible not allow especialize properties by SoC
family. Split current generic Atmel GMAC compatible into two new
compatibles which are defined by SoC families. This increase the
freedom and avoid odd situations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Assuming gpio devices are required by pinmux which is used
by any device make it a device that is initialized in preliminary
steps of platform init.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move GPIO devices clock handling in stm32_pin_configure function
which is also used in stm32_setup_pins.
Additionally, add device usability check to be sure gpio driver
was initialized before being used by pinmux pseudo driver.
Last, going from the assumption that GPIO devices should be
initialized before being used by pinmux, then there is no need
to enable clock in case CONFIG_PM_DEVICE_RUNTIME=n.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for the STM32WL integrated radio, based on the sx1262. The
STM32WL implementation does not use any GPIO, and the signals are routed
to other units of the SoC and accessed with the ST HAL.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Convert the standalone part of the sx126x driver to the new gpio_dt_spec
APIs. This allows moving the specific GPIOs in that part of the driver
and out of struct sx126x_data.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This adds support for controlling the SUBGHZSPI NSS line in STM32WL
devices. This is a special dedicated SPI port only connected to the
radio device internally, chip select happens through a bit in the PWR
module. Adding a special dt-property to identify the port, it all gets
built out on non-WL devices.
Deduplicate the existing dts bindings in the process, and add the new
one for the special spi with the new property.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Current impĺementation fails due to missing stop bit
when reading data. This fixes it and refactor the implementation
by adding k_busy_wait when waiting I2C bus completion.
Also, this implementation is based on esp-idf v3.0.
It will be refactored based on latest esp-idf v4.3 using proper
low level calls.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Fixes#34015
The STMPE1600 is an I2C based GPIO expander. This initial patch
only supports reading from/writing to the pins on the STMPE1600,
and there is currently no support for interrupts.
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
To be able to get a tokenize DT string without the quotes. Deprecate
also DT_ENUM_TOKEN and DT_ENUM_UPPER_TOKEN.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Fix a couple of issues related to Power Management:
1. A build error because 'dev' was used even if not declared
in the caller routine scope
2. The lis2mdl power management init specific routine was
not declared in in the device instance definition
Signed-off-by: Armando Visconti <armando.visconti@st.com>
So far modem API used UART device names / labels. Change API to operate
on device pointers instead, so that we stop using device_get_binding()
in modem core and in some DT compatible modem drivers.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
When stopping the interface, also abort the RX routine and enable RF
power saving. Will re-start RX on iface start.
Also fixed a bug with `cmd_fs` crashing at RF wakeup because `rf_mode`
was allocated on stack.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
CRC16 was removed by simply decreasing length of the last fragment by 2.
This worked as long as last fragment was longer than 1 byte. If not,
then last fragment was corrupted (its length ended up being 65535),
leading to undefined behavior.
Fix CRC16 removal by utilizing recently introduced
net_pkt_remove_tail(), that properly handles multiple fragments.
Reported-by: Jim Paris <jim@jim.sh>
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
If a write offset isn't a multiple of the nor page size, and the
length is too large to fit within a single page, it could wrap around
in that page.
Tested on i.MX RT1064 internal flash using NVS settings
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
replace custom crc8 with sys/crc8
use sys_put/sys_get helpers for byteorder specific operations
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add driver for sensirion consumer humidity sensor line.
Supports shtc1 and shtc3, but only shtc3 is tested.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Instead of waiting forever for the SPI transfer to complete, let's use
a timeout value and bail out if elapsed. The timeout value logic is,
xfer_len/frequency + tolerance
Tolerance value can be modified using a Kconfig symbol,
CONFIG_SPI_COMPLETION_TIMEOUT_TOLERANCE. It defaults to 200ms.
Fixes: #33192
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Fix macro used in g4 file to enable LSE clock.
Then, to avoid no-op configurations, generate an error
when MSI Hardware auto calibration is selected but LSE
clock is not enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This PR addresses radio signal stength measurement during
and before PPP session. The PR provides provides facility
of readout for both +CSQ and +CESQ versions depending
upon the modems. This PR follows the idea of rssi readout
of PR#35496. Additionally, reliable Cell info update
is also ensured.
Signed-off-by: Tahir Akram <mtahirbutt@hotmail.com>
This patch add support for I2C on the Renesas R-Car.
This I2C hardware block can be found on various Renesas R-Car
SoC series.
It allows to perfom read and write on I2C buses in an
interrupt based way on R-Car Gen3 H3ULCB board.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add NXP Kinetis Low Power Timer (LPTMR) OS timer driver shim. Since the
LPTMR does not support asynchronous changes to the timer period, only
non-tickless mode is supported.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The config/data casts are not strictly necessary. Furthermore, config
was being casted to non-const.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Use the recently introduced struct gpio_dt_spec to store GPIO
information and operate with them.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This is called in ISR context and timeout must be set
to K_NO_WAIT.
Reported-by: Pieter De Gendt <pieter.degendt@basalte.be>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit adds a serial dummy driver compatible to vnd,serial.
This is needed that devices can access the uart device in tests
like tests/drivers/build_all/... .
Add myself as codeowner to avoid complicance check failure.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use GPIO output high and low to simulate I2C start and stop
conditions to restore i2c to normal.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Create the pinmux phandle to the I2C driver node in the
devicetree. When the pinmux_pin_set function in
i2c_it8xxx2_init can refer to the setting of this phandle.
It is more flexible to use.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The SoC driver name is 'USB High-Speed Interface (USBHS)'. This rename
from usb_dc_sam to usb_dc_sam_usbhs allowing add others SoC drivers
like 'USB Device Port (UDP)' that is found at SAM4S/E variations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add single-register MMIO GPIO driver for complex cases where
only several fields in register belong to GPIO lines and each GPIO
line owns a field with different length and on/off value.
Such CREG GPIOs are used in Synopsys em_starterkit and HSDK boards.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
This commit add the support of "Interrupt driven UART"
to the R-Car UART driver and enable it in the related
Kconfig.
The driver is supporting nearly all the methods that are
described in the "Interrupt driven UART" part of the
uart_driver_api.
This new version of the driver has been tested on
H3ULCB board by running "uart_basic_api" test suite.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This commit adds entropy support for stm32wl and stm32g0.
Pll is used as clock source and has to be enabled,
other clock sources are not supported at the moment.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
To support single core stm32wlex series, cpu2 prescaler is set
only on dual core soc variants.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The callback is not used anymore, so just delete it from the pm_control
callback signature.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
the device PM callback is not used anymore by the device PM subsystem,
so remove it from all drivers/tests using it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Armv8-A and Armv8-R both support PSCI. So PM_CPU_OPS_PSCI's
dependency should be "ARM64" rather than "ARMV8-A".
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
There is a name clash when using G4 series LL TIM driver depending on
the inclusion order of the LL TIM and pinmux headers. If the LL headers
are included after pinmux is included, AF1 and AF2 definitions used by
pinmux clash with the AF1 and AF2 TIMx register names.
In order to solve this problem with minimum impact, the following has
been done:
1. Prefix the AFx and ANALOG definitions with STM32
2. In order to avoid changing all *-pinctrl.dtsi files, the STM32_PINMUX
macro contatenates STM32_ with the provided mode.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit adds a new Kconfig option CLOCK_CONTROL_NPCX_EXTERNAL_SRC.
With this option enabled, the internal 32.768 KHz clock (LFCLK) is
generated by the on-chip Crystal Oscillator (XTOSC). Otherwise, the
LFCLK is generated by the Low-Frequency Clock Generator (LFCG).
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
refactor flash_page_get_info to simplify and to avoid using mixing the
usage of an off_t (offs) and an uint32_t (page_index).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
In stm32l5xx soc, the LL_DMA_InitTypeDef has 2 more fields
(DoubleBufferMode and TargetMemInDoubleBufferMode) that must be
initialised with 0 else the configuration is wrong and gives
wrong values to the LL_DMA_Init function. Due to this the test
tests/drivers/dma/loop_transfer too would fail.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Fix some leftovers from the pm_device_state changes.
Fixes build problem introduced in
cc2f0e9c08.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This change ensures the CPU won't get an interrupt number which is
being generated.
it8xxx2 has a limitation for interrupt vector register.
CPU may read incorrect interrupt number in ISR.
The following is an example that got incorrect interrupt number:
1. Register IVECT = 0x10. (no interrupt pending/IVECT_OFFSET_WITH_IRQ)
2. Chip INT6 interrupt occurs (IVECT = 0x16) and jump to ISR.
3. Read interrupt vector register to determine interrupt number.
4. Higher priority interrupt occurs (for example: INT158, IVECT = 0xAE)
while the CPU is reading the interrupt vector register for EC INT6,
CPU may end up with an incorrect interrupt number between 0x16 and 0xAE.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
__LL_RCC_CALC_HCLK1_FREQ is only available for WL and WB series,
for other series __LL_RCC_CALC_HCLK_FREQ should be used.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The nRF QSPI has a configurable delay from the rising
clock signal to the actual sample point measured in
clock cycles. This commit exposes that delay as a DTS
parameter without modifying existing behavior.
Signed-off-by: Abram Early <abram.early@gmail.com>
The definition of qspi_flash_get_parameters, that implements
the mandatory get_parameters API call for the driver, was incorrectly
placed within block conditionally compiled when
CONFIG_FLASH_PAGE_LAYOUT is defined.
The commit fixes the issue that was causing compilation error
when the config has not been set.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
This commit selects LL_RCC_RNG_CLKSOURCE_CLK48 as a clock source
to rng peripheral. LL_RCC_RNG_CLKSOURCE_CLK48 is CLK48 divided by 3.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Add basic support for TI HDC20XX series (e.g. HDC2010, HDC2021, HDC2022,
HDC2080). It is able to get temperature and humidity in the default
14-bit resolution. Triggers, resolution selection, interrupt line, auto
measurement mode are currently not supported.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
For esp32c3 related ROM located functions instead
of esp32c3_rom.
Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
by adding the soc specific files such: soc initialization code,
linker scripts and support for esp32c3 devkitm
Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
hal_espressif repository was updated from esp-idf v4.2
to esp-idf v4.3 to allow latest Espressif chips integration.
As a consequence, it added a few changes in drivers
and peripherals. To maintain bisectability, changes in this
PR cannot be split. Here are some details:
wifi: update linker script by adding libphy and new attributes.
spi: update some APIs and fixed missing wait_idle check
west.yml: esp32: update hal to new version
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Move all PM_DEVICE_STATE_* definitions to an enum. The
PM_DEVICE_STATE_SET and PM_DEVICE_STATE_GET definitions have been kept
out of the enum since they do not represent any state. However, their
name has not been changed since they will be removed soon.
All drivers and tests have been adjusted accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If stream socket is marked as pending close, make sure that send()
caller gets notified about it, so that application layer can decide to
stop trying to send anything more.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far send errors were silently ignored. This is okay for
UDP (datagram) sockets, as there is no guarantee that packets will
actually be sent successfully. In case of TCP (stream) stream sockets
however, application layer expects network stack to send requested data
as stream, without losing any part of it.
In case of send errors on stream sockets mark that socket to be closed
and stop sending any subsequent network packets, so that data stream
won't have any holes.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Fix for Issue#35658.
Update the custom vector table to add the OS Event timer
interrupt which is used on RT685 as the kernel system timer
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit removes the huge if condition section and is
replaced with DT APIs to get the maximum erase time of a
stm32 flash from dtsi.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Commit c045cbd336 added support for internal voltage reference source,
but in practice only the temp sensor is supported. Fix that.
Also change the code to keep the existing paths so that VREFINT and
TEMPSENSOR can be used at the same time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Fix i2c emulated bus initialisation code to use children of specific i2c
bus DTS node instead of first i2c bus instance.
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
The patch fixes driver compile errors and ADC management for the f3x
series. It was developed and tested for the stm32f373 variant.
Tested-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Add the lptim1 device node definition and enable the corresponding
exti interrupt in sys_clock_driver_init().
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Converts the spi_nor flash driver to use `spi_dt_spec` as a
demonstration of the simplifications that the API enables.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Replace device_get_binding() with DEVICE_DT_GET to obtain the PS/2
controller and clock control device objects. It helps to improve the
efficiency for driver initialization as DEVICE_DT_GET is processed
at the link time rather than run time.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The PS/2 module in npcx provides a hardware accelerator mechanism
including an 8-bit shift register, a state machine, and control logic
that handle both the incoming and outgoing data. The hardware
accelerator mechanism is shared by 4 PS/2 channels. To support it,
this CL separates the PS/2 driver into channel and controller drivers.
The controller driver is in charge of the PS/2 transaction. The channel
driver is in charge of the connection between the Zehpyr PS/2 API
interface and controller driver.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Promote the "edac mem" shell subcommand to a generic "devmem" root shell
command. This command is useful for poking around registers and memory
outside of the EDAC drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Using helper functions decreases function complexity numbers reported
by static code analyzers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Check errors returned by edac_ecc_error_log_clear() and
edac_parity_error_log_clear().
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Refactor EDAC API making it more clear, removing unneeded typedefs and
using check for optional and assert for mandatory APIs.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In drivers/sensor/CMakeLists.txt, we have various lines like this:
add_subdirectory_ifdef(CONFIG_FOO foo)
Then drivers/sensor/foo/CMakeLists.txt says:
zephyr_library()
zephyr_library_sources_ifdef(CONFIG_FOO foo.c)
This is redundant; the foo/CMakeLists.txt won't be added to the build
system unless CONFIG_FOO=y in the first place, so there's no need for
extra boilerplate testing it again.
Remove all these unnecessary instances in each sensor driver's
CMakeLists.txt using this pattern:
zephyr_library()
zephyr_library_sources(foo.c)
In a couple of places, the '.c' extension is missing. Add them in for
consistency when that happens.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
RXTO event is generated always after ENDRX and driver relies
on assumption that ENDRX event is handled before RXTO. However,
when interrupt is preempted after ENDRX check returned false
and RXTO event is already set handling order would be swapped.
Added addtional check to handle RXTO event only if ENDRX is not
set. If ENDRX is set, it means that it is not yet handled. RXTO
event is not cleared and interrupt will be triggered again and
ENDRX event will be handled first.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The lis2dw12 sensor can generate the TAP interrupt only on INT1,
while DRDY can be generated on both. The int-pin DT property
specifiy on which pin the DRDY (and not the TAP) can be generated.
This commit fix the way the trigger is set: first the driver checks
the trigger type (DRDY or TAP), then it uses the int-pin information
only in DRDY case but allows setting TAP regardless of int-pin (it
always routes it on INT1).
The previous code was first checking int-pin: if it was INT2 then
the driver refused setting TAP triggers.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit aligns lis2dw12 sensor driver to latest multi
instance sensor driver model.
In particular it makes use of the stmemsc common routines
and move ctx handler inside struct config, so that the
bus_init routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Remove all odr values from Kconfig and always init it
at 12.5Hz. It is responsibility of application to set
the rate to a different value using SENSOR_ATTR_SAMPLING_FREQUENCY.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Move lis2dw12 trigger pulse configurations from Kconfigs to Device Tree.
Moreover the dts properties have been renamed as 'tap', which sounds a
better name to immediately catch the feature behind it. Since tap
threshold cannot be zero, this value (which is the default in dts
binding) is used to enable/disable the device feature per each axis.
The event can be generated on INT1 only.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use gpio_dt_spec structure (and related APIs) in config for configuring
the gpio used for drdy and pulse interrupts.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Take the int-pin information (i.e. what pin between INT1
and INT2 the drdy is attached to) directly from DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Default the option MEMC_STM32 to "y" when the device node is defined and
enabled, so that the driver is selected automatically when the board
supports it and MEMC is enabled.
Remove the default conditional on serise as it's redundant with the one
in soc/arm/st_stm32/common/Kconfig.defconfig.series.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add support for RT1170. The fuse register that holds
the unique device ID is different as compared to the
RT10XX series
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
UART CR_SIN interrupt enable/disable are invoked when CONFIG_PM enable.
This removes the guard for UART CR_SIN interrupt enable/disable to fix
the build issue.
Fixed#36520
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
bits property indicates the number of in-use slots of available slots
for GPIOS. We have a similar property ngpios in gpio-controller.yaml,
we will use ngpios to calculate port_pin_mask. Let's remove bits and
only use ngpios.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Similar to #32218 and #34032
Flush ART cache before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Similar to #32218 and #34032
Flush ART caches before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This implement the same flush cache functionality already present in the
other stm32 series flash drivers, used to avoid bus errors when writing
big chunks of data to the flash.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
The flash_stm32l4x driver seems to work out of the box on the WL series.
This just adds the necessary config changes to let the driver build and
run when SOC_SERIES_STM32WLX is selected.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
When the temperature is lower than 20C, adc_temperature is smaller than
(data->t_ref << 8), which should yield a negative value for dT. While dT
and adc_temperature are correctly declared as signed, the subtrahend is
wrongly casted to unsigned, yielding insanely high temperature values.
Fix that by casting it to int32_t instead of uint32_t.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This change has more detail about providing the I2C peripheral
device's address to help pinpoint any issues that are device
specific and not bus specific.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Use DEVICE_DT_GET instead of device_get_binding to obtain the controller
node, so that the device address gets resolved at link time.
This means we can move the pointer form the data to the config
structure, and get rid of the data structure and associated boilerplate
entirely.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert the various device_get_binding() calls used to get the device
clock node to use DEVICE_DT_GET. The latter is processed at link time,
so it should be a bit more efficient.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Instead of explicity ORing together the compatible drivers,
CAN_RX_TIMESTAMP now depends on CAN_HAS_RX_TIMESTAMP
which is selected by the drivers primary Kconfig option. In addition,
stm32fd does not need to select this option since it selected by
the underlying M_CAN driver.
Signed-off-by: Abram Early <abram.early@gmail.com>
The stm32_lptim driver is hardcoded to use lptim1.
Make the Kconfig option depend on the presence of the node label in the
devicetree, so that there's one less list of supported SoC to keep track
of.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
The NXP LPC syscon driver failed to build on several platforms for
various reasons. We need dts support on LPC55s1x and LPC55s2x, the
driver doesn't seem like it will work on LPC54114 so we exclude it
there for now.
Additionally, fix a dtc warning on LPC55s6x based on unit-address in
the node naming needing to be lowercase.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit clears current settings of the PWM perihperal
that are stored inside device structure.
This makes sure that PWM period and prescaler is configured
as expected after driver was suspended.
Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
NPCX WIMU CR_SIN is used to wake up soc from NPCX sleep power state.
The wake-up IRQ enabled when UART init. It causes the wake-up IRQ to
generate many extra interrupt events, which causes the system too busy
to handle other events. This PR moves the UART wake-up IRQ enabling
from UART init to npcx_power_enter_system_sleep() to avoid the
interrupt storm.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Add flash driver for it8xxx2. The driver can implement
flash read, write and erase that will be mapped to the
ram section for executing.
TEST="flash write 0x80000 0x10 0x20 0x30 0x40 ..."
"flash read 0x80000 0x100"
"flash erase 0x80000 0x1000"
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add support for the Xilinx GEM Ethernet controller, which is integrated
in both the Xilinx Zynq and ZynqMP (UltraScale) SoC families. The driver
supports the management of a PHY attached to the respective GEM's MDIO
interface.
This driver was developed with ultimately the Zynq-7000 series in mind,
but at the time being, it is limited to use in conjunction with the
ZynqMP RPU (Cortex-R5) cores. The differences are minor when it comes
to the adjustment of the TX clock frequency derived from the current
link speed reported by the PHY, but for use in conjunction with the
Zynq-7000, some larger adjustments will have to be made when it comes
to the placement of the DMA memory area, as this involves the confi-
guration of the MMU in Cortex-A CPUs.
The driver was developed under the qemu_cortex_r5 target. The Marvell
88E1111 PHY simulated by QEMU is supported by the driver.
Limitations currently exist when it comes to timestamping or VLAN
support and other minor things. Those haven't been implemented yet,
although they are supported by the hardware. In order to be fully
supported by the ZynqMP APU, 64-bit DMA address descriptor format
support will be added.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
This CL introduces six properties, clock-frequency, core-prescaler,
apb1/2/3/4-prescaler in pcc (Power and Clock Controller) node to
configure clock settings. It also removed the original Kconfig options
used for the same purpose.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In npcx series, we use ITIM64 as system kernel timer. Its source clock
frequency must equal to CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC. This CL
added check during initialization to prevent ambiguous condition.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Rename OSC_CLK as OFMCLK to meet npcx datasheet. The Oscillator
Frequency Multiplier Clock (OFMCLK), which is derived from
High-Frequency Clock Generator (HFCG), is the source clock of cortex-m4
core and most of NPCX hardware modules.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
it need to be a && between two condition, to satisfy
the comment: only 12 / 13 bit resolution is supported,
if FSL_FEATURE_LPADC_HAS_CMDL_MODE is not defined. not
using ||.
Signed-off-by: Crist Xu <crist.xu@nxp.com>
Since we are writing a register it makes more sense for the type
to be unsigned. This hopefully address a compile warning we get
with clang:
error: implicit conversion from 'int' to 'int16_t' (aka 'short')
changes value from 32768 to -32768 [-Werror,-Wconstant-conversion]
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If CONFIG_ICM42605_TRIGGER is not set the driver doesn't build. There
are a few places that need ifdefs based on CONFIG_ICM42605_TRIGGER for
the driver to build correctly.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configured UART/UARTE input pins to have pullups. Otherwise when
uart is disconnected pins are floating and generate receiver
errors.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The definition of the STM32_LSE_CLOCK is given by the
drivers/clock_control/stm32_clock_control.h
to the hci/ipm_stm32wb driver
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add multi-instance support to the MS5607 driver. This is needed to
easily add I2C support later. It also simplifies a bit the driver
initialisation by using more static values.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
axis1bit16 and axis3bit16 unions are no longer used
and can be deleted from all .h files that are referencing
them.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.00.
Requires https://github.com/zephyrproject-rtos/hal_st/pull/7
(merged as 575de9d461aa6f430cf62c58a053675377e700f3)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Reprocess keyscan event processing in case of an I2C bus read
error. Otherwise, the HT16K33 will be stuck (when used in IRQ mode, not
in polling mode) and no new IRQs will be delivered.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Convert the keyscan portion of the Holtek HT16K33 driver to adhere to
the kscan API instead of the GPIO API.
When this driver was introduced the kscan API was not present. The
keyscan driver was therefore implemented as a GPIO interrupt driver.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The was a missing comma in the DEVICE_DT_INST_DEFINE macro and the
SAME71 HAL tweaks the name of a struct so we have to work around that.
Fixes#36095
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the LoRaMac-node library to the last stable release and fix
the Zephyr glue code to match it. Move CMakeLists.txt to the main
Zephyr repository to simplify loramac-node module maintenance.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Make kscan init priority higher, since it is lower than some buses like
I2C, making some devices to fail initialization if not tuning
priorities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Change Highlights:
- Fix error check after `k_work_reschedule_for_queue`. A value of 1
means job was scheduled which was resulting in a ton of "<err>
wifi_eswifi: Rescheduling socket read error" logs getting printed
due to the erroneous check
- When using the B-L475E-IOT01A, attempts to use a TLS socket result
in a hang when socket offload is enabled so I'd like to have a way
to disable the option. To accomplish this, I I switched the
`CONFIG_NET_SOCKETS_OFFLOAD=n` Kconfig option from `select` to
`imply`.
- There was a missing `net_context_set_state()` call when
`CONFIG_NET_SOCKETS_OFFLOAD=n`. I applied the same fix from #30664
for this case to fix the issue.
Signed-off-by: Chris Coleman <chris@memfault.com>
This commit adds the flash driver for nucleo_f207zg platform.
This has been tested with flash test application.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
We do not need the return value of k_sem_take() so ignore it.
Coverity-CID: 236602
Fixes#36313
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
It is necessary to put the device in standby to change the contents of
CTRL_REG1. This register is used to change the sampling frequency.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The bq274xx fuel gauge does a softreset when configuring, after
which the device is polled and sealed. However the sleep logic
was inverted so the poll became blocking.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The STM32H7 series has a special ADC, which is calibrated
on the factory. The calibration values are stored in flash
and must be retrieved upon powering up the device.
Failure to calibrate the device leads to missing codes in
the ADC readings.
Fixes#35529
Signed-off-by: Lasse Sangild <lsangild@gmail.com>
Fix typo in configuration phase to prepare the driver
for incoming add of Interrupt driven uart mode.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
The macros are used to get the pin(s) of a given driver instance. Add
_INST prefix to match convention used by the devicetree.h. The original
macros can now be used to obtain pin(s) of an arbitrary device instance
identified by the nodelabel.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Query the numerical network operator id, location area code (LAC)
and cell id. Following AT commands are used:
AT+COPS?
AT+CEREG?
Functionality is enabled by CONFIG_MODEM_CELL_INFO=y.
Tested with uBlox SARA-R410M-02B.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Query the numerical network operator id, location area code (LAC)
and cell id. Following AT commands are used:
AT+COPS?
AT+CEREG?
Functionality is enabled by CONFIG_MODEM_CELL_INFO=y.
Tested with uBlox SARA-R410M-02B.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Implement numerical network operator id, location area code (LAC)
and cell id in modem context and modem shell.
Please note that the functionality to query these values must be
implemented in the modem driver.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Mark qemu_x86 and native_posix drivers to support both
TXTIME and PTP clock so that we can use txtime sample application
for testing.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Switch from using internal 6pf to internal 7pf load capacitor for LFXO.
Use a default clock accuracy of 50PPM as this matches lab results.
50PPM should be sufficient for common operating temperatures of
25degC +- 15.
Signed-off-by: Johan Stridkvist <johan.stridkvist@nordicsemi.no>
When frame counter is managed by the radio driver the upper layer
needs to be informed about the frame counter changed. The upper layer
looks for the most recent frame counter in the transmitted frame,
this is why the tx_payload need to be updated after processed by
the radio driver.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
The EFR32MG21 doesn't have a RMU and thus the driver isn't relevant for
that SoC series. Add a Kconfig exclusion so the driver isn't available
on EFR32MG21 SoCs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Correct MEC15xx HAL value for DnX warn.
For consistency add automatic ack into the driver.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Create the pinmux phandle to the ADC driver node in the
devicetree. When the pinmux_pin_set function in
adc_it8xxx2_channel_setup can refer to the setting of
this phandle. It is more flexible to use.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Since we removed various series headers, move stm32 driver
under main driver/pinmux folder.
Take this change into account into various drivers.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
These headers were deprecated since release V2.5.0.
Users are expected to use dts based configuration API.
Remove these headers.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit extends the capabilities of the nRF IEEE 802.15.4 radio
driver with IEEE802154_HW_TX_SEC capability.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Make the APIC_TIMER_IRQ_PRIORITY Kconfig depend on APIC_TIMER ||
APIC_TSC_DEADLINE_TIMER to hide it in menuconfig when not applicable.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit provides implementations for the reset cause
API functions as part of hwinfo.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Remove useless definiton STM32F7X_SECTOR_MASK and use CMSIS instead.
By the way fix bug as '|' should be in fact '&',
but thanks to '~' inversion, '|' is now good.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Copy back the TX buffer content back into the upper layer
in case of a TX failure.
This is necessary in when frame encryption by the radio driver
is used. The shim layer for the nRF5 driver has a buffer, that
is used by the driver to authenticate and encrypt the frame
in-place. In case of a TX failure, the buffer contents
are propagated back to the upper layer. The upper layer
must use the same secured frame for retransmission.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Use the nrf_802154_retransmit_csma_ca_raw and
nrf_802154_retransmit_at_raw API to retry the frame transmission
after a failed attempt.
The retry must be performed only in response to
a nrf_802154_transmit_failed event.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Function 'nrf_802154_transmitted_timestamp_raw' is not serialized and
connot be used for multi-core devices yet.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This allows the current speed of the connection (100Mbps/10Mbps) and
if it is operating in half or full duplex to be queried
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
The enc424j600 chipet has 1-byte commands to enable or disable
interrupts which an be used rather than the currently used 4-byte
commands to speed the process up by a factor of 4x
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
The flash write function casts a void * to flash_prg_t, which can be 2,
4 or 8 bytes long depending on the SoC. This can trigger a hard fault
exception if data is not aligned, such as when passing a constant string
from settings_save_one().
Copying the chunk of data to a temporary variable on the stack to avoid
the problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Commit 95b916d104 ("drivers: wifi: esp32: fix reconnect issue")
switched from thread created at runtime to statically defined thread.
The difference is mainly visible for simple applications that use
CONFIG_NET_CONFIG_AUTO_INIT=y, where networking setup code is executed
before main() and any statically defined threads. All ESP32 events are
just queued and never handled, so conditions enforced by
CONFIG_NET_CONFIG_NEED_IPV4=y are never met (e.g. Zephyr networking
layer is never informed about being connected).
Switch back to thread created at runtime, which starts at the moment
when k_thread_create() is invoked. This allows ESP32 event processing to
happen just after ESP32 WiFi driver gets initialized and before Zephyr
network auto initialization code (CONFIG_NET_CONFIG_AUTO_INIT=y).
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Simplify the the AT2x EEPROM instance initialization macro a bit by
converting it to use the new DT helper macros for SPI and GPIO.
This also saves a few bytes when only AT24 support is enabled.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fill the ACK timestamp field in nRF5 driver. This is required by
OpenThread for the proper CSL transmitter functioning.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Add `hwinfo_get_reset_cause` and `hwinfo_clear_reset_cause` to retrieve
and to clear cause of system reset on supported platforms.
Different platforms can provide different causes of reset, however
there is a great deal of overlap. `enum reset_cause` can be expanded in
the future to support additional reasons, as additional platforms are
supported.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Propagate Download and Execute (DnX) entry warning.
Add missing handler for SUS warning power down ack.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This kconfig option enables runtime configuration of UART
controllers. This allows application to call uart_configure()
to configure the UART controllers and calling uart_config_get()
to retrieve configuration. If this is disabled, UART controllers
rely on UART driver's initialization function to properly
configure the controller. The main use of this option is mainly
code size reduction.
Fixes#16231
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
In this CL, instead of a constant value, we use the length of property
'pinctrl-0' of adc0 to indicate the number of ADC channels in different
npcx series.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This driver is for classic CAN, it makes use of CAN interface
in FIFO mode.
This driver support Standard ID as well as Extended ID.
Tested on H3ULCB, Ebisu platform, with external adapter and
in loopback mode.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Move filter match function to can_utils.h, so that it
can be reused for Renesas driver.
Preserve copyright from Karsten Koenig.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
STM32WL series have an extra APB3 bus with the SUBGHZSPI device on it.
Add the relevant code to enable and disable that clock, and to obtain
the actual clock rate. This is enough to run the STM32 SPI driver
against it.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add ADC support for the STM32WL family, this seems to work following
most of the L0X code path.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
If the transaction of write to read is divided into two transfers,
the second transfer will go to check bus busy and cause i2c reset.
This change adds flag to eliminate this situation.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add multi-instance support and make use of the stmemsc i2c/spi
read/write routine that has been introduced to simplify the ST
sensor drivers code.
Moreover, move spi-full-duplex property from Kconfig inside Device
Tree, so that each LIS2MDL instance can be configured selectively
in accordance to how it is used in h/w.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
LiteX GPIOIn module provides possibility to change IRQ mode
and edge via CSRs. This commit adds support for that feature.
Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
This adds missing option to disable IRQs.
Devicetree is modified to match previous commit with custom IRQ CSR
addresses.
Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
This adds an option to set IRQ pending and IRQ enabled CSR adresses
in devicetree since these can be custom in LiteX.
Signed-off-by: Raptor Engineering Development Team <support@raptorengineering.com>
This commit adds support for GPIO interrupts in GPIO driver for Litex
SoC Builder.
Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
Simplify the the MCP320x instance initialization macro a bit by
converting it to use the new DT helper macros for SPI.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Simplify the LMP90xxx instance initialization macro a bit by converting
it to use the new DT helper macros for SPI and GPIO.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
commit d31ed3be04 enabled multiple
instances but when multiple instances are actually used the code does
not compile
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
This CL replaces series-prefix "npcx7-" with family-"npcx-" for npcx dts
nodes such as 'espi-vws-map' and 'miwus-int-map'. Since we plan to
introduce the npcx9 and later series, adding a new node such as
npcx9-espi-vws-map for each series is more complicated and not
necessary.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
For some reason a few drivers were not converted to the new device PM
callback signature. The reason may be because the device PM part is
compiled only when CONFIG_PM_DEVICE=y, a condition not enabled in CI by
default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The data-sjw value was incorrectly written to the NBTP register when it
should be written to the DBTP register.
This fixes a regression introduced by
5e0ca9b41e.
Signed-off-by: Christoph Steiger <c.steiger@lemonage.de>
The lis2mdl temperature samples work with a level of 25 Celsius.
When temperature goes below that level the samples become negative
and there was an issue in properly propagating the sign.
Fix#35910
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The lps22hh 24 bit raw sample is left aligned, which means that
it needs to be right-shifted by 8 before applying conversion.
Moreover the conversion has been simplified for clarity.
Fix#35871
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use gpio_dt_spec structure and related macros for both drdy
and AnyMotion interrupts, to have a more compat, readable and
safe code. Moreover, skip setting DRDY or AnyMotion trigger
from application if the corresponding irq-gpios has not been set.
(This commit also fixes#34794)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
If the supplied sjw in the timing parameters is zero,
the sjw parameter should not be changed.
This fixes the uninitialized swj in can_set_bitrate.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Fix the compilation of i2c_gpio.c after the gpio_config() syscall was
removed.
Fixes: 3632815e2e
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Move to using port property for a few cases in which we need to know
which specific hardware port a device is for. This allows us to
remove the PORT0/1 Kconfig options. This also fixes the issue that
assumed pio0 would map to DT_INST(0) and pio1 would map to DT_INST(1)
Fixes#35693
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Currently zephyr has no means to control access to the uart
driver when it is inactive, e.g. shell is not aware of uart
being in idle state and calls asynchronous api. Add early
return to TX starting procedure if device is idle.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Fixing error introduced in 951e72b947
where ifdef was converted to IS_ENABLED. Ifdef was required because
element in the struct does not exist when multithreading is disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This commit it to resolve following bugs:
* Operands don't affect result.
* Logical dead code in stm32_adc driver.
Above mentioned bugs were solved by adding parenthesis and
changed the method of comparing. Since comparison of ADC
channel_id with the channel may cause loss of value.
So instead of direct comparison, introduced a mechanism to
convert channel constant to a decimal using
__LL_ADC_CHANNEL_TO_DECIMAL_NB() and strips away
the INTERNAL_CH bit and then compare with channel_id.
fix:
* zephyrproject-rtos/zephyr#35130
* zephyrproject-rtos/zephyr#35136
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
OpenThread expects the FCS field at the end of the ACK frame to be
passed with `otPlatRadioTxDone`.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Device won't reconnect automatically even if
AP station is available. This fix adds the carrier event, indicating
that network is present again enabling DHCP bound event.
Also, internal wifi event callback was added into wifi
driver to enable proper event handling.
Update west.yml to bring exposed wifi event callback.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Fixes#33843
There was a verification function for can_set_bitrate calling a syscall
implementation. But, can_set_bitrate is not a syscall and does not need
to be because it is accessing the driver through other syscalls.
Fixes#34734
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
For the native posix build the sleep calls used in tasks will stall
the zephyr instance which sets an upper limit on the data processing
interval to once every 20-30 millisecond.
This change reduces the duration of the sleep calls and increases the
TICKS_PER_SECOND to allow for shorter sleeps. This is needed to
support the data rates needed for LE Audio streaming. The rate is
tuned to support up to bidirectional 5ms ISO-intervals.
This change also increases the ISO buffer count from 1 to 5 to
allow for some buffering in the controller, which is needed for
gapless playback and/or use of burst number larger than 1.
Signed-off-by: Casper Bonde <casper_bonde@bose.com>
Microchip HAL 1.2.0 fixed a bug in the define of GPIO
control register MUX field. The incorrect MUX defined
cleared by GPIO input pad disable field by accident.
After the MUX definition was corrected the pinmux driver
must be modified to mask off the input pad disable for
the pin to be operational.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Change the drivers's compatible from atmel,sam-tc to atmel,sam-tc-qdec.
The atmel,sam-tc should be reserved for the future counter driver.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit reverted while loop on tx only.
This commit solves SPI loopback failure and SPI wrong behaviour on RX.
fix:
* zephyrproject-rtos/zephyr#35297
* zephyrproject-rtos/zephyr#35539
Revert "drivers/spi: STM32: This solves SPI infinite loop on Tranceive"
This reverts commit 50c2acbc03e7a48a09880b6fcb8c22256bffa70c.
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
Most APIs have the default synchronous and an asynchronous version
with the sufix _async because that is the most common use.
All devices in tree right now are using the synchronous version, so
just change it to be consistent with the rest of the system.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
arc_v2_irq_unit_init function will init all interrupts and disable
they, we must make sure we call it first before we use interrupts.
so we need to increase its priority to highest in PRE_KERNEL_1 stage.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Make custom RTT locking configurable and select it where it is needed.
When using RTT for tracing we want to use the default locking.
Update both segger and tracerecorder modules to support that.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
As per description of the sys_clock_elapsed() function, "the kernel
will call this with appropriate locking, the driver needs only provide
an instantaneous answer". Remove then the unnecessary locking from the
function, as it only adds an undesirable delay.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Replace suffix ull to ULL to increase code readability and prevent
unexpected behaviours, because the lowercase character l shall not be
used in a literal suffix
Found as a coding guideline violation (MISRA R7.3) by static
coding scanning tool.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
After system reset (SETETHRST) interrupt enable register (EIE)
has the default value 0x8010 and global interrupt enable flag (INTIE)
is set. This is not desired and the INTIE flag should be set only at
the end of the initialization.
Disable INTIE flag and set desired interrupts sources in
a single write command just right after system reset.
Resolves: #35091
Reported-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The controller has several interrupt sources which are signaled
via a single INT pin. Only the interrupt sources that are explicitly
switched on during controller initialization may generate an interrupt
signal. Currently there are only PHY Link Status Change Interrupt
and RX Packet Pending Interrupt enabled. So there is no other reason why
an interrupt can be triggered.
Terminate interrupt handling thread on unknown interrupt
only when debugging, as there are concerns that stopping
thread in the field is going too far.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Function should return -ENOTSUP when asynchronous api is not
supported by the device.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Deadlock may occur when uart device was put to low power state
while uart_poll_out was in progress. Poll out pends until uarte
is ready to send new byte and it is detected by endtx and txstopped
events being set. When uarte was disabled while poll_out was pending
events were never set and that lead to deadlock. Added a step
in going to low power state in which CPU waits for txstopped event
and only after that uarte peripheral is disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
(same considerations as commit 2f01479b)
In a multi-instance driver it may happen that on some h/w
one device should use interrupts and a second device should use
polling mode. So, CONFIG_IIS2ICLX_TRIGGER is not enough to discriminmate
if interrupt inizialization routine should be called or not; the choice
is now based whether the "irq-gpios" property is present in the DT
for that particular instance or not.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use gpio_pin_configure_dt() and gpio_pin_interrupt_configure_dt()
for drdy_gpio: they result in a more readable code.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The STM32F0 MCUs (except STM32F030XC) don't have a DMA channel selection
register (DMA_CSELR). This patch fixes the build of the dma_stm32 driver
for them.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
With this patch the sys_clock_set_timeout function counts the cycles
elapsed while computing the systick timer's new load (tickless mode).
This cycles are then added to the total cycle count instead of being
lost.
This patch mitigates uptime drifting in tickless mode (especially when
high frequency timers are registered).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
When using the uart driver with interrupt and async api
at the same time (instance for interrupt and instance for async),
the transmission complete interrupt was handled in the async
handling section, even when interrupt driven api is used.
This caused transmission to not work properly in interrupt mode.
The fix is to move the interrupt mode handling to the begginning
of the isr. If async mode is used then interrupt mode code
will not be run.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
The reboot option of the +KSRAT command is only
supported by newer firmware.
Add a check to determine what version of the command
to use when setting the RAT.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
If the label property is missing in a "pwm-leds" compatible DT node
(which is almost always the case), then the device name is now set to
DT_NODE_FULL_NAME instead of "LED_PWM_$inst" previously.
This allows applications to use the DEVICE_DT_NAME macro to retrieve
the device name instead of gessing an arbitrary string.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
On Apollo Lake, each GPIO controller has more than 32 pins.
But Zephyr API can only manipulate 32 pins per controller.
So the workaround is to divide each hardware GPIO controller
into 32-pin blocks so each block has a GPIO driver instance.
Compounding to the issue is that there cannot be two device
tree nodes with same register address. So another workaround
is to increment the register addresses by 1 for each block.
So when mapping the address, the lowest 8-bit needs to be
masked to get the actual hardware address.
Fixes#28551
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
In case of multi-instance the driver tries to discover whether
there are devices attached to SDx/SCx sensorhub bus. If not it
just turns the shub_inited variable (inside data structure) to false
and skips doing any further sensorhub related action for that
particular IIS2ICLX device instance, regardless the fact that the
macro CONFIG_IIS2ICLC_SENSORHUB is enabled.
Moreover, the info found during the enumeration process for a
particular instance (number and types of attached devices) must be
saved inside the per-instance data structure, so that more than one
IIS2ICLX device can be used as a sensorhub without interfering with
the others.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
In case of multi-instance the driver tries to discover whether
there are devices attached to SDx/SCx sensorhub bus. If not it
just turns the shub_inited variable (inside data structure) to false
and skips doing any further sensorhub related action for that
particular LSM6DSO device instance, regardless the fact that the macro
CONFIG_LSM6DSO_SENSORHUB is enabled.
Moreover, the info found during the enumeration process for a
particular instance (number and types of attached devices) must be
saved inside the per-instance data structure, so that more than one
LSM6DSO device can be used as a sensorhub without interfering with
the others.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This avoid IRQ to be handle before iface init is finished
(especially before iface address is set)
Fixes#32771
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The logging macros use _Generic() atm and it started to complain
when we are trying to print pointer value of gsm_dlci and gsm_mux
structs. Cast the pointer value to (void *) to overcome this.
Fixes#35329
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
uarte_enable function was not supporting a case when async
api was enabled but instance did not use it. Added runtime
check for async instance presence.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Driver was failing when interrupt mode was enabled for given
instance but interrupt driven TX part was not used. In that
case uart was not disabled after sending a byte which resulted
in continuous interrupt triggering. Added check for
fifo_fill_lock which is set when uart_fifo_fill is used.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The default behavior of the +KSRAT= command has
changed to not reboot the HL7800.
Adjust the command so the reboot takes place properly.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit fixes the ADC driver flow. And add internal
reference voltage to ADC driver API. And correct the
data buffer that only need to store raw data.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
After i2c_reset, there is still no external pull-up I2C bus,
and finishing off the rest of loop causes the code to hang
indefinitely.
This patch fixes that if I2C bus is not available(No external
pull-up), dropping the transaction.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
-ENOSYS should be returned if the operation is not implemented. This
issue was causing some PM tests to fail, as -ENOSYS was expected.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use gpio_pin_configure_dt() and gpio_pin_interrupt_configure_dt()
for drdy_gpio: they result in a more readable code.
Moreover, this commit includes also the fix for PR #35156
(i.e. CID 235979, add check for gpio_pin_configure() return val).
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Resetting the dma_tx.buffer_length after the dma_tx.counter
calculation, instead of before.
We need to reset the buffer_length when the transmission is finished,
but in order to give the correct value to the uart_event_tx struct,
we use the dma_tx.buffer_length in the calculation of the
dma_tx.counter, used for the len of the event (number of bytes sent).
I found this problem, when I wanted to use the uart_event_tx.len for
freeing the used space inside a ring buffer (ring_buf_get_finish),
and it didn't work, I logged the values of the uart_event_tx struct,
and found out it always was 0, because the buffer_length was 0,
and the whole buffer was transmitted (stat.pending_length also 0).
Signed-off-by: Prema Jonathan van Win <jonathanvanwin@gmail.com>
This commit loops on rx not empty only if rx_buf is enabled.
And if rx_buf is not enabled, it loops on tx empty status.
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
In case of the following sequence of UART events:
- UART_ENDRX
- UART_RXRDY
- TIMER_RXTIMEOUT
The application receives one more byte that was received,
due to RX counter alignment upon ENDRX event.
The proposed fix moves the RX byte counter alignment to the
RX timeout event handler.
Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
Add check to see that the GPIO devicetree node is actually enabled
before we build the PSoC6 GPIO driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If we try and build the MiV uart driver with interrupt support enabled
we get some errors related to code that hasn't been updated. Fix the
compile errors and add SERIAL_SUPPORT_INTERRUPT to the Kconfig to
hopefully catch these issues in the future
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32 internal temperature sensor driver.
This sensor can be used to measure the temperature of the CPU
and its surroundings.
Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
In the power mgmt conversion of void *context to uint32_t *state this
driver got missed and shows build errors with power mgmt is enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The cache API currently shipped in Zephyr is assuming that the cache
controller is always on-core thus managed at the arch level. This is not
always the case because many SoCs rely on external cache controllers as
a peripheral external to the core (for example PL310 cache controller
and the L2Cxxx family). In some cases you also want a single driver to
control a whole set of cache controllers.
Rework the cache code introducing support for external cache
controllers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
In a multi-instance driver it may happen that on some h/w
one device should use interrupts and a second device should use
polling mode. So, CONFIG_LSM6DSO_TRIGGER is not enough to discriminmate
if interrupt inizialization routine should be called or not; the choice
is now based whether the "irq-gpios" property is present in the DT
for that particular instance or not.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Move ctx structure from struct data to struct config, so that
it can be filled at compile time and we could get rid of the bus
init routines.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
NPCX clock has some limitations about the frequency range &
synchronization between core clock & other clocks. Add build assert to
check whether NPCX clock setting correct. This also fixed soc_clock.h
to consist with datasheet.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
If the modem drivers are built on a 64-bit platform we get errors with
the logging code due to use of size_t. Update to use %zX to handle this
correctly between 32-bit and 64-bit platforms.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The context parameter used across device power management is
actually the power state. Just use it and avoid a lot of
unnecessary casts.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Modern hardware all supports a TSC_DEADLINE mode for the APIC timer,
where the same GHz-scale 64 bit TSC used for performance monitoring
becomes the free-running counter used for cpu-local timer interrupts.
Being a free running counter that does not need to be reset, it will
not lose time in an interrupt. Being 64 bit, it needs no rollover or
clamping logic in the driver when presented with a 32 bit tick count.
Being a proper comparator, it will correctly trigger interrupts for
times set "in the past" and thus needs no minimum/clamping logic. The
counter is synchronized across the system architecturally (modulo one
burp where firmware likes to change the adjustment value) so usage is
SMP-safe by default. Access to the 64 bit counter and comparator
value are single-instruction atomics even on 32 bit systems, so it
beats even the RISC-V machine timer in complexity (which was our
reigning champ for "simplest timer driver").
Really this is just ideal for Zephyr. So rather than try to add
support for it to the existing APIC driver and increase complexity,
make this a new standalone driver instead. All modern hardware has
what it needs. The sole gotcha is that it's not easily emulatable
(qemu supports it only under kvm where they can freeload on the host
TSC) so it can be exercised only on hardware platforms right now.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Move LUT to driver.
Update CMake to include SoC specific driver.
Fix mimxrt685_evk LUT header spacing.
Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
Adding Reset and Write-protect pins initialization during AT45 driver
start-up. Usually these pins are driven high when not used.
The AT45 device incorporates an internal power-on reset circuit, so
there is no initial on-off reset sequence.
Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
To keep compatibility between the old GPIO API implementation and a new
one introduced in the Zephyr 2.2.0 release the gpio_pin_configure()
function was accepting interrupt flags. In the new API implementation
interrupt flags are only accepted by gpio_pin_interrupt_configure()
function.
This temporary support for INT flags in gpio_pin_configure should have
been removed in the Zephyr 2.4.0 release.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The shared interrupt controller depended on interrupt-cell sense
to inialize the interrupt using IRQ_CONNECT.
Forward the "sense" property only conditionally to be able to
use the driver all drivers that don't define it.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The size of the array holding the client information is determined
from the number of dt supports dep ordinals.
Finally remove the Kconfig symbol for the number of clients.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The intc_shared driver used kconfig to set the number of clients.
This commit changes the driver to determine the number of clients
per instance using supports ordinals information from device tree.
Leave the kconfig symbol for the number of clients, it now only defines
the array size in driver data and therefore an upper limit of how
many clients can be defined in dts.
It will be removed later with changes of driver data struct.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The intc_shared driver until now had the possibility to enable
up to two instances of the driver using the symbols SHARED_IRQ_0
and SHARED_IRQ_1.
This commit removes those Config options, and instead instantiates the
driver using DT_INST_FOREACH_STATUS_OKAY macro.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Implementation of the Bosch M_CAN IP driver.
This driver is just the base for a specific SoC implementation.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
The energy consumption on nrf52840 is unnecessarily high when
CONFIG_NORDIC_QSPI_NOR is used due to Anomaly 122. The nrf_qspi_nor
driver is unitialize after QSPI usage and initialize before using
it again.
Semaphore objects are used to allow multiple threads exclusive access
and efficient usage.
The main assumption made was that all QSPI API is stateless, in the
sense that it is not required to store any peripheral state before
uninit. Also, the QSPI driver was supposed to be synchronous, except
for the erase operation, in which the nrf signals its start, instead of
its end. While the flash is performing the erase, an uninit followed
by an init doesn't work. For that reason, polling is done before
every uninit.
Tests were made with a simple LittleFS application in a custom board
using flash MX25R3235F and another with the LittleFS flash sample
using nrf52840 DK that has a MX25R6435F. Current consumption dropped
from 630 uA to ~10uA in both cases.
Signed-off-by: Rodrigo Brochado <git.rodrigobrochado@gmail.com>
Previously to this commit, nothing was done to restore the bus to an
healthy level.
However, I2C devices sometimes needs help to recover from an aborted
transaction.
Therefore, we now add a call to nrfx_{twi, twim}_bus_recover().
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Fixed check condition for GPIO pin number.
This check is done
before reading or writing value for the pin.
Verified on ehl_crb.
Signed-off-by: U Divya <u.divya@intel.com>
Added support for GPIO driver for Intel Elkhart Lake
board.
The GPIO driver will support pin value read/write operations,
pin direction and interrupt configuration. ACPI enumeration
support and support for different GPIO communities is also
present.
Verified on ehl_crb.
Signed-off-by: U Divya <u.divya@intel.com>
ADC emulator is designed to be used in tests on native_posix board. It
supports 1-16 bit resolution range and all GAINs from enum adc_gain.
Reference voltages and number of emulated channels are set through dts.
Using special API from drivers/adc/adc_emul.h it is possible to set
constant voltage value returned by given ADC channel or set custom
function which allows to simulate complex output.
Also reference voltages can be changed in runtime using the API.
The CL also includes:
- Add adc definitions of ADC emulator in
tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
- Add test for ADC emulator API in tests/drivers/adc/adc_emul/
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
add dma support to adc driver
add HW trigger dma support
using new dma api to request dma channel
tested on frdm_k82f and frdm_k64f
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Usage of k_work object from within net_pkt results in undefined behavior
in case when net_pkt is deallocated (by net_pkt_unref()) before work has
been finished.
Use per socket k_work object (sock->send_work) to submit send work and
put net_pkt objects onto k_fifo (sock->tx_fifo). Add a helper function
esp_socket_queue_tx() for that, which will make sure that packets are
enqueued only when send work handler will be successfully submitted (so
that all packets are consumed/dereferenced).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This patch add support for polling based UART
on the Renesas R-Car SCIF (Serial Communication Interface
with FIFO)
This hardware block can be found on various Renesas R-Car
SoC series.
It allows to get console on R-Car Gen3 H3ULCB board.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Avoid calling PPI driver when enhanced poll functionality is
disabled. Fixing a case when driver failed to compile when
enhanced poll is disabled for all instances.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
In some cases, VddIO2 is required to get port working.
Looking in details, VddIO2 should be set on start up
but not toggled on/off in PM use cases.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implement power mgmt hooks to support PM_DEVICE and
PM_DEVICE_RUNTIME.
In case of PM_DEVICE_RUNTIME, clock is requested for bank writes
so it is requested before configuring and released only if pin
is not configured as output.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was
introduced into drivers/wifi/esp32/ and it already caused confusion as
there was existing drivers/wifi/esp/ directory for ESP-AT
driver (utilizing external WiFi chip, by communicating using AT commands
from any serial capable platform). So question has arisen whether it is
good to merge both, while they are totally different drivers.
Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is
easier to figure out difference between "esp32" and "esp_at" just by
looking at driver name. Rename also DT compatible and all Kconfig
options for the same reason.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
nrfx 2.5.0 release includes the patch in the nrfx_twim driver that
fixes the driver behavior for zero-length transfers. No need to keep
the same fix in the shim layer.
This effectively reverts cb86a2b306.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove reset pin requirement from devicetree as this
is not required for modem functionality, and is not
used in the driver anyways.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
The request id is given by the DMA request MUX id which start at offset
1 and are vaid until req_nb + gen_nb.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit updates the revision of hal_nordic component
and introduces necessary changes to the IEEE 802.15.4 driver
to match latest nRF IEEE 802.15.4 radio driver API.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
esp_reset() is called from net_if init function, which holds net_if lock
after commit 24b49f4399 ("net: if: Add locking"). At the end of
esp_reset() there is a blocking wait on `sem_if_up` semaphore. This
semaphore can be release only by esp_init_work(). esp_init_work()
however blocks on net_if operations, because net_if init function (which
invokes esp_reset() underneath) is still holding net_if lock. As a
result there is a deadlock, because esp_reset() and esp_init_work() are
both waiting on each other.
Remove waiting for `sem_if_up`, so that net_if init can exit and release
net_if lock.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This patch fixes a bug of SPI driver for SiFive FE310.
Current implementation sends/receives only first buffer even if
an user passed two or more struct spi_buf to driver.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This commit fixes the flash latency calulation in clock_control_init
for stm32wb and stm32wl series:
For these series new_hclk_freq can't be used to set the flash latency,
because the flash clk uses a different prescaler.
Without this fix, the flash latency could be set to an inadequat value
in cases wehere the new AHB3/AHB4 prescaler is different from the
new cpu1 prescler.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds missing initialization of rcc prescalers for
stm32wb and stm32wl series when hse or hsi are selected as
system clock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
stm32wb only has a single msi clock range, in contrast to wl, l4, l5
which have a second range that is active after exit from standby mode.
This difference must be taken account of in the driver.
This commit abstracts __LL_RCC_CALC_MSI_FREQ macro such that all series
can be supported, additionally the switch to the msirange
(LL_RCC_MSI_EnableRangeSelection) is now only executed on series
that support it.
As a result stm32wb socs can use msi as sysclock.
The same should be done for stm32l0, but this commit series limits
the scope of socs to avoid getting too bloated.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commmit restructures the clock_controller code such that the cpu2
prescler assignment later can be excluded for single core socs.
The stm32wl mcu line has variants with a single cortex-m4 core
(stm32wle5), therefore the prescaler for the second clock should
only be set for dual core socs.
This commit still checks for the complete series
(CONFIG_SOC_SERIES_STM32WLX) as the single core variants are not
yet introduced, later the condition should check for a flag like
CONFIG_SOC_STM32WL5X instead.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes several occurences where a struct members is wrongly
dereferenced, which causes a compile error in case the msi clock is used
as system clock.
Only affects stm32wb and stm32wl with MSI selected as sysclock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit continues simplifying the generation of
isActiveFlag/clearFlag funtion pointer array for the request generators
and does the same for the table_ll_channel.
Additionally move struct dmamux_stm32_channel to c file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit uses dt property dma-channels instead of ll defines to
make sure every soc has correct number of function pointers defined.
While commit 5f6218a tried to fix this for g0 series, this caused
regression for other series(e.g. stm32g431). Using UTIL_LISTIFY and
dt properties this should finally be fixed and reduce boilerplate code.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
NRFX UARTE would write to user supplied buffer on IRQ without checking
whether or not the supplied buffer had available space left to write
one char
Signed-off-by: Arne Edholm <arne.edholm@assaabloy.com>
In prts of the code, we use rcc node "clocks" property to testify the
use of device tree for clocks configuration.
This doesn't work in case of stm32h7 m4 targets as for those,
"upstream rcc" clock configuration, such as sysclk source selection,
is done on m7 core and hence rcc node doesn't have a "clocks"
property.
To work around this, use alternate "d1cpre" property in case of
stm32h7 targets.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Cortex-M4 stm32mp1 zephyr relies on chip Cortex-A for clock
configuration.
No change is then required for conversion to dts based clocks
configuration, but we do need to exclude use of newly deprecated
Kconfig symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add new symbol CLOCK_CONTROL_STM32_HAS_DTS to exclude definition
of other CLOCK_CONTROL_STM32_* symbols when dts based configuration
is in use.
CLOCK_CONTROL_STM32_HAS_DTS is defined based on availability of
"clocks" property in rcc node.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Symbol CLOCK_STM32_HSE_CLOCK will remain in use in context of stm32
clock_control configuration using device tree, cf commit
a7989f64a3.
In preparation for next change, separate it from the others symbols
definition. Also make it non dependent from other Kconfig symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If modem receives an IPv6 address, buffer overrun
would occur. Fix this by checking string length to
ensure what type of IP address needs to be parsed.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
device_pm_control_nop has been marked deprecated so we get a CI
build error due to its use. Replace with NULL to fix the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change to make i2s_config const missed a case in the SAM driver.
Without this we get build errors when building in CI.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove the config BOOT_TIME_MEASUREMENT and corresponding #ifdef'd code
throughout (kernel/init.c, idle.c, core/common.S , reset.S, ... ) which
hold the extern hooks for z_timestamp_main and z_timestamp_idle in the
removed boot_time test suite.
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
The current rf2xx driver not implement any configuration. Add
the minimal structre to implement rf2xx driver configuration and
implement IEEE802154_CONFIG_PROMISCUOUS mode.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Configure transceiver to create a 0 period backoff and perform only one
time the CCA without transmission retires for failures.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current RF2XX driver only support IEEE802154_TX_MODE_CSMA_CA. Add
IEEE802154_TX_MODE_DIRECT to allow transmit packets immediately without
performing random backoff, CCA and retransmission process.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The MAX17262 is an ultra-low power fuel-gauge IC which implements the
Maxim ModelGauge m5 algorithm. The IC monitors a single-cell battery
pack and supports internal current sensing for up to 3.1A pulse
current. The IC provides best performance for batteries with 100mAhr
to 6Ahr capacity.
Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
This is always defined since:
755d09e149 include/drivers/clock_control: stm32: Update for STM32F1
support
So the condition has currently no effect and causes the prescaler to
always be set to /2.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit implements the OpenThread APIs to pass MAC keys and
frame counter to the radio layer in order to process the
transmission security. This is needed for the correct functioning
of a CSL transmitter.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
This commit aligns iis2dlpc sensor driver to latest multi
instance sensor driver model.
In particular:
1. make use of some few DT helpers:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
- get drdy gpios with GPIO_DT_SPEC_GET
2. make use of the stmemsc common routines and move ctx
handler inside struct config, so that the bus_init
routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The STM32H7x flash has an integrated ECC that can correct single
errors and detect double errors. When a double ECC error is detected,
the DBECCERR1/2 flag is raised and there is a bus fault.
We now mask this bus fault and check the error flags. ECC errors are
logged with the offset of the data. Single ECC errors cause a warning
to be logged and double ECC errors return -EIO.
Fixes#33140.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Now that we have specific bindings for STM32F100 devices,
we need dedicated treatment for PLL source HSI case.
Otherwise, we end up using undefined symbol STM32_PLL_PREDIV1.
Please note that previous code compiled, it was assigning
a wrong value to prediv. This had no consequence because
prediv value is forced in Cube LL functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
According to RM0041.pdf clock tree for stm32f100xx devices is
different from both STM32F10X density and connectivity lines devices,
but is a combination of both.
Rework symbols definitions so that STM32F100xx is neither of those
and uses:
- CLOCK_STM32_PLL_MULTIPLIER as on SOC_STM32F10X_DENSITY_DEVICE
- CLOCK_STM32_PLL_PREDIV1 as on SOC_STM32F10X_CONNECTIVITY_LINE_...
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Two minor tweaks and a semantics change:
- fix a whitespace nit
- use gpio_pin_configure_dt()
- turn the LED on in case the percentage is nonzero
The last change patterns this driver after behavior in the Android
lights HAL, which recommends analogous behavior when the user requests
a color change in a non-RGB LED:
Do your best here. [...] If you can only do on or off, 0 is off,
anything else is on.
https://source.android.com/reference/hal/structlight__state__t
I think this behavior makes more sense.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Use the CODE_DATA_RELOCATION_SRAM config to indentify code relocated
to SRAM so we can setup the MPU for the SRAM region used for code
relocation.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The AUDIO_DMIC INIT_PRIORITY definition is set to 60 by default,
but this value is causing dmic drivers to be initialized prior to
i2s, to which they are dependent from.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We need to clear interrupt status, before we enable the interrupt.
So I let ite_intc_isr_clear() to be global function.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
The i2s_config structure passed to the i2s_configure() function is
not supposed to be modified by the driver. Similarly, the structure
returned by the i2s_config_get() function is not supposed to be
modified outside the driver.
Decorate the pointers to those structures with the const qualifier
and correct one driver that actually modified the structure passed
to i2s_configure().
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Introduce a new enumeration value that allows setting configuration
and triggering commands for both I2S streams simultaneously.
Such possibility is especially important on hardware where the streams
can be only enabled/disabled (but not started/stopped) independently,
like it is in nRF SoCs.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Automatic collision detection for half-duplex mode can be enabled
by setting `collision-detection` proprety for uart hardware
in the dts file. If the transmitted bit does not match the received
bit an error is raised. This is useful in RS-485 half-duplex mode.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Currently cavs_idc_smp_init() is called from a system
initialisation sequence, which only runs on the main CPU.
However, it must also run on secondary CPUs if those are
powered on later instead of simultaneously with the main
CPU.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
irq_enable() should be called with the composite IRQ code as its
argument, not just the Xtensa proper part of it.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Update stm32h7 clock_control driver to make use of macros allowing
dts based configuration in coexistance with existing Kconfig method.
Note: Use of IS_ENABLED is removed as it generates warnings in
checkpatch. This checkpatch behavior needs to be reviewed but may
first require a little clean up of IS_ENABLED macro.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Information about which block protect bits are set on power-up is not
inferable from SFDP content, so we need the devicetree config pointer
to get the has-lock property value even when SFDP data is read at
runtime.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
During configuring the low-voltage power supply of IO pads, the npcx
GPIO driver needs to set the related PORTx_OUT_TYPE bit to 1, i.e.
select to 'Open Drain IO type', also. This CL provides a mechanism that
configuring these bits via 'def-lvol-io-list' node automatically in case
the flag of gpios that have been configured to low-voltage power supply
doesn't contain GPIO_OPEN_DRAIN.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The memory block passed by the user to the i2s_write function is
tightly packed next to each other.
However for 8-bit word_size the I2S hardware expects the data
to be in 2bytes which does not match what is passed by the user.
This will be addressed in a separate PR once the zephyr API committee
finalizes on an I2S API for the user to probe hardware variations.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Update the SDK API's called in the configure implementation.
The DMA_PrepareTransfer and DMA_SubmitTransfer SDK functions
are not recommneded for use. Replaced the call to these SDK
functions with other SDK API's.
2. Fix the implementation the configure function when multiple
blocks are used.
3. Update the dma_reload implementation. The old reload function
would simply abort the transfer. The new implementation reloads
the DMA buffers for transfer.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
To allow transition to device tree based clock configuration on
stm32 targets, rework clock_control driver to use intermediate
STM32_ macros initially defined as the equivalent Kconfig macros
for now.
Propagate the change in all code using these macros.
The reason to introduce these new macros instead of configuring
Kconfig flags using dt kconfigfunctions is that we'll need
to be able to inform users that Kconfig flags are deprecated
once the whole family conversion is done, to encourage
out of tree users to adopt this new configuration scheme.
Note: For now STM32H7 series and code is excluded.
This is the same for some series specific code such as
PLL mul/div for L0/L1 and XTRE prescaler on F1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add configurable attached event delay. Delay can be used to give
USB Charging Controller time for initialization.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
LL_RCC_HSE_EnableBypass() doesn't exist on stm32wl,
but can be replaced by LL_RCC_HSE_EnableTcxo()
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Use recently introduced API, which takes care of gracefully closing any
pending DNS requests and replacing existing DNS server list with new
one.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Use recently introduced API, which takes care of gracefully closing any
pending DNS requests and replacing existing DNS server list with new
one.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reboot functionality has nothing to do with PM, so move it out to the
subsys/os folder.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Limit the maximum SPI frequency to that supported by the instance
hardware. This stops peripherals supporting >8MHz on slow instances
from wrapping around on the clock frequency for undefined behaviour.
Fixes#34402
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit replaces driver hard coded clk bus and enr definitions with
definitions from device tree.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes missing pclken member if used for h7 series.
Additionally to the check if instance 0 of compatible
st_stm32_flash_controller has defined a clock,
this needs to be checked for compatible st_stm32h7_flash_controller.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
It was found that npcx7 series' GPIOs which support low-voltage power
supply, there is an excessive power consumption if they are selected to
low-voltage mode and their input voltage is 1.8V.
To avoid this excessive power consumption, this CL suspends the
connection between IO pads and hardware instances before ec enters deep
sleep mode. Then restore them after waking up.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Change to use macro DT_FOREACH_CHILD_STATUS_OKAY to avoid routing the
interrupts to the disabled cores.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Current Cypress PSoC-6 serial driver only works using polling mode.
Add serial driver interrupt routines to allow use of interrupts.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
The current serial driver uses hard code configuration. Rework driver
to use pinctrl and enable full configuration from device tree.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Add a function that uses the JESD216 SFDP BFP DW16 Enter 4-Byte
Addressing parameter to put the device into 4-byte addressing mode if
one of the entry modes that's supported by the driver is available on
the device.
Perform the transition if SFDP data is provided (either by devicetree
or at runtime), or if a special devicetree property provides the entry
mode descriptor.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Support both 24-bit and 32-bit address values when constructing the
device command. Note that some commands require 24-bit address
regardless of mode, and some require 32-bit addresses regardless of
mode, so provide command-specific overrides of a generic (but not yet
configurable) default address size.
With this we no longer need a special interface for READ_SFDP which
uses a 24-bit address but with a wait state introduced by clocking out
a fifth command byte.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This driver abstracts most access through a generic function that
supports both read and write with and without address components in
the command. Rework this so that instead of distinct arguments
specifying the combination of features there's a flag set that will
allow more combinations to be specified.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Fixes#29915.
Implements the memory layout and MPU configuration for Ethernet buffers
for STM32H7 controllers as recommended by ST. 16 KB of SRAM3 are
are reserved for this. The first 256 B are for the RX/TX descriptors and
configured as strongly ordered, shareable memory. The rest is for RX/TX
buffers and configured as non cacheable memory. This configuration is
automatically applied for H7 chips if the SRAM3 memory is enabled in the
device tree.
Signed-off-by: Mario Jaun <mario.jaun@gmail.com>
Kconfig symbol is used in hal_stm32 module to define Cube HAL
symbol HSE_VALUE (cf hal_stm32/stm32cube/CMakeLists.txt).
Due to this specific usage, this symbol should be kept. As a
consequence it could not be replaced by dts equivalent but we can
use dts to configure it.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To allow transition to device tree based clock configuration on
stm32 targets, rework clock_control driver to use intermediate
STM32_ macros initially defined as the equivalent Kconfig macros
for now.
Propagate the change in all code using these macros.
The reason to introduce these new macros instead of configuring
Kconfig flags using dt kconfigfunctions is that we'll need
to be able to inform users that Kconfig flags are deprecated
once the whole family conversion is done, to encourage
out of tree users to adopt this new configuration scheme.
Note: For now STM32H7 series and code is excluded.
This is the same for some series specific code such as
PLL mul/div for L0/L1 and XTRE prescaler on F1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
For testing purposes, add simulated PTP clock device to e1000
Ethernet driver that is used in qemu_x86 board. The PTP clock
does nothing useful as there is no real hw behind this device.
We just emulate the clock in order to do some SO_TXTIME testing.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
It is possible that user wants to access PTP clock but does
not need gPTP support. The networking txtime sample does exactly
this.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
It is possible that user wants to access PTP clock but does
not need gPTP support. The networking txtime sample does exactly
this.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If there is a UARTE receive error (e.g. framing or break), the RXTO
event may never come. Check error event too, to avoid an infinite loop.
Signed-off-by: Jim Paris <jim@jim.sh>
Replace all existing deprecated API with the recommended alternative.
Fixes#34102
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Fix stm32_dma_is_irq_active not checking the IRQ status(IsEnabled) for
active interrupts.
While the transfer-complete, half-transfer comp. and transfer-error
is_XX_irq_active() functions check for IRQ status (IsEnabled),
ORing the result with dma_stm32_is_gi_active() overrides the
status check as gi is always 1 in case any of these flags is active.
Related to commit 96c92ed93f.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use LL_DMAMUX_CHANNEL_x defines instead of DMAMUX_CSR_SOF7x to check
if corresponding LL_DMAMUX_IsActiveFlag_SOx and LL_DMAMUX_ClearFlag_SOx
inline functions exist and should be added to func_ll_is_active_so[]
and func_ll_clear_so[].
The HAL of some socs uses the same flag to decide which registers exist
on a specific soc. And the same defines are used for table_ll_channel[]
initializations.
This is necessary because DMAMUX_CSR_SOF5 and DMAMUX_CSR_SOF6 were
wrongly added in the HALs soc header file for some stm32g0 socs,
therefore without this change some stm32g0 socs couldn't compile.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Update the existing driver to support STM32G0 series.
It enables the DMA_STM32_SHARED_IRQS flag for g0 series, such that
all interrupts are handled in a shared isr to avoid irq conflicts.
The shared isr is extended to be able to handle irqs from more than one
dma instance.
Furthermore the config_irq function of instance 1, which connects to the
irqs, was reworked to avoid irq conflicts when 2 dma instances on
stm32f0, or stm32g0 are enabled:
While dma1 has one exclusive irq for channel 1, and one irq for dma1
channels 2 and 3, all other channels share the same irq.
Therefore it is currently not possible to enable dma2 without enabling
dma1 at the same time, without getting an build errror due to an irq
conflict.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Not all STM32 Series can enable a dedicated clock for dmamux.
In stm32g0 series for example the clock is enabled automatically
as long as either DMA1 or DMA2 is enabled.
This commit changes dmamux driver to cope with socs that don't have
defined a clocks property. Therefore it moves the config(and data)
struct into the c file to be able to use DT_INST_NODE_HAS_PROP macro.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In SMP, MPID is mybe not equal to cpu logic ID, so can't
use MPID to get rdist base address from gic_rdists[], this
patch get logic ID from arch_curr_cpu()->id, and
find current CPU's rdist base address from:
gic_rdists[cpu_logic_id]
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
For a zero-length transfer, the STOP task is not triggered
automatically by the shortcut with the event that signals
the transfer end because such event is not generated.
Trigger this task "manually" to prevent the driver getting
stuck after the address byte is acknowledged.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for delayed transmission of frames for the CSL
Transmitter OpenThread function.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
When BT and WiFi coexists, IRAM usage increases a lot.
Add configuration that allow wifi symbols
to be placed in flash, freeing space in IRAM.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
TWDT0 is loaded with a new value and the counter restarts counting with
it by written RST bit in Timer Control register (T0CSR) to 1. Then, the
RST bit in T0CSR register is cleared automatically on the 2nd rising
edge of T0IN clock. Since TWCP is set to 1:32, the maximum time that RST
bit is unset is 32 * (1 / 32768) ~= 980us.
Polling this bit within a critical section in current npcx watchdog
driver isn't a good approach since it might block the other interrupts
need to service them in time. This CL introduces a timeout mechanism and
removes the critical section to improve this disadvantage. Consider the
clock tolerance, 2 ms is a suitable timeout value for RST bit. We also
remove polling for WD_RUN bit in T0CSR. Npcx watchdog needs serval LFCLK
(32k Hz) clocks to stop watchdog. 1 ms is long enough for the timeout
mechanism.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This change enables A, C, D, E, G, H, I, J, K, and L groups,
and fix gpio interrupt function.
This change also pull (and rename) dt-bindings/irq.h to
dt-bindings/interrupt-controller/ite-intc.h, because it is
chip-specific.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ifee039981c2cc4cf5980e663702a9921e629fc1e
NPCX PWM supports output buffet select to push-pull or open-drain. Add
output buffer select option 'drive-open-drain' in devicetree for NPCX
PWM. If set, the PWM output will be configured as open-drain. If not
set, defaults to push-pull.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
During polling ITEN bit to make sure ITIM timer is enabled, we might
have the chance that npcx_itim_evt_enable() return fake error when
timeout expired but ITEN bit is set already if CONFIG_ZERO_LATENCY_IRQS
is enabled. (Since SVCall's interrupt priority is not the highest, the
other interrupts with IRQ_ZERO_LATENCY flag could preempt CPU resource
at this moment.)
In order to prevent return fake error code, this CL adjusts the check
conditions for ITEN bit and timeout.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
NPCX host access IRQ enables before entering deep sleep. The pending
bit lets chip wake up from sleep immediately. Clear host access IRQ
pending bit before enabling.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
With some additional macro-magic we can remove the CMake-based header
file template feature, and instead take advantage of the usual
DT_INST_FOREACH_STATUS_OKAY() macro.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
There are no boards that need hard-coded interrupts so just remove this
build-time conditional branch. The way going forward is that all PCIe
devices should always use PCIE_IRQ_DETECT.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Move emul.h out of the top level include/ dir into
include/drivers/emul.h and deprecated the old location.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add GPIO controller driver that can be found on Renesas
RCar gen3 soc series.
Controller can handle up to 32 GPIOs per banks.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Compare Match Timer is a 32 bit compare match timer
that can be found on various Renesas R-Car SoC.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Clock Pulse Generator, Module Standby Software Reset, are registers
presents in Renesas Gen3 SoC series.
MSSR is used to supply clock to the different modules, shuch as timer,
or UART, it's also possible to issue a reset the different module.
CPG registers allow to get the rate or to set some divider like for
the CAN clock.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Move ctx structure from struct data to struct config, so that
it can be filled at compile time and we could get rid of the bus
init routines.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
With some additional macro-magic we can remove the CMake-based header
file template feature, and instead take advantage of the usual
DT_INST_FOREACH_STATUS_OKAY() macro.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
There are no boards that need hard-coded interrupts so just remove this
build-time conditional branch. The way going forward is that all PCIe
devices should always use PCIE_IRQ_DETECT.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
We only need to distribute interrupts to CPU Cores with the count
of CONFIG_MP_NUM_CPUS, and get Core's MPID from CPU nodes in dts.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
These changes turn out to have been incompatible with the way pinctrl
drivers are going to work, so we need to go back to what we had before
until we can agree on a better approach.
Squash of the following reverts:
Revert "boards: nrf: fix deprecated I2C properties"
This reverts commit 2a4ac9ac02.
Revert "samples: switch nrf overlays to sda-gpios, scl-gpios"
This reverts commit 01bb08e7d8.
Revert "boards: nrf: switch to sda-gpios, scl-gpios"
This reverts commit 17a66304c4.
Revert "i2c: nordic: switch to phandle arrays for pinmux"
This reverts commit 821c03a14a.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
If a loaded endpoint was disabled and then reconfigured,
it is not possible to start an IN transfer and
usb_dc_ep_write() returns -EAGAIN.
Call ep_ctx_reset() to clear endpoint operations flags
and reset buffer after endpoint is disabled.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit fixes sporadic kernel panics when writing big data chunks
to the flash. (data bus errors). Just like the stm32g4 does.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit fixes sporadic kernel panics when writing big data chunks
to the flash. (data bus errors). Just like the stm32g4 does
but on instruction cache.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When 1.8V is disabled, sdhc can only
communicate at low speed. But this can
save the external circuit for switching
between 3.3V and 1.8V, which is very
practical in costdown scenarios.
Signed-off-by: Frank Li <lgl88911@163.com>
Some SPI NOR devices, particularly Atmel and SST, power-up with block
protect bits set in the status register. These bits must be cleared
before any erase or program operation can succeed. However, blindly
clearing bits in SR is wrong as some of these are non-volatile and
control chip behavior, including quad-enable.
Add a devicetree flag to identify device-specific BP bits in the status
register that should be cleared on startup only for devices that need
them, and when set do the clear during initialization.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the standard note to two functions that require the caller to have
first acquired the device.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Reads would wait until the device was ready before issuing the first
command; writes and erases did not. Fix this documenting and changing
so that wait-for-ready is invoked only where needed, i.e. to confirm
that a WRITE_STATUS, ERASE, or PROGRAM operation has completed before
proceeding to allow more commands to be submitted. This matches Linux
spi_nor driver behavior.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Make this driver multi-instance and use the new API.
This commit makes use of the new helpers introduced in #30536.
In particular:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
- get drdy gpios with GPIO_DT_SPEC_GET
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add regulator compatibility string to Kconfig.fixed file
and allow fixed regulator driver to be enabled when compatible
node is defined. However, remove this option from common Kconfig
as it is legitimate to enable/disable regulator support.
Change menuconfig REGULATOR_FIXED to config since this
menu nesting is not necessary.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This feature prevents issues when trying to write data to the flash
device that is located on or addressed at the same flash device.
An example is the mcuboot logic that writes a magic number to
the secondary partition header.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This fixes a bug in the write function of the MCUX FlexSPI flash driver
if the length of the data is larger than a single page.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This change allows writing to the flash while running in XIP mode,
and enables mcuboot or NVS settings to be used on i.MX RT socs.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Replace all existing deprecated API with the recommended alternative.
Be aware that this does not address architectural errors in the use
of the work API.
Fixes#34092
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The change is done to avoid redefinition errors while attempting
to enable flash_simulator with stm32 platform (stm32f4_disco)
which exports its own definition of FLASH macro, from stm32f407xx.h.
Unfortunately the stm32 definition is visible within flash_simulator
via inclusion of device.h.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
After changes in commit a42d6c98d3, the
pkt can no longer be a NULL pointer. Remove the unnecessary NULL pointer
check to silence the Coverity.
Coverity ID: 219536
Fixes#32912
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Support setting MAC address manually at runtime for Atmel SAM Ethernet
driver. The MAC address can be set using an ethernet management
request, e.g. (`net_mgmt(NET_REQUEST_ETHERNET_SET_MAC_ADDRESS, ...)`).
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
The structure is now k_work_delayable.
The init function is now k_work_init_delayable.
The submit function is now the k_work_reschedule.
The cancel function is now the k_work_cancel_delayable.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the missing parts for adding support
to stm32h7 dma driver.
The fix is to make dmamux driver work with
dma v1 driver.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
Replace all existing deprecated API with the recommended alternative.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Replace all existing deprecated API with the recommended alternative
for gsm_mux and uart_mux drivers.
Fixes#34103
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Replace all existing deprecated API with the recommended alternative.
Be aware that this does not address architectural errors in the use
of the work API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Replace all existing deprecated API with the recommended alternative.
Be aware that this does not address architectural errors in the use
of the work API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace all existing deprecated API with the recommended alternative.
Be aware that this does not address architectural errors in the use
of the work API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace all existing deprecated API with the recommended alternative.
Be aware that this does not address architectural errors in the use
of the work API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update eSPI buffer to values required per eSPI specification.
Allow applications to override as needed.
Guarantee buffers are not allocated at all if channels are
disabled.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Move the internal structs used by the generic, shared interrupt driver
from the public header file into the implementation file.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit is about the it8xxx2 analog to digital converter
driver. Support 8 channels ch0~ch7 and 10-bit resolution.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The ticker 'force' flag is propagated via the ticker elapsed callback,
in order to provide necessary information for collision resolving in the
link layer.
Signed-off-by: Morten Priess <mtpr@oticon.com>
First version of a driver for the st773r LCD controller.
Based on st7789v
Signed-off-by: Kim Bøndergaard <kim@fam-boendergaard.dk>
Signed-off-by: Kim Bøndergaard <kibo@prevas.dk>
If we are building the driver with CONFIG_UART_INTERRUPT_DRIVEN=n
we need to ifdef around the decleration of uart_cmsdk_apb_isr()
or we'll get a compiler warning.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The source clock of the watchdog module is selected to the input of T0
timer, not output. Correct the drawing in case confusing the users.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL adds support for console expired mechanism. It implements the
notification to power management module that the module for console is
in use. If the interval that module doesn't receive any input message
exceeds CONFIG_SOC_POWER_CONSOLE_EXPIRED_TIMEOUT, the power management
module is allowed to enter deep sleep mode. This mechanism gives a
window in which the users can organize console input.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces two configuration options which allows a notification
to the power management module that the UART console module is in use
now. If the interval of console module doesn't receive any input message
exceeds expired timeout, the power management module is allowed to enter
sleep/deep sleep state and turn off the clock of console module.
This mechanism gives a window in which the users can organize input
message if CONFIG_PM is enabled.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
NPCX watchdog driver has a WDT_NPCX_DELAY_CYCLES for delay the watchdog
reset time after the watchdog timeout. For some systems, users would
like to use the watchdog timeout ISR but don't reset the chip
immediately. Let the system have the final chance to ongoing the system
before the real hardware reset time. Removing the watchdog reset
waiting loop in ISR lets users decide whether wait for watchdog reset
by themself.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
As older series supported only 4 different prescaler values the
highest prescaler value was hardcoded. Newer series support 8
programmable prescaler values, therefore take the allowed values from
ll_wwdg header file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Series STM32G0, STM32G4, STM32H7, STM32L5, STM32WB, STM32WL have
a newer wwdg ip and store the prescaler value not in bits[8:7],
but bits bits[13:11], use the definitions from ll to account for that.
Remove IS_WWDG_PRESCALER, this is not required as the prescaler
is not calculated, but known valid prescaler values are tested until a
valid counter is found.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
1. remove redundant protection on channel status
2. update link interface to support major and minor link
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Modified eeprom shell fill command to be able to fill the complete
eeprom. The code of the fill command is now similar the new eeprom
read command.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Modified eeprom shell read command to be able to read out the complete
eeprom. The code of the read command is now very similar the flash
read command.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
After the commit c1f7b9f45a ("net: l2: ethernet: fix k_work API usage
in carrier on/off handling") each ethernet interface (including DSA
ports) shall first call ethernet_init() before carrier_on_of() function
is called.
As DSA ethernet interfaces (lan{123}) have their own k_work item to
monitor the carrier status (by reading switch IC registers), it was
necessary to move functions, which initialize it after the code which
sets up necessary interfaces (i.e. call ethernet_init(iface)).
In that way the error when accessing uninitialized members of ethernet
context is avoided.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add a possibility to get values of accelerometer measurement for
all 3 axis of accelerometer with one channel_get().
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Make this driver multi-instance and use the new API.
This commit makes use of some DT macro helpers
In particular:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
- get drdy gpios with GPIO_DT_SPEC_GET
Moreover the driver is now using the stmemsc common
routines as requested in issue #33440 and it avoids
the unnecessary declaration of both ctx_i2c and ctx_spi
in the data structure.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Take the int-pin information (i.e. what pin between INT1
and INT2 the drdy is attached to) directly from DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The SD Card below Physical Layer 1.10 does not support CMD6.
When usdhc_sd_init is executed, it will fail to exit due to
execution of CMD6, causing the SD Card to not work normally.
For different SD Card Physical Layer specifications,
the following modifications have been made:
Version 1.10 and above support CMD6.
Version 3.0 and above support CMD6 Group 3 (driver strength
and current limit) .
Signed-off-by: Frank Li <lgl88911@163.com>
In a previous commit, a check was added to ensure modem was properly
attached to packet service before initializing PPP. Failure to perform
this check can lead to the dreaded 'NO CARRIER' issue.
While this is a nice idea, the implementation was lacking because when
the check failed, the entire modem initialization procedure was
restarted from square one. For modems/bearers that were slow to attach,
this is potentially disastrous. The proper solution is to loop only the
'AT+CGATT?' part until it succeeds, or fails N times.
This commit implements this looping behavior (using the work queue).
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Fixes the FlexSPI NOR flash driver to register a new log module rather
than declare membership in the FlexSPI controller module, which was
recently moved from drivers/flash to drivers/memc.
This fixes build errors with the mimxrt1064_evk board in:
- samples/drivers/flash_shell
- samples/subsys/fs/littlefs
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Currently the MAX17055 driver assumes that a battery matching the
default characteristics is used.
This change allows battery characteristics to be specified in device
tree and writes them to the MAX17055 on initialization.
Existing default values are maintained for backwards compatibility.
Initialization routine taken from MAX17055 Software Implementation
Guide, document UG6365.
Signed-off-by: Hayden Ball <hayden@playerdata.co.uk>
Initially the flexspi device only supported a flash driver for
external NOR flash. As the controller supports HyperBus devices,
which can be either volatile or non-volatile, the driver iss moved
to drivers/memc.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The file is only really used on STM32 SoCs so we can move the contents
that are relevant into pinmux_stm32.h and remove the file.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The STMEMSC HAL i/f requires every driver using it to define
for each instance a stmdev_ctx_t structure, which is used to
export the hardware specific APIs to handle i2c and spi busses
operations. Since this structure is bus agnostic, there is no
need to declare it twice for both i2c and spi. Instead, declare
only one structure, which will be populated either with i2c APIs
or with spi APIs according to where that particular instance is
declared inside the DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Make use of the stmemsc i2c/spi read/write routine that
has been introduced to simplify the ST sensor drivers code.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add common i2c/spi read/write routines for the benefit of those
ST sensor drivers who make use of the stmemsc HAL i/f.
Add generic stmemsc_cfg_i2c and stmemsc_cfg_spi structures which
contains all relevant information required by i2c/spi low level
routines, such as:
- the pointer to the bus device
- the I2C slave address (if instance is on I2C bus)
- the spi_config structure (if istance is on SPI bus)
This level of abstraction allows the re-use of the i2c/spi read/write
routines among all stmemsc based sensor driver without the need to
reference the specific sensor data and or config structures.
The STMEMSC HAL source code is located here:
zephyrproject-rtos/modules/hal/st/sensor/stmemsc/
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Enable half transfer interrupt of the dma controller
in case the channel was enabled in circular mode.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
On stm32, the M bits defines the length of the frame between the start
bit and the stop bit, eventually including the parity bit when enabled.
Fix configuration of databits to set correct M bits when parity is
enabled.
This commit tries to address issue zephyrproject-rtos/zephyr#33351
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
Some tools consider this as commented code because of the ifdef, so
remove that and fix a coding guideline violation.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Tests of a value against zero should be made explicit, unless the
operand is effectively Boolean. This is based on MISRA rule 14.4.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Introducing PPP dialup features to enable e.g. usage of nrf9160
based board as a dialup modem for transferring ip data over PPP
(e.g. windows dial up), i.e. usage of Zephyr PPP as a server for
providing MTU/MRU, IP address and DNS addresses for a PC:
- PPP LCP MRU option (configurable)
- PPP server: IPCP ip and dns address peer options to enable
providing IP and DNS addresses for PPP peer.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
The comparison was inverted before so configuring a valid window
providing min and max was not possible.
Now the comparison is corrected and only done if the watchdog is used in
windowed mode.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Use a combination of fixed-clock and fixed-factor-clock devicetree
nodes for describing the clock dividers/multipliers of the NXP Kinetis
System Clock Generator (SCG) present in the KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Support single mode operation by enabling it and
making the driver to use the interrupt to findout
when the data is ready for fetch. The sample fetch
will be blocked for a specified maximum time untill
the interrupt happens.
* Make operation mode configurable in DTS file
* Make offset cancellation configurable in DTS file
* Use single common .yaml file for both i2c and spi
* Store above configurations in dev->config_info
Signed-off-by: Masoud Shiroei <masoud.shiroei@assaabloy.com>
Remove unnecessary "\n" at the end of logs.
Change LOG_DBG to LOG_ERR wherever is appropriate
Signed-off-by: Masoud Shiroei <masoud.shiroei@assaabloy.com>
Fixed Coverity CID: 219524 : Dereference after null check
For fix this issue added null check before call function pointer
Fixes#32913
Signed-off-by: JuHyun Kim <jkim@invensense.com>
Fix flash driver sync regression introduced due to changed
default ULL_HIGH in the commit 30634334a8 ("Bluetooth:
controller: Fix ULL_HIGH priority to be lower than LLL").
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
This patch removes scenario which was testing deprecated
API behaviors. Needed as As flash_write_protection_set() was
deprecated and became no-operation.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This patch removes scenario which was testing deprecated
API behaviors. Needed as As flash_write_protection_set() was
deprecated and became no-operation.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This patch removes scenario which was testing deprecated
API behaviors. Needed as As flash_write_protection_set() was
deprecated and became no-operation.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
flash_write_protection_set() API was deprecated so driver
implementation interface is left behind as well.
This patch removes all implementation pointed by the interface
'struct flash_driver_api.write_protection'.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
As CONFIG_FLASH_SIMULATOR_ERASE_PROTECT become a dead option.
this commit removes it as well.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
Write procedure was fixed so it doesn't lock the driver after
failure anymore.
flash_write_protection_set() will be deprecated.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().
flash_write_protection_set() will be deprecated.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
* Assumes that the USB2_OTG peripheral is being used in FS mode, as on
the NUCLEO-H743/753.
* Disable ULPI on USB2_OTFG, enable FS clk.
* Enable USB voltage detect and disable USB reg, per STM app notes.
Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
The NRF UARTE has an undocumented feature that when you flush the RX
FIFO, the RXAMOUNT register is not cleared to zero if the FIFO is in
fact empty. This fix is correcting something that was most likely a
typo.
Signed-off-by: Petri Oksanen <petri@iote.ai>
Currently CMSDK uart_irq_is_pending does not use RX and TX interrupt
bits found in INTSTATUS register to check for pending interrutps but
rather it checks for pending interrupts indirectly by checking if RX and
TX buffers are, respectively, full and empty, i.e. it checks bits 0 and
1 in STATE register instead of bits meant for interrupt status found in
INTSTATUS register.
That is particularly problematic because although a RX interrupt implies
a RX buffer full and a TX interrupt implies a TX buffer empty, the
converse is not true. For instance, a TX buffer might be empty for all
data was processed (sent to serial line) already and no further data was
pushed into TX buffer so it remained empty, without generating any
additional TX interrupt. In that case the current uart_irq_is_pending
implementation reports that there are pending interrupts because of the
following logic:
/* Return true if rx buffer full or tx buffer empty */
return (UART_STRUCT(dev)->state & (UART_RX_BF | UART_TX_BF))
!= UART_TX_BF;
which will return 1 (true) if STATE[0] = 0 (TX buffer is empty), since
UART_TX_BF = 1, so STATE[0] != UART_TX_BF, which is true (assuming here
for the sake of simplicity that UART_RX_BF = 0, i.e. RX buffer is empty
too).
One of the common uses of uart_irq_is_pending is in ISR in contructs
like the following:
while (uart_irq_update(dev) && uart_irq_is_pending(dev)) {
if (uart_irq_rx_ready(dev) == 0) { // RX buffer is empty
continue;
}
// RX buffer is full, process RX data
}
So the ISR can be called due to a RX interrupt. Upon finishing
processing the RX data uart_irq_is_pending is called to check for any
pending IRQs and if it happens that TX buffer is empty (like in the case
that TX interrupt is totally disabled) execution gets stuck in the while
loop because TX buffer will never transition to full again, i.e. it will
never have a chance to have STATE[0] = 1, so STATE[0] != UART_TX_BF is
always true.
This commit fixes that undesirable and problematic behavior by making
uart_irq_is_pending use the proper bits in the interrupt status register
(INTSTATUS) to determine if there is indeed any pending interrupts.
That, on the other hand, requires that the pending interrupt flags are
not clearly automatically when calling the ISR, otherwise
uart_irq_is_pending() will return immediatly false on the first call
without any data being really processed inside the ISR. Thus, because
both RX and TX buffer (FIFO) are only 1 byte long, that commit clears
the proper interrupts flags precisely when data is processed (fifo_read
and fifo_fill) or when the interrupts are disabled (irq_rx_disable and
irq_tx_disable).
Finally, that commits also takes the chance to update some comments,
specially regarding the need to "prime" when enabling the TX interrupts
(in uart_cmsdk_apb_irq_tx_enable()). The need to "prime" can be verified
in the CMSDK UART reference implementation in Verilog mentioned in the
"Arm Cortex-M System Design Kit" [0], on p. 4-8, section 4.3,
in cmsdk_apb_uart.v. In that implementation it's also possible to verify
that the FIFO is only 1 byte long, justifying the semantics that if
buffers are not full (STATE[0] or STATE[1] = 0) they are _completly_
empty, holding no data at all.
[0] https://documentation-service.arm.com/static/5e8f1c777100066a414f770b
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
The "spi-max-frequency" property already exists, but was unused. This
now sets the SPI clock frequency to this value (limited to 24MHz) once
initialisation is complete.
Due to the nature of the SPI API, it is necessary to have two separate
configuration structures to switch clock speed as some SPI drivers only
compare pointers to detect changes.
Fixes: #32996
Signed-off-by: Rich Barlow <rich@bennellick.com>
Before this change, the sw reset did not work after power-on, because
I2C commands are only accepted after 20msec (t_START after power-on).
Now the 20msec delay is moved before performing the reset to ensure that
the SW reset command can be executed. An additional 2msec delay is added
after the reset (see datasheet t_START after reset).
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
There was an inconsistency in the API as z_nrf_rtc_timer_chan_alloc
returned int but other function were using uint32_t for channel
argument. Updated api to use int32_t everywhere.
Update nrf_802154 driver which was using this api to use int32_t.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The bit RCC_MC_APB3ENSETR_PMBCTRL and RCC_MC_AHB5ENSETR_AXIMC
does not exist in the stm32mp1xx ref manual anymore.
They are not present in the stm32mp1xx_ll_bus.h (v1.4.0).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move ptp_clock.h out of the top level include/ dir into
include/drivers/ptp_clock.h and deprecated the old location.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use ep_idx in usbip_send_common() instead of endpoint address
and get direction from endpoint address.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
USB setup packet is a part of USBIP_CMD_SUBMIT, but missing
in struct usbip_submit. This patch fixes it and removes
usbip_skip_setup() and adds an additional integrity check
in handle_usb_control().
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The transfer length is not stored and processed properly.
Use struct usb_ep_ctrl_prv, which we already have, to store
the transfer length and data. Move usbip_recv() to
handle_usb_control() and handle_usb_data(),
and explicitly copy USB setup packet.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Call the IN callback only if data in usb_dc_ep_write()
is actually written to the intermediate buffer and sent.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Use pointer to struct usb_ep_ctrl_prv, which allows to remove
a few variables and simplifies subsequent improvements.
Use consistently ep_idx in handle_usb_control() instead of
ntohl(hdr->common.ep).
Revise logging so that it is clearer what event is being processed.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Coverity complains about unchecked return value for `k_sem_take` which
is called with `K_FOREVER` and thus cannot expire/timeout. Explicity
ingore the return value to silence Coverity.
CID: 219676
Fixes#33019
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Several wifi drivers add some form of zephyr_include_directories(.)
which isn't needed since the headers in the specific driver dir get
included via #include "foo.h". So we can remove any uses of
zephyr_include_directories(.)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add initial support for the Cortex-M55 Core which is an implementation
of the Armv8.1-M mainline architecture and includes support for the
M‑profile Vector Extension (MVE).
The support is based on the Cortex-M33 support that already exists in
Zephyr.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move disk driver interface to own header and
separate disk access interface and disk driver interface.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add common SDMMC_LOG_LEVEL and SDMMC_VOLUME_NAME.
Initialize drivers at POST_KERNEL level.
Update CODEOWNERS after sdmmc drivers relocation.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The files disk_access_usdhc.c, disk_access_spi_sdhc.c,
disk_access_stm32_sdmmc.c, disk_access_ram.c and
disk_access_flash.c are actually drivers for block devices and SD/MMC
controllers. This patch moves this drivers to drivers/disk and
reworks the configuration so that the drivers are selected when
the corresponding node is enabled.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Resolution currently only gets set if CONFIG_MCP9808_TRIGGER is also
set. If CONFIG_MCP9808_TRIGGER is not set, resolution gets not to '0'.
This small bug fix moves resolution to before CONFIG_MCP9808_TRIGGER is
checked, so that the resolution is changed as required.
Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
The BQ274XX driver init function performs a lot i2c transfers
that slow down booting the system. We can do this lazely on the
first sample request to speed up the boot.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
List all supported device IDs found in External Design Specification
Volume 1 which have IBECC supported.
Fixes#33543
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This patch includes initial support for FT800 display driver.
It includes basic features. It can be easily extended with more
FT800 display list and co-processor features.
Signed-off-by: Hubert Miś <hubert.mis@gmail.com>
This feature predated the tickless kernel and has been in legacy mode
for a while. We now have no drivers or systems that do not support
tickless, so remove this option and cleanup the code to only use
tickless.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This is another API that is being used in all timer drivers and is not
internal to the clock subsystem. Remove the leading z_ and make promote
it to a cross-subsystem API.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The clock/timer APIs are not application facing APIs, however, similar
to arch_ and a few other APIs they are available to implement drivers
and add support for new hardware and are documented and available to be
used outside of the clock/kernel subsystems.
Remove the leading z_ and provide them as clock_* APIs for someone
writing a new timer driver to use.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Increase BD buffers from 7 to 9 to handle 1024 block
counts having mega/normal src,dst bd combinations in one request.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Sync packet is always CARD to HOST and if it's combined with HOST
to CARD transfers in one single RM header packet, it's not allowed
due to RM implementation constraints. RM implementation allows same
type of data transfer direction in all the BD's populated under one
header BD.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Remove support for counter_read and counter_get_max_relative_alarm as
they have been deprecated for at least 2 releases. As part of the
removal of counter_get_max_relative_alarm remove the code in all
counter drivers that implemented the API.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
GPIO driver properly disconnects a pin. On subsequent pin
configure calls the driver does not clear the GPIO pin's
power gate field resulting in the pin remaining disconnected.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Function random_byte_get() returns only the least significant byte of
the 32-bit random datum, as this is the used value, so avoiding that
higher numbers are interpreted as negative error codes and their value
is not discarded.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
In NPCX chips, System Configuration module can configure not only
pinctrl but also misc. functionality such as glue and flash write
protection. This change moves the scfg driver from the pinctrl folder
to soc/arm/nuvoton_npcx/common and renames it to avoid confusion.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Register T0CSR bit 4 is WDRST_STS which is used to check whether the
chip has watchdog reset from the last power-up or vcc1_rst. WDRST_STS
hardware is design to write one clear. For the original
read-modify-write, it will reset the WDRST_STS unexpected. Add a mask
to avoid it.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
This CL solves an interrupt storm caused by plenty of host access
messages when system is in S0. It only turns on the host access
interrupt before ec enters sleep and turns it off after leaving
sleep.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Adds support for the Texas Instruments FDC2X1X Capacitance-to-Digital
Converter for Proximity and Level Sensing Applications.
Signed-off-by: Igor Knippenberg <igor.knippenberg@gmail.com>
Added support for STM32H753XX by adding CONFIG_SOC_STM32H753XX to list
of H7 SoC with maximum 480MHz SYSCLK.
Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
When, due to EMC, a spike happens on the SCL line the driver stay in
BUSY state. It could be reproduced by forcing the SCL temporarily to
ground. It's probably a behavior relating to the operation of
multi-master.
By adding a timeout to the msg_read and msg_write function we can
detect that something went wrong, and when that happens we force the
end of communication.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Advanced stm32g0 socs additionally have gpio port e.
This commit adds the missing definition for the port.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Currently level interrupts are implemented using GPIO SENSE, but edge
interrupts using GPIOTE events. Using GPIOTE events results in increased
power consumption according to product specifications and erratas of
some nRF MCUs. In case of nRF52832 it is <20uA in System ON Idle and
~400-450uA when used in conjunction with SPI or TWI.
Add a user configurable option to select between GPIOTE events and GPIO
SENSE mechanism, for implementing edge interrupts. Selecting GPIO SENSE
option will allow to reduce power consumption in scenarios mentioned by
nRF MCUs erratas.
Additionally GPIO SENSE mechanism (as opposed to GPIOTE event) allows to
detect state changes of pins configured as output.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Ported commit 49a3ce5881
Transfer locking is required if multiple devices use the same i2c bus.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The fixed number of 24 RTEs is a legacy thing, and long gone by now.
IOAPICs expose the maximum number of RTEs they have via the version
register, so let's use it.
This avoids to manually tweak a Kconfig option (which is now removed)
and fixes the RTE number for all x86 targets relevantly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Autostarting PPP is far from controversial. There are many, many reasons
someone could have for wanting to control exactly when PPP starts. Power
management, NET_EVENT race condition avoidance and any application not
requiring constant and instant use of networking just to name a few.
This commit introduces a Kconfig setting, GSM_PPP_AUTOSTART, which
controls whether gsm_ppp should connect and initialize PPP at boot. It
is set to "y" as default to minimize surprises for legacy code.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Added (void) cast to supress coverity report. The usage of K_FOREVER
tells me we're not interested in the returned value.
Coverity-CID: 219653
Fixes#33034
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
Add GPIO driver for QuickLogic EOS S3 SoC.
Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>
Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
If return value is negative (failed) then log the error with a
message.
Coverity-CID: 219519
Fixes#32927
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
This commit simplifies the Device Tree configuration by using
the new helpers introduced in #30536.
In particular:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Currently, if GPIO_DISCONNECTED flag is used pin remains as input,
this causes some additional power to be drain which is
undesired.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Remove useless operands since 'bit' field of npcx_clk_cfg structure is
only 3-bit depth and always under 8.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL prevents changing data content in the write function of host
interface by declaring it as constant pointer.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In function wwdg_stm32_init, return value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219600).
Fix this.
Fixes#33067
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In function gpio_stm32_enable_int, retiurn value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219652).
Fix this.
Fixes#33035
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
RX/TX buffer depth are configurable parameters of DW_apb_i2c.
Change code from using fixed value I2C_DW_FIFO_DEPTH to using
register ic_comp_param_1 for RX/TX buffer depth.
Signed-off-by: Satoshi Ikawa <ikawa.satoshi@socionext.com>
Fix#32774
Bit position BIT(7) is 1000 0000 in binary which is actually the
bit positon 128. BIT(7) can be used as a mask, but we need to define
the position specifically as the integer 7.
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
Remove SPI_[0-8] and SPI_[0-8]_OP_MODES Kconfig symbols as no driver
uses them anymore. We also cleanup board and sample code to remove
use of these symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add MCGOUTCLK define to kinetis_mcg.h to make it possible to
use \`<&mcg KINETIS_MCG_OUT_CLK>\` in device tree.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
There was a bunch of dead historical cruft floating around in the
arch/xtensa tree, left over from older code versions. It's time to do
a cleanup pass. This is entirely refactoring and size optimization,
no behavior changes on any in-tree devices should be present.
Among the more notable changes:
+ xtensa_context.h offered an elaborate API to deal with a stack frame
and context layout that we no longer use.
+ xtensa_rtos.h was entirely dead code
+ xtensa_timer.h was a parallel abstraction layer implementing in the
architecture layer what we're already doing in our timer driver.
+ The architecture thread structs (_callee_saved and _thread_arch)
aren't used by current code, and had dead fields that were removed.
Unfortunately for standards compliance and C++ compatibility it's
not possible to leave an empty struct here, so they have a single
byte field.
+ xtensa_api.h was really just some interrupt management inlines used
by irq.h, so fold that code into the outer header.
+ Remove the stale assembly offsets. This architecture doesn't use
that facility.
All told, more than a thousand lines have been removed. Not bad.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Serial Wire JTAG configuration option is made available
under condition that SPI_3 was not enabled on SOC_STM32F103XE.
Besides being obsolete there are various other potential conflicts
with other periphals, and it is not possible to explicit them all.
To make it more coherent remove such condition, assume that user
needs to take care of such pin conflict and express SWJ as having
precedence over peripheral devices pin configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Lowest power consumption can be achieved when uarte peripheral
is disabled when not used. In low power mode, need for both
directions is tracked and if both are no in use peripheral is
disabled. TX disabling is instant but RX requires flushing RX
fifo because data in hardware fifo is lost when peripheral is
re-enabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Refactored driver to prepare for low power extension. Functional
change is limited to handling of RX_DISABLED event which is now
generated from RXTO interrupt context after RX is stopped. Previously,
RX was not stopped after the transfer.
Rx flushing function contains hardware limitation workaround.
Workaround is applied only if flushed data is not discarded.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Some modems, under some conditions, have a tendency to get stuck without
a connection due to cached state. We have observed this on some Simcom
LTE modems after large cellular outages. The modems are unable to escape
their cached state for some reason unless they're factory reset (or a
cache clearence is forced in some other way).
This commit allows for the modem to be factory reset at each boot. This
minimizes dependencies on external state by ensuring each power-up is as
similar as possible.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Current DW I2C driver uses 32 bit access for some registers and
16 bit access for others. So if DW I2C IP is connected via bus
which doesn't support 16 bit access we will get bus error.
Fix that by switching to 32 bit access only instead of 16
and 32 bit mix.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
As this header declares a function that uses a cube defined structure
as argument, it should include the matching header.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add SMP support.
Note: there is still limitation that we rely on NUM CPUs.
And all cpus must be from 0,1,2 and ....
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There was an error in the ordering of the parameters in the
DEVICE_DT_DEFINE for the native POSIX counter. This made a project
using a counter built for native posix not being able to compile.
This commit switches places for ctr_init and device_pm_control_nop.
Signed-off-by: Tofik Sonono <tofik@sonono.me>
Currently there is no way to distinguish between a caller
explicitly asking for a semaphore with a limit that
happens to be `UINT_MAX` and a semaphore that just
has a limit "as large as possible".
Add `K_SEM_MAX_LIMIT`, currently defined to `UINT_MAX`, and akin
to `K_FOREVER` versus just passing some very large wait time.
In addition, the `k_sem_*` APIs were type-confused, where
the internal data structure was `uint32_t`, but the APIs took
and returned `unsigned int`. This changes the underlying data
structure to also use `unsigned int`, as changing the APIs
would be a (potentially) breaking change.
These changes are backwards-compatible, but it is strongly suggested
to take a quick scan for `k_sem_init` and `K_SEM_DEFINE` calls with
`UINT_MAX` (or `UINT32_MAX`) and replace them with `K_SEM_MAX_LIMIT`
where appropriate.
Signed-off-by: James Harris <james.harris@intel.com>
Added CLOCK_CONTROL_NRF_FORCE_ALT dependency to some options which
are not valid when clock is controlled by out-of-tree driver.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Modified CLOCK_CONTROL_NRF_ACCURACY to represent integer value of
LF clock accuracy.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The shim layer could in some circumstances not be properly
configured which would result in an unbound radio interrupt
handler.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Add a name to the h4 rx thread.
It's useful to put a name on each thread for debugging, e.g., with the
shell's kernel threads command.
Signed-off-by: Pete Skeggs <peter.skeggs@nordicsemi.no>
Zero initialize the ch_handle in dma_pl330_configure().
The memset in dma_pl330_config_channel()is incorrect,
as the ch_handle is already populated with valid values and
the dma_pl330_config_channel() is overwriting with zeros.
Signed-off-by: Arjun Jyothi <arjun.jyothi@broadcom.com>
AArch64 has support for PSCI. This is especially useful for SMP because
PSCI is used to power on the secordary cores.
When the PSCI driver was introduced in Zephyr it was designed to rely on
a very PSCI-centric subsystem / interface.
There are two kinds of problems with this choice:
1. PSCI is only defined for the non-secure world and it is designed to
boot CPU cores into non-secure state (that means that PSCI is only
supposed to work if Zephyr is running in non-secure state)
2. There can be other ways or standards used to start / stop a core
different from PSCI
This patch is trying to fix the original wrong assumption by making the
interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI
only as an actual driver that is a user of this new interface /
subsystem.
For now the new subsystem is only exposing two methods: cpu_on and
cpu_off, others will probably follow according to the needs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The name for registers and bit-field in the cpu.h file is incoherent and
messy. Refactor the whole file using the proper suffixes for bits,
shifts and masks.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
There is a hardcoded macro in Winc1500 HAL SPI driver
that would prevent the driver from working.
This macro is now defined only based on KConfig entry.
This KConfig entry is by default not set.
To enable, set "CONFIG_WINC1500_DRV_USE_OLD_SW=y"
in proj.conf or board.conf
Signed-off-by: Raja D. Singh <rdsingh@iotwizards.com>
Replace legacy API with new API. Note that this driver uses the
schedule, not reschedule, API, since triggers for delay never overlap.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Now that pinmux driver holds a table of GPIO device pointers,
use gpio device as the single source of trust for gpio_base
and remove use of port_base and related code.
This way, gpio_stm32_configure could directly take gpio device
pointer as argument.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use new gpio_stm32_clock_request function for GPIO clocks control.
To do this a new table of GPIO devices is set up at build time.
It is then used to populate targeted device when calling
gpio_stm32_clock_request.
Clean up remaining clock handling related code in the file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As a preparation for GPIO ports clocks power management,
add a dedicated central function fog GPIO ports clock toggling.
This function is made accessible to other users (pinmux).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On L4/L5 device, GPIO port G benefits from a dedicated supply
rail that should be enabled independently.
Review the code around this:
-Compile only when port G is enabled
-Assume that PWR clock is ON, as it is enabled as part of clock init
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The DMA module the i2s_sam_ssc relies on cannot change during the
runtime. Store pointer to dev_dma in flash, not in RAM. The new
implementation saves 40 bytes of flash and 32 bytes of RAM.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Either get priority from devicetree (liteeth) or remove Kconfig symbols
that aren't used anywhere for IRQ priority (gecko, stm32_hal).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Looking at the data sheet for the npcx section 4.15.5 CR_UART Core
Registers, the UICTRL register that is used in the npcx poll
functions is invalid when running in FIFO mode. Instead, calls to
uart_npcx_poll_in and uart_npcx_poll_out should be redirected to
their respective FIFO read/fill functions (when using interrupts).
Changes:
- When calling uart_poll_in: forward the request to uart_fifo_read.
- When calling uart_poll_out: loop until uart_fifo_fill returns
non-0 (we wrote 1 byte).
Signed-off-by: Yuval Peress <peress@chromium.org>
Simple reorg of the function declarations. This change moves
the interrupt driven functions declared at the bottom of the
uart_npcx.c file to the top, clustered under the same ifdef.
Signed-off-by: Yuval Peress <peress@chromium.org>
All dma drivers are devicetree based now so we can remove the last
bits of Kconfig associated with the old driver style.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can utilize the devicetree macros to determine which instances to
enable. This will allow us to phase out the per instance Kconfig
symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Nothing sets the op mode to anything but master. For now default the
mode to master-only and we can determine a devicetree property in the
future if we need to support other configurations.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace Kconfig symbols SPI_DW_PORT_n_INTERRUPT_SINGLE_LINE with just
seeing how many IRQs are defined in the devicetree to determine single
or multiline interrupt support.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SoC that utilized the clock support isn't supported in Zephyr
anymore and there are no users of this code. Remove it for now as it
should get converted to utilize devicetree if needed in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If next_timeout() returns INT_MAX and pass it to
z_clock_set_timeout(), and machine goes to freeze or slow down.
Bad scenario as follows:
- If an argument int32_t ticks is set large value 0xffffffff,
ticks = MAX(MIN(ticks - 1, (int32_t)MAX_TICKS), 0);
replaces it into MAX_TICKS.
- uint32_t cyc will be set near by 0xffffffff
(this is 0xfffd7280 in 100 ticks per second).
- Add adjustment to cyc, adjustment max value is MAX_CYC.
(cyc = 0xffff14fd)
- Over 0x80000000 value of uint32_t is considered as negative
value of int32_t.
if ((int32_t)(cyc + last_count - now) < MIN_DELAY)
This condition is always true.
- Because cyc += CYC_PER_TICK will get overflow, driver sets mtimecmp
near value of current mtime.
(cyc = 0x00007fc0)
- Next timer interrupt will happen soon after return from interrupt
handler.
- By repeating these events, machine cannot go to next instruction,
and it's going to freeze or slow down.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Conver the NIOS-II mSGDMA driver to be devicetree based. Add node for
dma controller into nios2f.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When running the tests of the async api of uart
on nucleo-l4r5zi we get MPU fault.
The reason is ordering initialization. The uart and dma
drivers are initialized PRE_KERNEL_1 while dmamux is
initialized POST_KERNEL.
Thus, the function device_get_binding fails since the
dmamux device is not ready to be used.
Fixes: #32715.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
Convert driver and users of pinmux on mcux lpc platforms to getting
basic port info from devicetree (register address, label)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Deprecate the scl-pin and sda-pin properties in the devicetree.
Provide new scl-gpios and sda-gpios properties instead.
This lets the user specify SCL and SDA like this:
&i2c0 {
scl-gpios = <&gpio0 1 0>;
sda-gpios = <&gpio1 4 0>;
};
Instead of having to use:
&i2c0 {
scl-pin = <1>;
sda-pin = <36>;
};
Provide error checking and understandable error messages for invalid
configurations.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The current code is assuming that the SMC/HVC helpers can only be used
by the PSCI driver. This is wrong because a mechanism to call into the
secure monitor should be made available regardless of using PSCI or not.
For example several SoCs relies on SMC calls to read/write e-fuses,
retrieve the chip ID, control power domains, etc...
This patch introduces a new CONFIG_HAS_ARM_SMCCC symbol to enable the
SMC/HVC helpers support and export that to drivers that require it.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Convert ism330dhcx INT_PIN attribute from Kconfigs to Device
Tree binding properties. Here int-pin has been defined as
enum with two possible values: 1 and 2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Convert ism330dhcx accel and gyro odr attributes from Kconfigs to Device
Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Converts ism330dhcx accel and gyro range attributes from Kconfigs to
Device Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
SX1272 chip is very similar to the already supported SX1276;
unfortunately, Semtech provides a completely separate driver
for this one. This commit marks an attempt to avoid code
duplication by means of some not-very-pretty ifdefery.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
The default shell configuration has heavy flash and memory requirements,
requiring project maintainers to set many configuration options to "n"
to keep flash and memory requirements within reason.
This adds a new configuration option, CONFIG_SHELL_MINIMAL, which will
disable flash and memory heavy options by default, and allow project
maintainers to select/imply only the options they want.
On a quick test from an ARM board I'm working on, enabling this option
cut flash space requirements by ~8 KB, and memory requirements by ~1 KB.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
There is no longer a mem_block pointer in the stream struct so the
assert NULL check isn't relevant anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move dmamux_stm32_channels struct from device data to device
configuration and initialize the dmamux channel - dma channel
assignment during build time,
as this association is hardwired in all known series.
The information is taken from dma_offset and dma_requests device tree
properties. The current implementation is valid for series with either
a single or two dma peripherals and a single dmamux peripheral.
Both dmas can independently enabled.
As the driver uses multi-instance DT_INST_DEFINE, also macros for a
second dmamux are are added that should allow easier extension to a
second dmamux instance.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use timeout mechanism instead of unbounded loop during enabling ITIM32
module which source clock is LFCLK (32KHz).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
mpu9250 is a single package that contains both an mpu6050 6-axis
motion sensor and an ak8963 magnetometer. The two parts have
separate i2c addresses, yet despite the common mpu6050 component,
it has a different value in the "WHOAMI" register -- 0x71 instead
of 0x68.
This adds the additional chip id value in order to enable the use
of mpu9250.
Signed-off-by: Adam Serbinski <adam@serbinski.com>
Qemu when running more than one processor has a known synchronization
bug where counter values read from the HPET (notionally a single
global device) can be seen going "backwards" when read from different
CPUs.
There was a pre-existing workaround in the ISR that knew about this,
but the problem can crop up anywhere the counter value is used. In
particular I caught it aliasing with the "max_ticks" computation in
z_clock_set_timeout(), where it would cause a rollover and the
resulting negative comparator value would result in no end of
hilarity.
Wrap all access to the counter register with a counter() inline that
(when the workaround is enabled) forces the result to be monotonic by
clamping it to a minimum of one more than the previously read value.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This also makes it into arch_printk_char_out() which gets linked
in place of the weak symbol version, meaning printk() is usable
as soon as the stack is set up.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The driver was reworked recently so that driver capabilites are
obtained at runtime. The function to obtain the capabilities was
called after L2 initialization though, which is invalid as L2
initialization code already depends on certain driver capabilites.
Move the capability initializer to an earliest possible stage
(i. e. just after the core driver is initialized) to fix the issue.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The comments at the beginning of the file are not quite correct
and instructions regarding configuration are not necessary at all.
Also remove the redundant first line.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Move the SPI and I2C bus I/O bits into their own files. This makes
this driver more similar to other sensor drivers.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Now that we have various convenience macros in drivers/spi.h and
device.h defined, we can resolve some longstanding TODO items in how
this driver gets a hold of the devices it depends on:
- get bus devices with DEVICE_DT_GET
- get SPI chip select information with SPI_CONFIG_DT_INST
The results are shorter on boilerplate, save RAM, and improve boot
time.
The same techniques could be reused by other device drivers.
These changes require that the SPI bus and GPIO (for device CS)
devices used to interface with the BME280 are defined in devicetree.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The PDP context might be active.
If that's the case, the AT+QIACT command returns an error.
It's then not possible to succeed at setting up the module.
Furthermore, we apply the logic described in the Quectel Documentation :
- If there is an issue 3 consecutive times on activating/deactivating
the context, we restart the module.
- If the AT+QIDEAT command returns an error, we restart the module.
This PR is bug-fix aimed.
We leave parameterization of context ID for future enhancement.
Signed-off-by: Thomas LE ROUX <thomas.leroux@smile.fr>
In NPCX7 series, it contains two tachometer (TACH) modules that contains
two Independent timers (counter 1 and 2). They are used to capture a
counter value when an event is detected via the external pads (TA or
TB).
The CL also includes:
— Add npcx tachometer device tree declarations.
— Zephyr sensor api implementation for tachometer.
— Enable "tach1" device in npcx7m6fb.dts for testing.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The stm32 uart driver fails to build on certian platforms due to
changes introduced by:
commit 3c18bcbf77
Author: Francois Ramu <francois.ramu@st.com>
Date: Wed Jan 27 10:27:33 2021 +0100
drivers: serial: stm32 restore uart after lowpower
Fix this by adding some ifdef's around the code that is specific to the
given platforms that the code works on.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Current implementation of uart_npcx_irq_{tx,rx}_ready always returns
false if the respective interrupt enable bit is not set, which means
that the api cannot be used if the interrupts are temporarily disabled
for whatever reasons, breaking patterns such as [1].
Other uart drivers also seems to not have this check, this patch removes
it from the NPCX driver too.
[1] https://github.com/zephyrproject-rtos/zephyr/blob/master/drivers/console/uart_console.c#L549
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Since the uart device clock will be stopped after ec entered sleep or
deep sleep state and restore its clock automatically, there is no need
to implement code for suspending and resuming devices manually.
The driver still needs to check the current status of uart device when
it wants to change its power state to LOW or SUSPEND power state. It is
crucial to forbid ec enters sleep or deep sleep state when uart device
is busy with transmitting data. Or we will observe broken characters on
the uart console.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces power management driver that improves the efficiency
of ec operation by adjusting the chip’s power consumption to the level
of activity required by the application in npcx series.
The following list summarizes the main properties of the various chip
power states. Please refer the power.c file for more detail.
Main power states in npcx series include:
- Active: Core, RAM and modules operate at the clocks generated by PLL.
- Idle: Enter this state when the Core executes WFI or WFE instruction.
- Sleep: clock is stopped for most of modules but PLL is enabled.
- Deep Sleep: As Sleep mode but PLL is disabled.
- Standby: All power rails are turned off besides standby and battery
power rails.
And this CL implements one power state, PM_STATE_SUSPEND_TO_IDLE, with
two sub-states for Zephyr power management system.
Sub-state 0 - "Deep Sleep" mode with “Instant” wake-up if residency
time is greater or equal to 1 ms
Sub-state 1 - "Deep Sleep" mode with "Standard" wake-up if residency
time is greater or equal to 201 ms
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces a kernel device driver implemented by the internal
64/32-bit timers in Nuvoton NPCX series. Via these two kinds of timer,
the driver provides an standard "system clock driver" interface.
It includes:
- A system timer based on an ITIM64 (Internal 64-bit timer) instance,
clocked by APB2 which freq is CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
- Its prescaler is set to 1 and provide the kernel cycles reading
without handling overflow mechanism.
- A event timer based on an ITIM32 (Internal 32-bit timer) instance,
clocked by LCLK which frequency is 32KHz and still activated when ec
entered "idle/deep idle" power state for better power consumption.
- Its prescaler is set to 1 and provide timeout event mechansim.
- Compensate system timer which clock is gating for better power
consumption after ec left"idle/deep idle" power state.
This CL passed starve, timer_api, and timer_monotonic test suites.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This will export the stm32_clock_control_init function
to restore the clocks after the low power modes.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Rework the checks for INPSEL, INNSEL, and C0_OFFSET_BIT presence to
avoid warnings when -Wexpansion-to-defined is enabled.
The warning was enabled in c7bc6380bd.
Fixes#32475.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This fixes the logic in erase_sector() for clearing the previous
sector number. The logic was reversed, clearing bits it should not
clear and keeping previous bits of the sector number. In practice this
does not seem to have had any effect on the current functionality, but
it will start to matter later if e.g. flash interrupts are enabled.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Modifications to incorporate latest write to new flash area
Modification to avoid writing garbage to new flash area when compactor
is called during init.
Modifications to allow erase at partition size instead of eeprom
pagesize.
Modifications to better separate rambuf usage from flash usage.
Corrected some errors in compactor
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
This driver emulates a EEPROM device in flash.
Reworked implementation with modified flash layout.
The emulation represents the EEPROM in flash as a region that is a
direct map of the eeprom data followed by a region where changes to
the eeprom data is stored. Changes are written as address-data
combinations. The size of such a combination is determined by the
flash write block size and the size of the eeprom (required address
space), with a minimum of 4 byte.
The eeprom page needs to be a multiple of the flash page. Multiple
eeprom pages is also so supported and increases the number of writes
that can be performed.
The eeprom size, pagesize and the flash partition used for the eeprom
are defined in the dts. The flash partition should allow at least two
eeprom pages. For fast read access a rambuffer can be enabled for the
eeprom (by setting the option rambuf in the dts).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
CAN_SYNC_SEG and ts1 are in common units. Both need to be scaled by 1000
to calculate the sample point.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In the npcx i2c FIFO mechanism, the hardware will release SCL bus
immediately after the driver reads data from FIFO. That's why we need
to hold SCL bus before configuring the next transaction. Once it was
done, the driver release the bus for the next transaction.
But during the last transaction, the driver releases SCL first then
starts a STOP condition. At this moment, the SCL is pulled high by PU
resistance and driven to low for generating STOP condition later. This
additional clock might influence some i2c devices if they don't reset
their state machine after receiving STOP.
This CL fixes this issue by two steps:
1. Distinguish that it's the last read transaction with STOP condition?
2. If so, issue STOP condition before reading FIFO instead of holding
SCL bus. Then the hardware will generate it immediately after reading
FIFO.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The definition to check if timers have up to 6 channels was causing
warnings when -Wexpansion-to-defined was enabled.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The first uart instance was already devicetree based. To be consistent
convert the second instance to also be devicetree based.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
QDEC_NRFX shall depend on either HAS_HW_NRF_QDEC,
or HAS_HW_NRF_QDEC0, since in the nRF5340 Application
core definition we select HAS_HW_NRF_QDEC0 instead of
HAS_HW_NRF_QDEC.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
While running certain peci command, observed when FW attempts
to read last byte (Response FCS), PECI host controller returned
“Read FIFO” empty. Since “Read FIFO” is empty FW didn’t read
the response FCS.
Due to this issue, FW getting corrupted response from the PECI
controller for all the subsequent PECI commands.
To address this issue, FW waits for “Read FIFO” filled up by
the PECI controller.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
Convert from device_get_binding to DEVICE_DT_GET. In doing this we
no longer need the label in the devicetree node so we remove that.
Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This fixes a missing bit in the registers description
which results to wrong FIFO ODR configuration
when trying to configure a FIFO ODR higher than 833Hz
Signed-off-by: Clotilde Sattler <clotilde.sattler@stimio.fr>
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device. As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a follow-up to commit 9f56cc5531.
Add net/ in the inclusion of ieee802154_radio.h so that the file can
be successfully included.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The CMSDK uart interrupts for TX and RX can either be treated as a
signel interrupt line or distinct interrupts for TX & RX. In the case
that they were distinct we didn't get the ifdef correct based on DTS.
If we have 2 interrupts in DTS we assume they are for TX & RX and thus
build the interrupt support for distinct TX & RX ISRs.
Also, cleanup handling of UART_2..UART_4 to be similar to how
UART_0/UART_1 code is using DT_INST_IRQN(x).
Fixes#30770Fixes#25601
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A recent patch removed use of the cfg structure, but left a pointer to
it defined which causes build failures.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The NPCX clock driver was already using devicetree, just need to make a
small tweak to use DEVICE_DT_INST_DEFINE and update NPCX_CLK_CTRL_NAME
to match the label for the "nuvoton,npcx-pcc" clock controller.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a simple pinctrl node for the IOF registers under the GPIO
controller node to be used by the pinmux driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert esp driver:
NET_DEVICE_OFFLOAD_INIT -> NET_DEVICE_DT_INST_OFFLOAD_DEFINE
DT label is already required, so use it and drop CONFIG_WIFI_ESP_NAME
option.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Convert ublox-sara-r4 driver:
NET_DEVICE_OFFLOAD_INIT -> NET_DEVICE_DT_INST_OFFLOAD_DEFINE
DT label is already required, so use it and drop
CONFIG_MODEM_UBLOX_SARA_R4_NAME option.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This include make possible to use the arm_arch_timer on
platform such as Cortex-A9 or Cortex-R7 which has support for
ARM Global Timer.
The global timer is a 64 bit incrementing counter, memory-mapped
in the private memory region.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
In some cases we cannot know the BDF up-front, so provide a way to
look it up based on the vendor and device ID.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
These have been redefined in various places - better to have them in a
single place that different users can use.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add ESPI SAF features to the Microchip eSPI driver as
a separate file. ESPI SAF depends upon the core eSPI
driver adding the ability to attach the system SPI
flash to the EC eSPI endpoint instead of the host
eSPI controller.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
During the driver init, the function will set the sensor resolution
based on the driver's dts variable "resolution"
The driver's device tree has been updated to include the value
"resolution".
The default is set to the highest resolution of 0.0625C.
Moved mcp9808_reg_write from mcp9808_trigger.c to mcp9808.c
This allows resue of the same function in both the trigger and
resolution functions.
Function name changed to xxx_16bit to distinquish it from the 8
bit write function that will added.
Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
In this CL, npcx_miwu_interrupt_configure is no longer responsible for
turning the interrupt off. Although the default state of WK_EN is
disabled, the users still have the chance to configure them when WK_EN
is enabled via npcx_miwu_irq_enable(). Hence, this CL also ensures that
WK_EN is disabled before configuring them.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL uses a simpler configuration approach that turns GPIO's
interrupts off instead of calling npcx_miwu_interrupt_configure
with NPCX_MIWU_MODE_DISABLED.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit introduces runtime query of the HW Capabilities of
the nRF IEEE 802.15.4 Radio Driver.
Signed-off-by: Czeslaw Makarski <Czeslaw.Makarski@nordicsemi.no>
Add posibility to configure UART_X device
based on board dts config.
Enable uart clock only if node is enabled
Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
nRF5340 PDK board was deprecated in v2.5.0 release
and is removed now from the tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
By the time hostname configuration was implemented, driver was switching
only between STA and STA+AP modes. After dynamic selection between NONE,
STA, AP and STA+AP was implemented (commit referenced below), hostname
configuration no longer takes effect when ESP chip obtains address over
DHCP (and sends hostname in the DHCP request).
Set hostname each time after enabling STA mode, so that it takes effect
in DHCP requests.
Fixes: 03ce61004b ("drivers: wifi: esp: control CWMODE depending on
current needs")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add some simple depends so we limit various I2C drivers to the SoC
families that the drivers are relevant to.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On I2C V1 parts, LL_I2C_EnableIT_TX() translates to EVT and BUF
IRQ enabling.
In stm32_i2c_msg_write function, LL_I2C_EnableIT_TX is called right
after stm32_i2c_enable_transfer_interrupts which already enables BUF
IRQ, which starts the transfer.
As a consequence it could happen that transfer is already complete
at the time LL_I2C_EnableIT_TX is called. This case is not expected
by remaining part of the code which loops forever waiting for BUF IRQ
to be raised.
Remove the superfluous LL_I2C_EnableIT_TX call.
Fixes: #32265
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
nRF52840, nRF52810, nRF52811 and nRF52805 are affected by anomaly 242.
This patch introduces workaround for this anomaly as follow:
Power-fail comparator is disabled before any attempt to erase or write.
Either erase or write is not proceed if EVENT_POFWARN is
already asserted.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Introduce support for situation when synchronization back-end
aborts operation before it is done. synchronization API will
transfer operation return code to the driver shim back.
Additionally:
FLASH_OP_ONGOING value was switched to be positive in order to
not been mislead with a negative error code.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Keep OOB Rx channel and interrupt always enabled.
Send callback when packet is received in OOB Rx channel
if asynchronous host-initiated handling is enabled.
Note that driver doesn't perform any buffering from packets,
so access to OOB Rx channel is gated by client's driver
packet retrieval.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Currently assumption is all OOB traffic over eSPI bus is always client
initiated.
Add option for systems where host can initiate OOB traffic.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
The calculated alarm time starts from 2000 but the gmtime_r needs as
input the time from epoch (1970). This causes the alarm time to be
miscalculated due to leap years, as 2000 is a leap year and 1970 is not.
To fix the issue, the 2000 timestamp can be added to the input time of
gmtime_r.
Fixes#32260
Signed-off-by: Antonis Sioutas <antonis.si510@gmail.com>
Fixes: "WARNING:CONSTANT_COMPARISON: Comparisons should place the
constant on the right side of the test"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32 uart driver doesn't support 9bits transactions in any case,
so remove case were it was declared as supported.
Fixes#31799
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit fixes sporadic kernel panics when writing big data chunks
to the flash. (data bus errors)
Reference manual:
If an erase operation in Flash memory also concerns data in the data
or instruction cache, you have to make sure that these data are
rewritten before they are accessed during code execution.
If this cannot be done safely, it is recommended to flush the caches
by setting the DCRST and ICRST bits in the Flash access control
register (FLASH_ACR).
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
If statement was unconditionally reading a field from async struct
while pointer to this struct may be null if asynchronous API is
enabled but given driver instance is not using it.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Driver uses DEVICE_AND_API_INIT which is deprecated so convert
to using DEVICE_DT_INST_DEFINE instead.
Fixes#32151
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There are several different issues when trying to build the icm42605
sensor driver:
* Missing entry in drivers/sensor/CMakeLists.txt
* Issues with #ifndef in header files
* Issues with const usage
* Missing function prototypes in headers
* Fix use of LOG_MODULE_REGISTER v LOG_MODULE_DECLARE
* Add missing dts node to tests/drivers/build_all/spi.dtsi
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update NPCX PWM driver so PWM can be turned off as the first call when
PWM_POLARITY_INVERTED is used.
Signed-off-by: Keith Short <keithshort@google.com>
Disable the DIO1 interrupt when the sx126x modem is in sleep mode.
On nRF hardware, this lets the `GPIOTE` hardware be switched off, saving
15uA.
Fixes#31569.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Update the global state of the modem on calls to `SX126xReset` and
`SX126xWakeup`. This stops `SX126xCheckDeviceReady` sending spurious SPI
commands on every transieve before `SX126xSetOperatingMode` is called.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Drivers are using DEVICE_AND_API_INIT which is deprecated so convert
the iproc_pax dma drivers over to using DEVICE_DT_INST_DEFINE and
DEVICE_DT_INST_GET.
Fixes#32153
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The callback pointers for uninitiated operations are implicitly null;
making them explicit only confuses maintainers searching for drivers
that implement the API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Iterate through all lmp90xxx device instances found in the devicetree
and initialise all of them.
Fixes#32046.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix coverity CID 216784.
SJW was not initialized in the tmp_res, but got copied
to the result pointer, which overwrites the value.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
This CL prevents the transaction result overwritten by the recovery
function. Even if the recovery mechanism succeeds, the upper layer still
needs to know why the transaction failed.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Since all fields' type in SMBST is R/W1C and RO, setting a single bit to
clear a specified event is a more suitable solution. Or we might clear
the other pending bits that occurred at the same moment unexpectedly.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL reset i2c event-completed semaphore before starting
transactions. Some interrupt events such as BUS_ERROR might change its
counter when i2c bus is idle. It causes that the driver cannot wait
for the event completed and return immediately.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
So far received packets were parsed (at AT command level) and allocated
in [esp_rx] thread. Then they were submitted to [esp_workq] thread for
processing (calling application callback).
This flow results in following deadlock when esp_workq thread waits on
response to some AT command:
- [esp_rx] waits on allocation of new RX packet
- [esp_workq] waits for [esp_rx] to process response to AT command
that was just sent
- blocked [esp_workq] prevents processing and deallocating RX packets
- [esp_rx] times out on allocation and closes socket
Process RX packets directly from [esp_rx] thread to prevent above
deadlock.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This is a fix for ACRN targets. Qemu ivshmem original specs do not
states that, if ivshmem-plain is selected, bar0 (the register bar) will
not be present. It just says that bar2 will only be sufficient.
And that is what happens on qemu: whether ivshmem-plain or
ivshmem-doorbell is selected, bar0 is always present no matter what.
This does not seem to be the case in ACRN which does not expose the
bar0 if ivshmem-plain is selected.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Gracefully shutdown the UARTE peripheral when the async API is used.
Failure to do so results in the driver being unusable when powered back
up as the required events (ENDTX & TXSTOPPED) are not set. This also
ensures that the last byte sent out via `poll_out` is properly output
on the serial line before powering down.
Fixes#31930.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Update the drivers power state knowledge immediately after calling
`nrf_uarte_enable`. This ensures that the state is correct regardless of
which path the function exits by.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Fixes the bug when driver changes offset after
the callback call. When you have the ready event
you suppose no changes in driver data after that.
Fixes#31973
Signed-off-by: Alexander Shuklin <jasuramme@gmail.com>
The count register is 64 bits, but we're a 32 bit CPU that can only
read four bytes at a time, so a bit of care is needed to prevent
racing against a wraparound of the low word. Wrap the low read
between two reads of the high word and make sure it didn't change.
Fixes#31599
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When checking for IRQ flags, we should also check
for IRQ status (IsEnabled ?).
If this is not done we can end up in Half Transfer
interrupt processing while it is not enabled.
Additionaly always use the id translation function
in LL API calls.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch fixes warnings for unused variables when acceleremoter
range and sampling frequency are set to values different from
the defaults.
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
Power consumption was still high after putting uarte device into off
state. It was caused by ENDRX interrupt that was triggered after
calling STOPRX. ENDRX event was called with 0 amount but interrupt
got triggered and fifo_read was starting RX again.
Added disabling RX interrupt before disabling UARTE and reenabling at
device activation.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Some format strings were causing warnings.
As elsewhere in this file, offset is type-casted (or not,
depending on compiler) to long int, and then %ld is used in
format string.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Start using DTS values for PCI Vendor ID and PCI BDF. For the PCI
Device ID we do not use DTS since this would require changing overlay
for different SKU board.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The function uart_irq_rx_ready() should return true if there is data in
the receive buffer, regardless of whether the irq is enabled. Fix the
mcux and rv32m1 shim drivers to implement this behavior correctly.
Prior to this change:
- irq_rx_full() checks if RX data is available
- irq_rx_ready() checks if RX data is available and interrupts are
enabled
After this change:
- irq_rx_full() checks if RX data is available
- irq_rx_ready() renamed to irq_rx_pending() to avoid confusion with the
API ready() function
- API ready() implementation switched to use irq_rx_full()
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
socket_can_generic.h makes some assumptions that are not always valid
for various drivers with regards to numbering. To clean this up we
add defines for SOCKET_CAN_NAME_0 and SOCKET_CAN_NAME_2 in addition to
SOCKET_CAN_NAME_1.
We also move struct socket_can_context into the drivers themselves
since they know best how many CAN interfaces are getting supported and
what naming/number convention they'd have.
Additionally, this also exposes a few other build issues with the
can_mcux_flexcan driver that get fixed.
Finally, we remove the platform_allow from samples/net/sockets/can
since it is no longer needed.
Fixes#31733
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
ESP fetches DNS servers from local network by using DHCP. There is an AT
command to get those DNS addresses. Use that to provide DNS addresses
for Zephyr's DNS resolver.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Rather than Kconfig vendor symbols, select stm32 watchdog using
compatible.
So user only has to enable the requested node and set
CONFIG_WATCHDOG=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix the timeout computation to provide more accurate timeouts
versus requested timeout.
Additionally, the error margin is reworked in order to:
- be relative to the application requested timeout (10% tolerance)
- exclude timeouts inferior to application request
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This CL added more additional details for KBC (Keyboard and Mouse
Controller) bus in espi_event structure. It helps the application to
handle different 8042 events in the callback function.
The format of event data for KBC 8042 protocol is:
[23:16] - 8042 event type: 1: Input buf full, 2: Output buf empty.
[15:8] - 8042 data: 8-bit 8042 data.
[0:7] - 8042 protocol type: 0: data type, 1: command type.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Socket can be closed either by Zephyr or by peer. In the former case ESP
WiFi chip still notfies about closed socket, which currently results in
printing warning log:
<wrn> wifi_esp: Link X already closed
Change level of this log from warning to debug, so that driver users are
not concerned about situation that is a normal behaviour.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Force sx12xx modems into sleep mode on boot. This is the default state
of the modem when not being used due to the TX/RX complete callbacks.
This reduces current consumption by 600uA before the modems are used
for the first time.
As sleep is the normal state after TX/RX when using the LoRa API, it is
garaunteed that this will not change the behaviour of application code.
LoRaWAN starts by calling Radio.Init(), which resets the modem, so any
sleep configuration we do here is discarded.
Fixes#31567.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
`SENSOR_CHAN_GAUGE_AVG_CURRENT` is currently treated as a capacity
by the MAX17055 driver, however the unit conversion is different
for current and must be calculated separately.
Add a separate method to convert a current reading to milliamps
from 1.5625 uV/R_SENSE units, instead of the 5uVH/R_SENSE conversion
that was previously used.
Tested by comparing value read and converted from MAX17055 with
value from an external power profiling kit.
Signed-off-by: Hayden Ball <hayden@playerdata.co.uk>
For multiple channels detection, channels variable was compared with
the output of find_lsb_set which actually is a decimal number.
Since channel is a bitfield the comparison was not behaving as
expected (detecting several channels while only one channel was used).
Rework the code to use the already existing bitfield "index" for
the test.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There was a regression when implementing automatic AT+CWMODE{,_CUR}
handling based on driver needs. ESP AT 1.7 firmware does not support
AT+CWMODE_CUR=0, which means that radio needs to be either in STA, AP or
STA+AP mode (no NONE state available).
Fix ESP AT 1.7 compatibility by keeping radio in STA mode whenever it is
not used.
Move also first AT+CWMODE_CUR invocation before AT+CWDHCP_CUR, so that
the latter executes successfully with ESP AT 1.7.
Fixes: 03ce61004b ("drivers: wifi: esp: control CWMODE depending on
current needs")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
The ',' character was used as line terminator instead of ';'
in SPI routines. The three affected drivers were not showing
any issue, but the typo is fixed for clarity.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This allows out-of-tree libraries to implement their own temperature
driver.
We allow selecting TEMP_NRF5 to aviod dependency loops
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
With this change it is possible to share all configurations
related to CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION without
including the clock calibration configurations.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Clock calibration should only be used when RC source is used.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The GPIO driver uses a proprietary GPIOTE channel allocator.
This commit makes it use the allocation mechanism provided by nrfx.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
idle is only considered in other timer implementations if ticks ==
K_TICKS_FOREVER but in arm_arch_timer. Just fix it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Added ap_enable and ap_disable api. The driver will open create an
access point with DHCP Server ip 192.168.1.1 and no security.
Added a small fix for the AF_INET issue.
Added parent and remote to accept routine context.
Added put implementation.
Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
net_context contains both net_sock_type and net_ip_protocol, which are
static during the lifetime of net_context. net_context has basically the
ownership of esp_socket, so we can be sure 'type' and 'ip_proto' are
always accessible through net_context API.
Remove 'type' and 'ip_proto' members from 'esp_socket' structure, as
those are already accessible by net_context API.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Change type of esp_socket->flags from uint8_t to atomic_t, so that read
and write access to those flags is done in atomic (thread-safe) manner.
Introduce esp_socket_ref() and esp_socket_unref() functions, which
operate on atomic refcount variable. esp_socket_ref() role is to
increase refcount if it was already non-zero. If it was zero then NULL
is returned, which means that socket is not used by net_context at the
moment.
Role of refcount:
* socket instance is assured to be between net_offload->get() and
net_offload->put() when refcount > 0,
* makes sure that socket instance can be used (its members can be
dereferenced) when refcount > 0,
* 'context' member is always valid and its members can be dereferenced
when refcount > 0.
esp_socket_get() gets unused socket, as previously. Additionally it sets
refcount to 1 at the end of call, which basically means that from that
point such socket can be referenced by other parts of the driver. Each
esp_socket_get() call should be followed by esp_socket_unref() and
esp_socket_put() to properly invalidate socket and prevent other parts
of driver from using it.
Add ESP_SOCK_WORKQ_STOPPED flag, which is now used to prevent scheduling
more work into driver workqueue. This flag is set in net_offload->put()
callback, so that no more socket work (such as processing RX/TX packets
or closing socket because of errors) is submitted after that.
Introduce mutex lock, which has following role:
* protects dst, connect_cb + conn_user_data, recv_cb + recv_user_data,
* assures that checking ESP_SOCK_WORKQ_STOPPED flag and actually
submitting (or not if net_offload->put was already called) new socket
work to workqueue is done in atomic way.
As there is a mechanism to prevent submitting new work items to
workqueue when net_offload->put() has been executed, then there is no
need to explicitly call esp_socket_ref() in esp_workq thread. This is
because one reference is being held by net_context (after calling
net_context->get()). This is why all the esp_socket_in_use() were simply
dropped. Code running from esp_rx thread on the other hand always uses
esp_socket_ref_from_link_id() helper function (which is backed by
esp_socket_ref()), so that it replaces previous esp_socket_in_use()
calls and additionally makes sure that socket stays valid ("in use")
until esp_socket_unref() is called.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Added selection of MPU_ALLOW_FLASH_WRITE.
Using a flash driver while MPU is enable without
this option on doesn't make sense at all.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The DAC53608 and DAC43608 (DACx3608) are lowpower, eight-channel,
voltage-output, 10-bit or 8-bit digital-to-analog converters (DACs)
respectively. They support I2C with a wide power supply range
from 1.8 V to 5.5 V, and a full scale output voltage range of
1.8 V to 5.5 V. The DACx3608 also includes per channel, user
programmable, power down registers.
Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
ARM Server Base System Architecture defines Generic UART interface,
which is subset of PL011 UART.
Minimal SBSA UART implementation does not define UART hardware
configuration registers. Basically, only FIFOs and interrupt management
operation are defined.
Add SBSA mode to PL011 UART driver, so it can be used at SBSA-compatible
platforms, like Xen guest.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
The STM32 driver currently does not support reading a sequence of
multiple ADC channels. Only the first channel of the sequence was
read and the rest was silently ignored.
Fix: Return an error if reading multiple channels is requested.
Signed-off-by: Martin Jäger <martin@libre.solar>
Older LPC platforms use Flash IAP with a command style firmware command.
Tested on LPC54114 platform.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Currently, if no net_pkt's are available, the radio driver RX thread
drops the 802.15.4 frame silently. This causes undesired behaviour,
where we can drop the packet which has already been acknowledged at
the 802.15.4 level.
Fix this, by blocking the RX thread if no net_pkt is avaliable. The
packets received while the RX thread is blocked will be accumulated in
the underlying nRF 802.15.4 driver, and eventually when it runs out of
internal buffers before the thread is unblocked, it'll stop
acknowledging the incoming frames.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The flash shell can work with any flash driver instance, not just the
one chosen by zephyr,flash-controller. It's helpful for the flash shell
to use this instance by default, but not required. We can switch
instances at runtime with the "flash set_device" command.
Fix the flash shell so it can build when there isn't a chosen
zephyr,flash-controller available.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Introduces a new flash driver for the FlexSPI peripheral on i.MX RT
SoCs. The hardware provides a flexible sequence engine (LUT) that
supports various types of external devices, including serial NOR flash,
serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It
supports up to four connected devices in single/dual/quad/octal modes
and provides memory-mapped read/write access to these devices through
the AHB bus.
The driver implementation consists of a shared controller for each
FlexSPI peripheral instance, and protocol-specific device drivers for
each external device. The controller provides a private interface for
multiple devices to access the FlexSPI peripheral registers. FlexSPI
devices provide the public flash driver interface to applications or
subsystems like storage or flash file systems; they also provide
protocol-specific LUT sequences to the controller.
Currently the only device type supported is QSPI NOR flash, but other
types like HyperFlash will be added later.
XIP is not yet supported, as this requires additional work to relocate
code to RAM and managing interrupts.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This wait on @ prompt was added in
fa3d586483.
The situation were the @ prompt is never received should not occurs,
however it's definitively safer to catch it instead of having a
deadlock.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Remove conditionals (PM_DEEP_SLEEP_STATES and PM_SLEEP_STATES) from
power management code. Now these features are always available when
power management is enabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
So far a dedicated FIFO was used for all RX packets, which was consumed
in single submitted work. This work was also responsible for closing
socket and notifying uppper network layers if some errors occurred
previously or socket was simply closed by peer. There is however a
potential race condition in scenario described below:
esp_rx thread | esp_workq thread
--------------------------|-----------------------------
| ---- esp_recv_work ----
| handle RX packets from FIFO
|
---- on_cmd_ipd ---- |
put new RX packet to FIFO |
---- on_cmd_ipd ---- |
|
---- on_cmd_closed ---- |
mark socket as closed |
---- on_cmd_closed ---- |
|
| handle close
| ---- esp_recv_work ----
In this case we assume that esp_workq was preempted just after
processing all RX packets from FIFO and before checking if socket was
closed. In such scenario RX packet put to FIFO just before doing close
is going to be unhandled, so application layer will miss part of the
data.
Change the way RX packets are scheduled to workqueue, by using the
already available net_pkt->work objects (used for example in native TCP
stack). Create a separate work for closing connection. As a result all
RX packets and close handlers are on the same queue and there is no risk
of handling close events before handling all previously received data.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There might be some scheduled work related to socket currently requested
to be destroyed/closed. Schedule a dummy work to make sure all
previously running work items in workqueue are finished.
When talking about TX packets, this makes sure that all previously
scheduled data is actually sent (flushed) before closing socket.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
It is enough to initialize work structures once during driver init,
because work handlers do not change during driver lifetime.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Currently there are two code paths when sending packets:
asynchronous (using workqueue) when zero timeout was specified and
synchronous in other cases. This doesn't seem to be justified, so
convert code to always schedule packet sending using workqueue.
Each net_pkt has an embedded work item, so use it instead of esp socket
specific work that was shared across all sent packets. This gives a
possibility to schedule multiple packets for sending.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Callback and user data are saved in net_context structure. Those members
are used by native networking stack (net_if), so simply follow the same
pattern.
First of all this allows to reduce runtime information for driver socket
instance. Second and most important benefit is that it allows to move
send handling entirely to workqueue thread.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
TICKLESS_CAPABLE is now selectable only and without prompt, so remove it
from _defconfig files and select it directly by the timer.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
z_timer_idle_enter is declared only when CONFIG_TICKLESS_IDLE is
selected. This function is not implemented anywhere, but the only
driver including this header is not TICKLESS_CAPABLE. So, no undefined
reference will happen.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Use TX FIFO level interrupt if available in hardware. It matches the
Zephyr UART API and avoids "bootstrapping" which is needed when using
the TX edge interrupt ("TI"). TX FIFO has room for up to 32 characters
and will typically reduce the number of interrupts.
Details:
APBUART can be synthesized with or without support for TX/RX FIFO.
Edge interrupts which fire when TX holding register changes and RX data
available are always available, independent of the FIFO configuration.
If FIFO is made available at synthesis time, two additional interrupts
become available: TX FIFO half-empty and RX FIFO half-full. These
are level interrupts.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This commit aligns the GRLIB APBUART driver with the Zephyr UART API
and fixes an issue where TX interrupt could previously be lost. It
was typically seen during interactive operation in the Zephyr shell.
There is an expectation in the Zephyr UART API that TX ready (i.e. TX
buffer space available) interrupt is a level interrupt, i.e. always
active while there's TX buffer space available. In particular, there's
an expectation that after uart_irq_tx_enable(), the TX interrupt will
immediately fire (assuming free TX buffer space is available).
The APBUART "Transmitter interrupt (CTRL_TI)" does not directly fulfill
this expectation because it is edge triggered and fires when the TX
holding register moves from being non-empty to empty. The solution
is to "bootstrap" interrupt processing by calling user-defined ISR
in irq_tx_enable().
This fix is similar to commit 49bb163756 ("drivers: serial:
uart_cmsdk_apb: Fix interrupt-driven operation").
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
The driver allocated packet from the TX pool on its RX path. Fix this
by using a correct allocator function.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
ESP chip send number of available RX data using
+IPD=<sock>,<avail_bytes> command. This exact number (truncated to MRU)
was used to read data with AT+CIPRECVDATA=<sock>,<num_of_bytes>.
Use always MRU when sending AT+CIPRECVDATA=<sock>,<mru> request. When
there are less bytes available, then +CIPRECVDATA will just return less
bytes, which is fine for the driver.
There are two advantages to this new behavior:
* there is no need to follow how many bytes were notified by +IPD
message, thus reducing implementation size,
* when data is constantly received by ESP chip, then the last number of
bytes notified by +IPD is no longer up-to-date when sending a
AT+CIPRECVDATA; always requesting MRU number of bytes allows to
always receive maximum currently available number of bytes buffered
by ESP chip.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Dump of communication between ESP chip and Zephyr shows that
+IPD:<sock>,<bytes_avail> is always received after +CIPRECVDATA. This
means that we don't need to update sock->bytes_avail in esp_workq
thread. Additionally there is no need to schedule next AT+CIPRECVDATA
request, as that will be done by +IPD handler anyway.
Relying on +IPD to be received after each +CIPRECVDATA (as long as there
is some more data to be received) allows to simplify operations on
sock->bytes_avail. From now on only esp_rx thread will update its value
and schedule AT+CIPRECVDATA in esp_workq thread. Then in
sock->bytes_avail will be treated as "readonly" in esp_workq
thread. This allows to prevent race condition when both esp_rx and
esp_workq threads could potentially update value of sock->bytes_avail
value at the same time.
<sock>,CLOSED message is received always after retrieving all data from
ESP chip (using AT+CIPRECVDATA), so there is no need to check whether
there are more bytes to be received before marking socket as closed in
Zephyr driver.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add extra error data information to callback parameter. Add tests for
testing the data provided.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Split setting EDAC IBECC ctrl to setting error_type and
error_trigger to make it easier for other platforms.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Replace addr with param1 and addr_mask with param2 for get / set types
of functions. Those names are more general and allow to implement
error injections for other platforms.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add an emulation controller which routes eSPI traffic to attached
emulators depending on the selected chip(mostly host).
This allows drivers for eSPI peripherals to be tested on systems
that don't have that peripheral attached, with the emulator handling
the eSPI traffic.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
The default configuration is made to be "master" at
"standard speed". This makes it possible to use the
driver without having to configure it.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Enable slave support for I2C device instances. Slave mode is
interrupt based, wheras master mode is still based on polling.
Remove ENI bit in master configuration since it is not needed for
master mode.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Initial driver and sample application of
TDK Invensense ICM42605 6-axis motion sensor.
This driver provide DTS for nRF52 DK board DTS setting.
Providing features are below.
Sensor data streaming - Accel, gyro
Tap, Double tap triggering.
Set/Get FSR, ODR by set attr API
Support multi instance feature.
Signed-off-by: JuHyun Kim <jkim@invensense.com>
Move i2s_cavs_irq_connect_##n up so its available later when used. This
fixes compile issues with the driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit verifies if the mac configuration is done correctly
during liteeth setup, and prompts a warning when not.
Signed-off-by: Pawel Sagan <psagan@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This commit eliminates an inifite waiting for the TX ready flag
in the eth liteeth driver, exiting with error after a defined
number of attempts.
Signed-off-by: Pawel Sagan <psagan@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This patch adds support for Microchip's KSZ8794 DSA device, which for
switch and PHY control uses SPI communication.
This driver also provides support for handling tail tagging added and
decoded in the KSZ8794 device as well as modifying entries in the
static MAC address table.
It is also possible to use GPIO pin to reset KSZ8794 switch.
When the "reset-gpios" property is not defined, software based reset
is performed instead.
The KSZ8794 can now be used on boards which have SPI CS only available
as GPIO pin.
Signed-off-by: Stefan Bigler <stefan.bigler@securiton.ch>
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch modifies Bluetooth HCI RPMsg drivers and samples to use
RPMsg Service instead of configuring OpenAMP directly in the driver
or the sample.
Co-authored-by: Piotr Szkotak <piotr.szkotak@nordicsemi.no>
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
Introduce a Kconfig variable that the SoC can set to indicate the
number of instances in Device Tree. This also fixes the accuracy of
the Elkhart Lake instance count where the code was previously assuming
up to 12 instances even though DT lists 15 nodes.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Move all PCIe-based DT nodes under a PCIe bus and take advantage of
the DT_ANY_INST_ON_BUS_STATUS_OKAY() and DT_INST_ON_BUS() macros.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Remove DW and PCA9685 PWM controller drivers as they are unmaintained
and broken.
Both drivers lack support for the pwm_get_cycles_per_sec_t API function
which was introduced in commit 56e0b53c6e
in 2016.
Fixes#18607, #18608
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit add support for i2c on imx6sx.
I2C support is based on imx7d and requires NXP HAL.
The Device Tree binding is also changed to better reflect that i2c
driver support both imx6sx and imx7d.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
Add PAX[PCIE<->AXI] DMA driver which supports DMA
transfers between host and target memory over PCIe link.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Refactor slightly so we can read SFDP tables with this driver. Note
that the SFDP read command requires long frame mode transfers as data
exceeds 8 bytes.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
QSPI doesn't have a different length expectation than normal SPI, so
introducing a new name for an existing name is unnecessary. Also
replace the constant with the actual buffer size where appropriate, in
somebody changes the the buffer definition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Kconfig allowed selecting any bit in the status register as the QE
bit, and defaulted it to 6. Devices need not require a QE bit at all,
and where JESD216 defines QE bit location the only place in first SR
byte that it can be is bit 6. Further, the code unconditionally wrote
the value 0x40 without respecting configuration of other bits. Some
of those bits control write protection of block-protected areas and
should not be changed.
Remove the Kconfig, instead using the jedec,jesd216-controlled
devicetree property. Allow the driver to recognize whether or not
setting the bit is required, and when it is only use bit 6. Only
update if the setting does not match the configuration.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The interface used to send commands supports only a command followed
by 8 bytes of data transfer. Reject attempts to do more, as the
result will be a successful transfer of only the first 8 bytes.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Not all special commands require that a write-enable be issued first.
Allow the caller to decide.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
DW16 provides information on mechanisms to enter and exit 4-Byte
address modes, returning the device to reset state, and how to
manipulate the values in the first status register.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
DW15 provides information on entry and exit from QSPI modes. In
particular, it specifies whether and how the status register must be
updated for this feature.
Add a JESD216 devicetree property for the Quad Enable Requirements
value.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Instead of having a hard-coded maximum instance count, introduce a
Kconfig variable for it. The inclusion of the per-instance header
files is solved by having them chain-include each other with a
pre-processor condition that checks if the current header file is the
last one or not.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The reg-shift support was quite broken in that the code only looked
for this property on instance 0. Now we support the property on any
node which might declare it.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Take advantage of DT_INST_FOREACH_STATUS_OKAY() to look for DLF and
PCP properties on any matching nodes with "okay" status.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use a dependency block instead of specifying a UART_NS16550 dependency
for each individual opton. This doesn't save many lines right now, but
may do so once more options are added.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The existing method of testing for any of the first four DT instances
having the pcie property feels a bit clumsy and will get more so when
support for more than four UARTs is added. A much more cleaner way to
do this (and more correct probably as well) is to list any PCIe-based
UART nodes under a pcie bus in the Device Tree hierarchy.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Part of GPIO pads in npcx series support low-voltage (1.8V) level
detection. In order to introduce this feature, this CL adds a new
NPCX-specific controller property, lvol_io_pads, in devicetree file.
For example, here is devicetree fragment which turn on low-voltage
support of i2c1_0 port.
/ {
def_lvol_io_list {
compatible = "nuvoton,npcx-lvolctrl-def";
lvol_io_pads = <&lvol_io90 /* I2C1_SCL0 1.8V support */
&lvol_io87>; /* I2C1_SDA0 1,8V support */
};
};
Then these pads will turn on 1.8V level detection during initialization.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add initial implementation of the uart async api
for stm32 mcus. This uses the dma controller
in normal mode for reception. In addition, to detect
reception of bytes we enable the idle line detection
interrupt.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
Signed-off-by: Jun Li <jun.r.li@intel.com>
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
Firmware implementing the PSCI functions described in ARM document
number ARM DEN 0022A ("Power State Coordination Interface System
Software on ARM processors") can be used by Zephyr to initiate various
CPU-centric power operations.
It is needed for virtualization, it is used to coordinate OSes and
hypervisors and it provides the functions used for SMP bring-up such as
CPU_ON and CPU_OFF.
A new PSCI driver is introduced to setup a proper subsystem used to
communicate with the PSCI firmware, implementing the basic operations:
get_version, cpu_on, cpu_off and affinity_info.
The current implementation only supports PSCI 0.2 and PSCI 1.0
The PSCI conduit (SMC or HVC) is setup reading the corresponding
property in the DTS node.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Move iis2dlpc trigger pulse configurations from Kconfigs to Device Tree.
Moreover the dts properties have been renamed as 'tap', which sounds a
better name to immediately catch the feature behind it. Since tap
threshold cannot be zero, this value (which is the default in dts
binding) is used to enable/disable the device feature per each axis.
The event can be generated on INT1 only.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Simplify the switch case on trigger types (SENSOR_TRIG_DRDY and
SENSOR_TRIG_TAP) inside iis2dlpc_enable_int().
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The IIS2DLPC drdy interrupt can be routed to either INT1 or
INT2 pin. Currently the selection is done by Kconfig configuration.
This commit is instead moving it into Device Tree as 'drdy-int'.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This patch replace CONFIG_GPIO_SIFIVE_N_PRIORITY into interrupt-cell
of device-tree to set IRQ priority.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This patch replace CONFIG_UART_SIFIVE_PORT_0_IRQ_PRIORITY into
interrupt-cell of device-tree to set IRQ priority.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
In #31192 stm32 uart driver uart_irq_rx/tx_ready functions were
modified to take into account status of irq.
While it seems wlecome for TX (based on uart client's implementation),
this is not correct for RX.
Revert change in uart_stm32_irq_rx_ready function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Replace marco function, defined(), with IS_ENABLED() in host sub-devices
driver implementation. In this PR, we won't replace the macros which
cause -Wimplicit-function-declaration warning if related configuration
is not enabled or its type is not boolean..
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In npcx7 series, the Timer and Watchdog module (TWD) generates the
clocks and interrupts used for timing periodic functions in the system.
It also provides watchdog reset signal generation in response to a
failure detection.
The CL also includes:
— Add npcx watchdog device tree declarations.
— Zephyr watchdog api implementation.
— Add Watchdog definitions for npcx7 series in
tests/drivers/watchdog/wdt_basic_api/src/test_wdt.c for
supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This commit is about the it8xxx2 i2c master driver which
includes six SMBus channels. The enhanced channel i2c3,
i2c4, i2c5 are controller which are designed to support
the I2C protocol.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
In order to ease reuse on other series, set DMA as optional
and use IT if no DMA channel is specified in the qspi node.
Tested on disco_l475_iot1
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for DMA based STM32 QSPI NOR flash controller.
Driver configures both NOR flash and also QSPI hardware block.
Reuses existing jesd216 library.
QSPI hardware block handling is done through the use of Cube HAL API.
This requires the use of HAL interface also for DMA besides zephyr
DMA driver.
Zephyr DMA driver is used only for IRQ routing while HAL driver
handles the IP block. To achieve this it is required to:
-Configure both Cube and Zephyr drivers at init.
-Inform Zephyr driver that current channel handling will be done
by another instance and only a limited configuration should be done.
For this last part, a unused parameter is overridden in order to
transmit the information.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
In preparation for QSPI DMA mode:
-Add a possibility to override driver by the HAL DMA. In that case
stream is set as busy and no configuration nor treatment is done.
In case of interrupt, flags clearing is let to HAL.
-Treat Half Transfer interrupt prior to Transfer Complete for the
cases were both IRQ are both raised at the time IRQ handler is called
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
AHB3 bus support is added for compatible series.
Additionaly, fix condition for AHB2 support and fix
formatting
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that we generate a header that extern's all possible devicetree
based device struct we can remove DEVICE_DT_DECLARE and
DEVICE_DT_INST_DECLARE as they aren't needed anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
According to AT commands manual, no wait after prompt '@'
is required if using AT+USOST commmand (aka. sendto,
only used with UDP).
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
core-macros.h includes other files not part of the xtensa HAL, make this
esp32 specific
Fixes#31301
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Disable RTC WDT enabled (by default) by 2nd stage bootloader in ESP-IDF.
This WDT timer ensures correct hand-over and startup sequence from
bootloader to application.
Enabling bootloader caused system clock initialization to fail
when clock rate is greater then 80MHz. This also fixes
esp32 clock source code.
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
-The STM32F410RB has no AHB2 bus so LL_AHB2_GRP1_EnableClock() and
LL_AHB2_GRP1_DisableClock() should not be called for this soc.
-The interrupt table had to be changed because of no OTG_FS_WKUP_IRQn
(no USB OTG at all).
Signed-off-by: Hans Unzner <hansunzner@gmail.com>
Convert the driver so that it creates its instance basing on DT.
Remove no longer needed Kconfig option CRYPTO_NRF_ECB_NAME.
Also update accordingly the crypto sample.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Since the PU power rail of i2c bus might be gone at the initial state
after ec powered up, we might have no chance to get STOP condition. This
is because no i2c transactions occurred before its power rail is
restored. But it's crucial to reset the whole i2c module after i2c bus
is back to the idle state.
The original test suite for i2c recovery mechanism didn't consider this
case that initial i2c bus is low before ec powered on. Hence, this CL
fixed this symptom by:
1. Force i2c modules must proceed 'reset' step no matter we received
STOP condition or not.
2. Use Boolean for condition check to prevent misusage and meet MISRA.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Extend the PWM API with optional API functions for capturing PWM pulse
width and period cycles.
Fixes#26026.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for enabling and configuring PLL3 on STM32 H7 series. PLL3
is used as a clock source by certain peripherals, e.g. LTDC.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Provide a utility function to compute PLL VCO input range so that it
can be re-used for other PLLs.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
When flash is Dualbank and flash size is lower than 512K,
then there is a discontinuity between bank1 and bank2.
Also take into account bank swap capability.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
When setting baudrate register, baudrate value is computed according
to the oversampling given value, which is default boot time
value (16).
In case oversampling value has been changed by bootloader (as in case
of TFM bootloader), a desynchronsation happens between OVR and BRR
values and the ouptut baudarate is incorrect.
For oversampling register before setting the baudrate to avoid this
situation.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When calling irq_rx_ready or irq_tx_ready API, return the logical AND
between the irq status and the enable of that irq.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32
symbols, set them directly based on related compatible status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2 versions of DMA hardware blocks could be found across stm32 series.
In order to simplify the handling of matching Kconfig symbols,
make this visible in dts files by creating "st,stm32-dma-v1" and
"st,stm32-dma-v2" and set them accordingly in dtsi files.
Duplicate and update related bindings to reflect that new state.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
1. don't use "inline" in .c, let the compiler decide
2. remove superfluous parentheses
3. simplify a function by directly returning the result of a boolean
operation
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Some interrupts can be enabled by the ROM, e.g. the timer interrupt.
When then in Zephyr the interrupt controller is enabled, before
individual interrupts are configured, interrupts can arrive and lead
to the spurious interrupt handler being invoked. Fix thid by
disabling all child interrupts when configuring cAVS interrupt
controllers.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Line break on #error directive is confusing github and ending up
breaking syntax highligthing in github UI which makes me nervous
during review.
Convert error message to a one liner.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Due to clock discrepancy, busy waiting for 15us was not covering for
half tick in certain cases. Busy wait runs from HF clock source.
Increased to 19us to cover it. Anyway, this case is hit very rarely,
only when there was aborted, not-cancelled compare value that was
about to expire. Because of that, increase shall not impact the
performance.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
For historical reasons, the maximum speed of the Atmel SAM USB
controller is done by comparing the maximum-speed property string from
the DT using strncmp at runtime.
Now that the DT_ENUM_IDX macro exists, we can use it to get the
maximum-speed property at build time and without string comparison.
Unsupported speed can also be reported at build time.
Note that the default speed in case the optional maximum-speed property
isn't present in the DT is changed from full-speed to high-speed to
match the property description. This is a no-op in practice as this
properties is defined at the soc level.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
CAN_MCP2515_MAX_FILTER is not needed anymore and was probably just a
misunderstanding. Aligned it with the other CAN drivers.
This also was the last difference in the mcp2515 specific config for the
can sample, so that can be deleted as well.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
The STM32F105xx USB clock goes through a prescaler either PLL1 x2 /2
or PLL1 x2 /3, the output of this must be 48 MHz. As such, the output
of PLL1 must be 48 MHz or 72 MHz.
NOTE: This requires that the system is running from PLL1 (PLLCLK).
Support for running from PLL2 will be implemented in the future.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Set the prescaler in register BTR according to the configured bitrate in DTS.
This bug appeared in commit 8b6c1bd4b7
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
```
/home/humanentity/zephyr/drivers/ipm/ipm_handlers.c:23: undefined reference to 'z_impl_max_data_size_get'
```
The error shows when having CONFIG_BT=y and CONFIG_USERSPACE=y, and
is easily reproduced by adding
```C
CONFIG_USERSPACE=y
```
to `samples/bluetooth/peripheral/prj.conf` and building the sample.
E.g.
```
$ west build -p auto -b nrf5340pdk_nrf5340_cpuapp samples/bluetooth/peripheral
```
Signed-off-by: Peter Andersson <pelleplutt1976@gmail.com>
Retain the assumption that the loop will assign a pointer, but
initialize it pointer first to eliminate build warnings.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Remove all odr values from Kconfig and always init it
at 12.5Hz. It is responsibility of application to set
the rate to a different value using SENSOR_ATTR_SAMPLING_FREQUENCY.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Adds support for ADC on G0 series.
Simple implementation: sequencer not fully configurable,
and only one common sampling time.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The Bluetooth receiving thread may not be able to process broadcast
packets because the system API(bt_hci_cmd_send_sync) is in block state.
If HCI driver is still waiting buffer for adv report, an assertion will
be triggered.
Fixes: #30955
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
z_free_fd() is called twice then you close(). For example in ublox sara
r4 driver offload_close() calls modem_socket_put() where z_free_fd() is
called first time. Then this same function is called another time in
socket.c in z_impl_zsock_close() after this function has called
offload_close() in ublox sara r4 driver. This causes socket
descriptor leak.
Fixes#26819
Signed-off-by: Akseli Peltola <peltsu1324@gmail.com>
Flash size is specified in bits by SFDP and devicetree, but the stored
flash size is in bytes. Correct the divisor.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This patch adds the driver for Omnivision OV7725
Color CMOS VGA Sensor.
The driver currently provides a simple capture
function, the output format only provides
RGB565,640x480.
Signed-off-by: Frank Li <lgl88911@163.com>
This patch enables the rtc clock on the stm32g4 soc
from STMicroelectronics.
Even if the set by default (reset value of theRCC_APB1ENR)
the bit is marked as 1.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
After system reset, the PWR interface clock must be enabled
by setting the PWREN bit of the RCC_APBENR1
This sequence is needed to use the RTC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This converts the intel_gna driver to use device tree instead of
kconfig for device configuration.
Fixes#30872
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The thresholds for activity/inactivity in the adxl362 acceleromter have
two parameters that can be configured. Currently the threshold is
configurable via the KConfig variables CONFIG_ADXL362_ACTIVITY_THRESHOLD
and CONFIG_ADXL362_INACTIVITY_THRESHOLD which configure repectively the
value in the THRESH_ACT and THRESH_INACT registers.
The other parameter that can be configured is the time by changing the
values in the registers TIME_ACT and TIME_INACT, but this values are
hardcoded to 1 (see lines 653 and 675 in adxl362.c), this patch adds
support for configuring those values in KConfig as
CONFIG_ADXL362_ACTIVITY_TIME and CONFIG_ADXL362_INACTIVITY_TIME.
Signed-off-by: Xavier Naveira <xnaveira@gmail.com>
Change switches to using static memory for out endpoints. Using
heap is not necessary, because number of out endpoints is defined
in DTS.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Add a new display-inversion property to ili9xxx based display drivers to
send a "Display Inversion ON (0x21)" command during initialization.
This seems to be required for some ILI9xxx based displays to work
correctly, such as BuyDisplay ER-TFT028A2-4 (ILI9341 basd IPS display).
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
It is possible to use the UART abstraction for USB communications
without any of the dedicated UART drivers being enabled. This currently
causes a compilation error because CMake throws an error if a library
has no sources. The empty file forces there to be at least one file in
the library when `CONFIG_USB_CDC_ACM` is enabled.
Removing `select CONFIG_SERIAL_HAS_DRIVER` from `CONFIG_USB_CDC_ACM` is
not a valid solution as this symbol is required by `CONFIG_UART_CONSOLE`
and therefore `USB_UART_CONSOLE`.
Fixes#31067.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Need to declare the device before the pointer can be obtained, and to
validate the device before trying to use it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
For a while now, we've had two APIC drivers. The older was preserved
initially as the new (much smaller, "new style") code didn't have
support for Quark interrupt handling. But that's long dead now. Just
remove it.
Note that this migrates the one board using this driver (acrn) to
CONFIG_APIC_TIMER instead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This change adds support for configurable interrupt capabilities
in the emulated GPIO controller via Devicetree bindings.
Fixes#26477
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
The NPCX SMB modules provides full support for a two-wire SMBus/I2C
synchronous serial interface. Each SMBus/I2C interface is a two-wire
serial interface that is compatible with both Intel SMBus and Philips
I2C physical layer. There are 8 SMBus modules and 10 buses in NPCX7
series.
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller) Please refer Section 4.7.2 in the datasheet. In order to
support it, this CL seperates the i2c driver into port and controller
drivers. The controller driver is in charge of i2c module operations
and internal state machine. The port driver is in charge of pin-mux
and connection between Zehpyr i2c api interface and controller driver.
All of modules have separate 32-byte transmit FIFO and 32-byte receive
FIFO buffers. These FIFO buffers reduce firmware overhead during long
SMBus transactions by allowing the Core to write or read more than one
data byte at a time to/from the SMB module.
The CL also includes:
— Add npcx i2c port/controller device tree declarations.
— Zephyr i2c api implementation.
— Add "i2c-0" aliases in npcx7m6fb.dts for i2c test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The System Glue module includes the three major functions:
— Power Switch Logic (PSL)
— SMBus multi-bus, wake-up support
— Simple Debug Port (SDP)
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller). Since a single SMB module is able to serve only one
SMBus/I2C bus at a time, SMB_SEL registerin Glue module is used to
control theconnection of I2Cn_0 and I2Cn_1 interface pins to the SMBn
module (where n is 5, 6).
This CL provides a soc specific pin-control function called
"soc_pinctrl_i2c_port_sel" to switch buses (port) of the same SMB module
(controller). It will be used in the following i2c driver.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This CL add a new notification event, ESPI_PERIPHERAL_EC_HOST_CMD, and
two response opcodes, ECUSTOM_HOST_CMD_GET_PARAM_MEMORY and
ECUSTOM_HOST_CMD_SEND_RESULT, to connect with host command sub-system
between host and ec.
It also introduced three configurations to increase the flexibility of
ec host command settings:
1. ESPI_PERIPHERAL_HOST_CMD_DATA_PORT_NUM:
Host I/O peripheral port number for ec host command data. The default
value is 0x0200.
2. ESPI_PERIPHERAL_HOST_CMD_PARAM_PORT_NUM:
Host I/O peripheral port number for ec host command parameters. The
default value is 0x0800.
3. ESPI_NPCX_PERIPHERAL_HOST_CMD_PARAM_SIZE:
Host I/O peripheral port size for ec host command in npcx series. The
valid value in npcx ec series for this option is
8/16/32/64/128/256/512/1024/2048/4096 bytes. The default value is 256
bytes.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL introduces two kinds of op codes for espi_api_lpc_read_request
and espi_api_lpc_write_request Zephyr espi api functions.
One is for supporting ACPI and shared memory region to access ACPI data.
The other is customized for certain platforms such as Chromebook and so
on.
This CL also introduced the following configurations to add the
flexibility of these settings.
1. ESPI_PERIPHERAL_ACPI_SHM_REGION_PORT_NUM:
Host I/O peripheral port number for shared memory region. The default
value is default 0x0900
2. ESPI_NPCX_PERIPHERAL_ACPI_SHD_MEM_SIZE:
Host I/O peripheral port size for shared memory in npcx series.
Please notice the valid value in npcx ec series for this option is
8/16/32/64/128/256/512/1024/2048/4096 bytes. The default value is 256
bytes.
This CL also turn off hardware-wire feature which generates VW events
that connected to hardware signals such as SMI and SCI. We will set
VW output events directly via espi_api_send_vwire() api function.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
TMP117 from TI is a sensor similar to tmp116, but it has more precision
and it also supports the offset register.
Add support for SENSOR_ATTR_OFFSET, which is used by TMP117 to the
pre-exisiting tmp116 driver.
This commit also enables multiple instances and adds TMP117 to Kconfig.
Signed-off-by: Puranjay Mohan <puranjay12@gmail.com>
Add `get_status` function to dmamux driver api.
This uses the regular dma driver `get_status` function.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
off_t can be 32-bit or 64-bit depending on the platform. STM32 flash
addresses are always 32-bit so it's safe to use long here.
Signed-off-by: Martin Jäger <martin@libre.solar>
Convert drivers to use pinmux devicetree node to create pinmux device
object.
On intel S1000 we add 'label' as a required property and set it to
'PINMUX' to match CONFIG_PINMUX_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert drivers to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert soc nios2 qspi to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert intel gna driver to DEVICE_DEFINE instead of
DEVICE_AND_API_INIT so we can deprecate DEVICE_AND_API_INIT in the
future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert NRFx IPC to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert LED PWM driver to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver(s) to DEVICE_DEFINE instead of DEVICE_AND_API_INIT
so we can deprecate DEVICE_AND_API_INIT in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This converts the i2s_cavs driver to use device tree
instead of kconfig for device configuration.
Fixes#30750
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use a similar model to the pinmux_rv32m1 driver for kinetis pinmux
driver. We handle one subtle difference between clock on the KE1xF v
other SoCs.
As the Kconfig and devicetree label names are the same we maintain the
Kconfig options in the driver until all board users are converted over
to use devicetree instead of Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add an additional 4 ports for upcoming Arm based server that will have a
total of 12 I2C ports.
Similar to the original 8 ports, these additional 4 ports will not be
enabled unless specified at configuration time.
Signed-off-by: Dan Kalowsky <dkalowsky@amperecomputing.com>
The STM32L0 series MCUs have quite basic timer features only, so we
remove some unavailable configuration options. They were properly
initilized by the LL StructInit functions for other MCUs anyway.
Signed-off-by: Martin Jäger <martin@libre.solar>
As timer interrupt is level triggered, we need to mask it before leaving
ISR or it will be delivered again.
Also, Xen automatically masks timer interrupt when it injects IRQ to
a guest, so we need to unmask it again, when setting new timeout.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Deduplicate final part of RX data processing for two supported cases:
passive (+CIPRECVDATA) and non-passive (+IPD). Move implementation to
esp_socket module, as this is strictly related to socket.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Split +IPD message handling into smaller logical functions, so it is
much easier to follow code and further improve it. Make sure to do as
much parsing work as possible, before accessing esp_socket object. This
will allow to introduce thread-safety locking just in the critical parts
in subsequent commits.
Prefer early return from function over goto to return instruction,
whenever cleanup code is not needed.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Current on_cmd_ciprecvdata handler is a bit overwhelming to follow.
Add a cmd_ciprecvdata_parse() helper, which is responsible only for
parsing received metadata (message offset and length), leaving socket
instance untouched.
Consume received payload later on, just after verifying that socket is
in valid state.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Added tests for the timing algorithm.
The tests calculate timings for some bitrates with sample-points
and verify the results.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Check if the timing is not set from device tree and exclude
sample-point algorithm if it is not used from device-tree.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Reordering of the struct elements to match the Linux format.
The __packed() is not necessary anymore.
std_id and ext_id is merged to id in the frame and filter.
Additionally, the frames are ready for CAN-FD.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
The previous API can't change the sampling-point and only allowed
bitrates that fit the time segments.
The new API allows for shifting the sampling-point and adjusts the
number of time quantum in a bit to all more possible bitrates.
The functions to calculate the timings are moved to the can_common file.
They can be used for all drivers.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
After a synchronous (timeout > 0) connection attempt was made, it was
being checked if there is some packet to be sent. If positive, then a
send work was queued.
This behavior makes little sense, as TCP connection is not even
considered established at this point (from net_context perspective) if
function has not returned yet. Additionally it differs from
asynchronous (timeout == 0) connection attempt. In case of UDP (and
calling esp_connect() from esp_sendto()) sock->tx_pkt is assured to be
NULL. Drop this piece of code as it doesn't seem to be justified.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2 (out of 3) components used CONFIG_WIFI_LOG_LEVEL, while the last one
didn't specify explicit log level. Always use CONFIG_WIFI_LOG_LEVEL in
all components.
While at it switch to LOG_MODULE_REGISTER(<module>, <log_level>), which
is a more compact way to define log level.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Calculate size based on the real message, instead of assuming some
arbitrary size. This consumes slightly less stack space, but more
importantly gives an idea what has been taken into account when
calculating the size.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
+IPD,<sock>,<bytes_avail> command in passive mode notifies about ESP
internal buffer usage level. Hence value of <bytes_avail> can exceed
4 digit value, which currently results in failure.
+IPD message is used in driver only for scheduling AT+CIPRECVDATA
command and actual value of <bytes_avail> doesn't really
matter. Increase maximum supported value that can be received from
9999 (maximum 4 digits) to 4294967295, which is maximum value of 32-bit
unsigned integer.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This easily permits to test ivshmem and basic functionality of a custom
protocol passing through.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This basically adds support for an interrupt based ivshmem variant
called "ivshmem-doorbell".
This allows, via MSI-X, to get multiple vectors for notifications, get
assigned and ID and being able to send a message to another ID (another
VM).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is placed into drivers/virtualization as it does not belong to any
existing subsystem.
This is only the ivshmem-plain variant.
This device is provided by qemu or ACRN, and can be used to share memory
either between the host and the VM or between VMs. Here if zephyr is
used as a VM, it will be able to take advantage of such feature.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This reverts commit cabbd916cf.
This is considered to be useful enough that it should be restored
as a stable Zephyr API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Convert clock_control drivers from:
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
As part of this we also changed STM32_CLOCK_CONTROL_NAME to be based on
devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The i2c controller reset sequence is revamped to address
i2c failures which require a reset. Also, more time is
given for i2c slave device to read data by waiting longer.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Renamed to make its semantics clearer; this function maps
*physical* memory addresses and is not equivalent to
posix mmap(), which might confuse people.
mem_map test case remains the same name as other memory
mapping scenarios will be added in the fullness of time.
Parameter names to z_phys_map adjusted slightly to be more
consistent with names used in other memory mapping functions.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This driver is setting the it8xxx2 register GCR1-15.
It's for selecting the pin function.
User would set pin at pinmux.c (under board/).
Signed-off-by: Cheryl Su <Cheryl.su@ite.com.tw>
This commit is about the it8xxx2 timer driver.
We use the timer 5 as system timer for count time,
so the timer interrupt is trigged by it.
Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
This commit is about platform it8xxx2 gpio.
The devicetree use key and led as example.
Users can change it to meet their needs.
Signed-off-by: Cheryl Su <Cheryl.su@ite.com.tw>
Convert counter drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE
etc..
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert led drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert ps2 drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert espi drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
So far nRF's TIMER was used for generating PWM signal. Add support for
generating PWM based on RTC, which is sourced by 32KHz low frequency
crystal. This allows to use low frequency PWM with much lower power
consumption, because high frequency clock path can be disabled.
Don't support RTC clock prescaler, because maximum 512s period covers
most use cases. This allows to adjust pulse and period cycles to the
fact that CLEAR task event is generated always one LFCLK cycle after
period COMPARE value is reached.
Also update hal_nordic revision, as it contains updated check for PPI
channels conflict when RTC is used to generate PWM.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far 'timer-instance' DT property was the way to configure TIMER which
was used for generating PWM signal. Replace that by using 'generator'
phandle, so we get prepared for supporting RTC instances as PWM signal
generator.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There is some kind of runtime clock scaling implemented when period
cycles exceed 16-bit value. This is broken, because configured PWM has
far higher frequency in that case. Replace that mechanism with simply
veryfying if requested PWM period does not exceed 16-bit value.
Suggested-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add a missing keyword in a variable declaration and correct the type
in a missed declaration. Also use a more appropriate upper bound in a
loop.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The dev_name field in DEVICE_AND_API_INIT() call should match the
driver's name. Tmp116 driver had a wrong dev_name field.
Signed-off-by: Puranjay Mohan <puranjay12@gmail.com>
Use Nordic HAL to configure GPIO output. This adds support for P1 GPIOs,
when pin numbers above 31 are used.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Set NET_CONTEXT_CONNECTED when stream socket got connected. This fixes
TCP connection when using wncm14a2a modem driver, which got broken after
sockets layer started to validate net_context connection state before
allowing to receive any data.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Set NET_CONTEXT_CONNECTED when stream socket got connected. This fixes
TCP connection when using eswifi WiFi driver, which got broken after
sockets layer started to validate net_context connection state before
allowing to receive any data.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Set NET_CONTEXT_CONNECTED when stream socket got connected. This fixes
TCP connection when using winc1500 WiFi driver, which got broken after
sockets layer started to validate net_context connection state before
allowing to receive any data.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Set NET_CONTEXT_CONNECTED when stream socket got connected. This fixes
TCP connection when using ESP WiFi driver, which got broken after
sockets layer started to validate net_context connection state before
allowing to receive any data.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Flash controller support is not yet ready on M4 core.
Remove the chosen declaration to make it clear.
Additionally, generate a build error if this driver is compiled
on M4 core.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixes#29831: Implements flash driver for stm32h7 devices.
The driver is independant from the other stm32 families (flash_stm32.c),
only the header interface is (mainly) common.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
Add a new test for k_busy_wait and cpu_hold
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
In native_posix and nrf52_bsim add the cpu_hold() function,
which can be used to emulate the time it takes for code
to execute.
It is very similar to arch_busy_wait(), but while
arch_busy_wait() returns when the requested time has passed,
cpu_hold() ensures that the time passes in the callers
context independently of how much time may pass in some
other context.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
When tickless mode was disable, sys clock timeout handler was calling
public API function for setting new compare value. Public API function
asserts when chan 0 is used which is reserved for system clock.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added clearing of CC event which may occure due to previous
CC value which was closed to current counter value.
Fixed int_mask initialization.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Convert entropy drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
etc..
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes the fxas21002 sensor driver to provide gyro channel data in
radians/sec instead of degrees/sec.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Fix TIMER0 and RTC0 being selectable when using out-of-tree Bluetooth
controller.
Generalize the Kconfig to have the features that use the HW peripheral
select them as reserved to make the dependencies more manageable.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Convert gpio drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE
etc..
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Put everything inside an if, we should not see anything related to
uart_mux in generated .config if it is not enabled.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The GIC interrupt controller driver is using a custom init function
called directly from the prep_c function. For consistency move that to
use SYS_INIT.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Convert watchdog drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE
etc..
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The cc13xx_cc26xx driver uses "inst" so we need to use
DEVICE_DT_INST_DEFINE instead of DEVICE_DT_DEFINE.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The spi_nrfx_spis driver uses nodelabel so we need to use
DEVICE_DT_DEFINE instead of DEVICE_DT_INST_DEFINE.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert adc drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE
etc..
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert pwm drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add weak function to check flash configuration.
On stm32g4: single bank configuration not supported
when dual bank capable.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Remove hardcode bank1 page limit (128) which is not always valid
(not valid for soc stm32g474rct)
Manage bank1/2 discontinuity when flash is Dualbank and
flash size is lower than 512K.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
When flash is Dualbank and flash size is lower than 512K,
then there is a discontinuity between bank1 and bank2.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE
and use PM_ as the prefix for all PM related Kconfigs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move users that are DEVICE_DT_DECLARE(DT_DRV_INST(n, ...)) to
DEVICE_DT_INST_DECLARE(n, ...) and similar for DEVICE_DT_DEFINE.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to prevent user turns on the pin-mux of devices has io-pads
unexpectedly, this CL added a new device definition for host uart
device. The pin-mux of host uart interface is enabled only if we set its
status as "okay" in dts file of board folder.
The following npcx7 drivers will meet:
1. Default status property of npcx devices with io-pads such as espi,
pwm, uart, host uart and so on should be "disabled".
2. Switch pin-mux by changing status property to "okay" in dts file of
board folder.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL replaces all DT_ prefix with NPCX_DT_ for all macros used
for providing npcx device information in soc_dt.h It avoided the
ambiguity with the DT_ prefix for system DT macros/defines.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Prevoiusly there is no network interface for mcp2515 driver.
This is solved by calling the NET_DEVICE_INIT macro in mcp2515 driver.
fixes: #30432
Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
It's disabled by default. When enabled, and if the device exposes both
MSI and MSI-X capabilities: MSI-X will be selected and MSI disabled on
the device.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such interrupt remapping controller may be found along with Intel VT-D
hardware. Its base-address is via ACPI, and it enables up to 64K
interrupt indexes.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This enables software MSI "multi-vector" feature, letting the user to
register an isr handler per-MSI message.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Though it was noted that pcie_get_cap() is only used by MSI code so far,
there is no need to put it in msi code. If unused, linker will nuke it.
So let's move things to where it belongs to.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add support for transmission modes that send a packet
at a specific time in the future.
Remove TXTIME, TXTIME_CCA, CSMA_CA capabilities and their calls when
they are not supported by selected drivers. Add TXTIME flag in
get_capabilites function.
Signed-off-by: Maciej Fabia <maciej.fabia@nordicsemi.no>
Signed-off-by: Pawel Kwiek <pawel.kwiek@nordicsemi.no>
Previously, when opening the Bluetooth driver on the app core of
nRF53, the application could hang forever. This would happen if
the network core was not flashed or flashed with the wrong firmware.
This commit improves the user experience timing out if the net core
is not replying. 3 seconds is considered to be more than enough to boot
the network core.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Use the core k_heap API pervasively within our tree instead of the
z_mem_pool wrapper that provided compatibility with the older mempool
implementation.
Almost all of this is straightforward swapping of one alloc/free call
for another. In a few cases where code was holding onto an old-style
"mem_block" a local compatibility struct with a single field has been
swapped in to keep the invasiveness of the changes down.
Note that not all the relevant changes in this patch have in-tree test
coverage, though I validated that it all builds.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Mark all k_mem_pool APIs deprecated for future code. Remaining
internal usage now uses equivalent "z_mem_pool" symbols instead.
Fixes#24358
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Fixes#29831: Implements flash driver for stm32h7 devices.
The driver is independant from the other stm32 families (flash_stm32.c),
only the header interface is (mainly) common.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
NPCX7 includes a 10-bit resolution Analog-to-Digital Converter (ADC). Up
to 10 voltage inputs can be measured and a internal voltage reference
(VREF), 2.816V (typical) is used for measurement. It can be triggered
automatically in Autoscan mode. Each input channel is assigned a
separate result register, which is updated at the end of the conversion.
The CL also includes:
— Add npcx adc device tree declarations.
— Zephyr adc api implementation.
— Add adc definitions of npcx7 in
tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Some Clocks have ifdefs only for clock_control_on but are missing
them for clock_control_off.
Additionally return ahb_clock clock frequency for stm32g0
STM32_CLOCK_BUS_IOP in stm32_clock_control_get_subsys_rate.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
After the change SHA1: 3498d43784 the
local-mac-address property is no longer parsed correctly when it is
defined in the '&enet` DTS node on k6x SoCs (e.g. frdm_k64f and
ip_k66f).
The problem is with value to which the
NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(n)) macro is resolved.
If the 'local-mac-address' is present it returns
'(!((0 == 0) && (0 == 0) && (18 == 0) && (19 == 0) && (0 == 0) && \
(16 == 0)))' [*], otherwise it is 0.
As COND_CODE_{01} only accepts 0 or 1 as its first argument, it all
worked until the 'local-mac-address' was not defined. When present
the first argument to COND_CODE_{01} macro was [*] and it caused
build break.
Fixes issue: #30354https://github.com/zephyrproject-rtos/zephyr/issues/30354
Signed-off-by: Lukasz Majewski <lukma@denx.de>
If interrupt handler contains while loop which depends on
uart_irq_tx_ready() and uart_fifo_fill is called inside this
loop then if TXSTOPPED event occurs while code executes the
loop then uart_irq_tx_ready() will return true but uart_fifo_fill
will fail to write any bytes. That is because fifo_fill_lock is
cleared in handling of TXSTOPPED. To solve that added clearing
the lock inside uart_irq_tx_ready() if STOPPED event is detected
there.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
There was a regression introduced when reordering function parameters
check. It is valid to pass NULL semaphore with zero timeout, so fix
parameter check to respect that.
Fixes: 67976f8686 ("drivers: modem: verify send semaphore before
taking any action")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This commit adds LiteX SoC Builder clock control driver for MMCM
module. It gives ability to change frequency, phase and duty cycle
on up to 7 clock outputs.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
CONFIG_IWDG_STM32_TIMEOUT allowed values of 100 us for initial watchdog
timeout, which was actually rounded to zero in the driver, which uses
milliseconds resolution for timeouts. This resulted in the reload value
being set to maximum possible (calculation: 0U - 1).
This commit updates the calculation of timeout minimum and maximum
values considering the actual LSI frequency of the used MCU.
As the resolution of CONFIG_IWDG_STM32_TIMEOUT in microseconds doesn't
make sense if the driver supports only milliseconds, it is renamed to
IWDG_STM32_INITIAL_TIMEOUT (this prevents accidental wrong settings in
existing firmware) and the unit is changed to ms.
Signed-off-by: Martin Jäger <martin@libre.solar>
Previously, msghdr was handled by forwarding each msg_iov to
offload_sendto() one by one.
This is not optimal, as msg_iov payload might have been sent
simultaneously which would be faster.
With this commit, send_socket_data() expect payload to be formated as
struct msghdr which can be used directly by both offload_sendto() and
offload_sendmsg().
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
This comit introduce two new Kconfig which allow to configure RSSI
polling work.
One Kconfig allow to completely disable the polling.
The other one allow to sonfigure the polling period.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Replace hard coded wait by real detection of '@'.
This make sure that datasheet timings are correctly followed.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Reset of the sem_response semaphore should be done before sending data.
This prevent any potential race conditions between the rx thread and the
thread running send_socket_data().
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Some data where not properly reset on socket_put() and not correctly
initialized at socket creation. Which means we were potentially re-using
data from previous use of this socket.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Before this commit, if a socket had received data before calling the
poll function, then the poll was waiting for either new data or a
timeout.
With this fix, polled socket are check for pending data before the
semaphore wait.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Extended nrf_rtc_timer driver to expose API for using RTC for
other purposes. System timer is using one compare channels,
other channels may be used through this API.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
After the commit SHA1: 370d02743a the
alias for 'eth' was removed. As a result DT_ALIAS(eth) for the mcux
enet driver was not providing a valid DTS node reference.
As a result the 'fixed-link' child node property was not recognized at
all.
The 'enet' is a valid DTS label for mcux enet driver, so lets use it
instead.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
When testing the bmi160 I've come across an issue where the readings
didn't make sense to me. The issue comes from reading the
BMI160_SAMPLE_BURST_READ_ADDR which is 0x0C assuming both accelerometer
and gyroscope. At this point we would normally read 12 bytes
(2 bytes per sample * 3 axes * 2 sensors). This reading takes place in
bmi160_sample_fetch and begins writing to data->sample.raw
Without this change, the first byte written is actually to the dummy
byte which effectively gets tossed. The issue is that this is the
GYR_X<7:0>(LSB) according to the BMI160 data sheet. When we later call
either bmi160_gyr_channel_get or bmi160_acc_channel_get we're looking
at sample.gyr and sample.acc (which is effectively shiften by 1 byte).
This change gets rid of the dummy byte which re-alignes gyr with the
start of the raw buffer.
Signed-off-by: Yuval Peress <peress@chromium.org>
The exclusive bound for parameter headers needs to be incremented as
the nph parameter is not the number of parameter headers: 0 means one
header.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Adding support for Quectel BG95 Modem offloaded driver
to zephyr.
The driver currently implements only the
client side functions of the "socket_op_vtable", and
so cannot be used for cases where Zephyr acts as a
server. Moreover the driver only supports TCP for now.
Looking through the guides, the same driver should be
usable for BG96 (and other modems) except for the modem
boot-up sequence. Hence its named as "bg9x" instead of
"bg95".
Tested extensively with Zephyr acting as MQTT endpoint
and publishing / subscribing data to / from an MQTT
broker.
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the clock devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Originally, sys_read8 to the mapped address was added part of
the unmap API to protect OMAP mapping, i.e. in case of PCIe writes,
OMAP should not be overwritten before writes are completed.
Now that we have added dummy PCIe read in the common APIs, namely
pcie_ep_xfer_data_memcpy and pcie_ep_xfer_data_dma, for the purpose
of flushing PCIe writes; the purpose of protecting OMAP *also*
gets satisfied, randering PCIe read in the unmap useless,
so remove the same.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Introduce common API to achieve data transfer using system DMA.
"System DMA" uses the outbound memory mapped Host address,
it cannot understand Host/PCIe address.
This API will take of mapping the Host address, completing
the data transfer to/from Host memory and unmapping the window;
thus providing abstraction to the user.
Since v1:
- refactored code for the cases where we have valid mapped_addr
to improve error management logic
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Once host memory is mapped to outbound memory, PL330 can be used to
transfer data between outbound memory and local memory.
Add API for the same, we get pl330 device as well as channels to be
used for tx/rx from DT and use DMA public APIs for data transfer.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
mktime() was being used to convert from struct tm to time_t, but
Zephyr now has functions for that.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
time_t always measures as seconds since 1970-01-01T00:00:00Z. Fix a
comment that identified the wrong epoch year, and document what the
value of the offset means.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
So far ESP chip was configured directly into STA mode. This works fine,
but consumes lots of power because of enabled WiFi radio, even when it
is not actively used.
Enter NONE mode during initialization, so WiFi radio will be
disabled. Switch between NONE, STA, AP and STA+AP modes depending on
what driver is currently doing (e.g. enable STA only when scanning,
connecting and being connected to AP).
AT+CWAUTOCONN=0 command fails when in NONE mode, so workaround that by
entering temporarily into STA and then switching back to NONE.
Add also a warning log when switching mode was not successful, to ease
debugging possible issues.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
AT+CWMODE command controls in which mode (NONE, STA, AP, STA+AP) ESP
chip is operating. Add helper macros to replace usage of magic
numbers (0-3), hence improve readability. Add also a esp_mode_switch()
helper function, which allows to conveniently switch to chosen mode.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Change internal API operating on ESP driver flags to support multiple
bitwise ORed flags at once. This allows to improve resulting code when
multiple flags are read or modified at once.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
All except one invocations of modem_cmd_send() pass the same interface,
command handler and semaphore. Create a helper function in order to make
invocations slightly more readable.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There is no point in clearing out command handlers if they were not
setup properly. Just skip to next instruction.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Command was sent first, then a semaphore was reset. This semaphore could
be released by received reply even before semaphore was reset. This is
quite unlikely, but possible result of race condition.
Move k_sem_reset() call before attempt to send command over modem
interface. This makes sure that receiving reply momentarily after
sending request will always be handled properly.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Semaphore argument is checked only after requested command is already
sent over modem interface. It makes little sense to return -EINVAL when
half of the requested operation (send) has already been done.
Check timeout and semaphore arguments just on the beginning of
function. Return -EINVAL early, before sending any data or taking any
locks.
Clear out 'sem' variable when there is no need to wait. Use this
variable later on as an indication to actually wait on semaphore or not.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There is no reason to clenaup members of net_context structure, as those
should be (and are) managed by net_context_put() implementation.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There is no reason to clenaup members of net_context structure, as those
should be (and are) managed by net_context_put() implementation.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Both 'cb' and 'user_data' parameters for send/sendto were saved as
'send_cb' and 'send_user_data' members in socket information. None of
them are actually used, so drop them.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
imx_msg transmission size type is uint32_t:
changed imx_read and imx_write signature accordingly.
Removed also two unused variables.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
When there is no data to send (e.g. i2c message with NULL buffer and
len=0), i2c_imx driver locks itself in isr handling forever.
So if there is no data to send, only device's address must be written
on bus. This fixes i2c_shell's scan command on both imx7 and imx6sx.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
The mcumgr header files are now in include/mgmt/mcumgr/, so reflect this
change in the UART console implementation.
Fixes#30261.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
An address might be made for 64bit though it's lower 32 bits are made of
0. Also Simplifying the overall by removing a useless variable.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Added early return from uart_poll_out when uart device is not in
active state. Poll_out is used from many contexts by multiple users
and currently here is no mechanism in power management to disable
them (console, logger when going to inactive power state.
Additionally, moved setting new state when disactivating the device to
ensure that no poll_out will happen after disabling the UARTE.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
It raises an error in case the source data width differs
from the dest data width.
The dma_stm32_width_config function is no more useful: removed.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Usage of mem_pool for all IN endpoints was removed in
commit b3c63425a0 ("usb: driver: Reduce Endpoint buffer pool.")
Remove also k_mem_pool_free for all IN endpoints.
Fixes: #30213
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit adds a new driver category for memory controller
peripherals. There is no API involved for now, as it has not been found
necessary for first implementation.
STM32 Flexible Memory Controller (FMC) is the only controller supported
for now. This peripheral allows to access multiple types of external
memories, e.g. SDRAM, NAND, NOR Flash...
The initial implementation adds support for the SDRAM controller only.
The HAL API is used, so the implementation should be portable to other
STM32 series. It has only been tested on H7 series, so for now it can
only be enabled when working on H7.
Linker facilities have also been added in order to allow applications to
easily define a variable in SDRAM.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Nothing in the API description the delayed work structure sanctions
direct reference to internal fields. Do not assume that a delayed
work item can be submitted without delay by invoking k_work_submit()
with a reference to the contained work item. Instead submit with the
delayed API and no wait.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Constifying global data allows to save lots of RAM. This improvement
allows to save 224 bytes of RAM when compiled on ARM, with default
configuration.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Constifying global data allows to save lots of RAM. Defining data inside
function as 'static const' allows on the other hand to save stack usage
and reduced code size (because data doesn't have to be copied on stack
in runtime).
This improvement allows to save 448 bytes of RAM and 88 bytes of ROM
when compiled on ARM, with default configuration.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Constifying global data allows to save lots of RAM. Defining data inside
function as 'static const' allows on the other hand to save stack usage
and reduced code size (because data doesn't have to be copied on stack
in runtime).
This improvement allows to save 640 bytes of RAM and 64 bytes of ROM
when compiled on ARM.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
modem_cmd and setup_cmd structures are used only to store static
information about commands to be sent and replies to be
received. Reference it as const, so that it is possible to define const
instances and save some RAM space by placing those definitions entirely
in ROM.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This change adds IEEE802154_RAW_MODE support for the
cc1352r.
This allows using the cc1352r 2.4 GHz radio and Sub Ghz
radio as a transceiver (PHY) instead of using L2 networking.
Signed-off-by: Erik Larson <erik@statropy.com>
Change to spi_context_lock missed one spot in the flexcomm driver and
this causes a build issue. Pass spi_cfg to spi_context_lock to fix
the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enables optionally placing Segger RTT and SystemView data in the DTCM
linker section instead of the default data section. This is needed on
SoCs in the i.MX RT series that use cacheable external SDRAM to store
data.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
currently pcie_get_mbar only returns the physical address.
This changes the function to return the size of the mbar and
the flags (IO Bar vs MEM BAR).
Signed-off-by: Maximilian Bachmann <m.bachmann@acontis.com>
This new offset value in the dma config is made to
build the table of dma mux_channels with a dmamux.
Range depends on the nb of channels for selected dma instance
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Perform FIFO flush in write failure case
Perform full PECI HW block reset if multiple consecutive
failures are observed
Remove trailing \n from logging messages
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
The SAM4L have a unique I2C driver. It shares simultaneously pins for
both master and slave controllers. Each controller have their own
instance. This introduces the TWIM controller that handles only the
master part.
The TWIM controller uses no copy and the driver was prepared to work
with both 7 and 10 bits address. The controller can handler up to 256
bytes for a single transfer allowing long data communication with
almost no CPU intervention.
The driver was wrote specifically to Zephyr. It receives a transfer
list of from upper layers to a specific device on the bus. It programs
the first and second transfer, if it exists, before start. At end of
full read/write interrupt, will program the next data block. This
process repeats until all transfers be executed. The driver uses
interrupt from TWIM to check for erros or program next tranfer.
Future work can enable low power mode on the driver allowing long
transfers with low power consumption.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
On the STM32MP1 and STM32H7 Series SoC, if slave select pin control by
software on master mode operation, the SS input/output polarity (SSIOP)
should be set to high level avoid the mode fault (MODF) error.
Signed-off-by: Harry Jiang <explora26@gmail.com>
When C2 is powered on, flash erase/write operation requires C1
to share a flash mutex with C2. This can only be done if IPM
communication is set up (SHCI).
Instead of configuring C2 (BLE controller) at on ble open,
do it at driver start up.
This allows flash operations before ble_open.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Keep locking for SPI_LOCK_ON from the first call of transceive until
spi_release release the lock. Use owner parameter to in the spi_context
to store the owner of the lock.
The locking is in line with the SPI_HOLD_ON_CS
Signed-off-by: Stefan Bigler <stefan@bigler.io>
Sometimes native_posix UART driver starts to flood the output
by printing hundreds of lines like this
np_uart_poll_out: a character could not be output
Remove the warning as it makes the output very hard to read
without giving much useful information.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Configure hostname by issuing AT+CWHOSTNAME="<hostname>" command. Do it
just after setting link address, which is used to generate hostname
postfix when CONFIG_NET_HOSTNAME_UNIQUE=y.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reworks the fxos8700 sensor driver to use DT_INST_FOREACH_STATUS_OKAY.
This allows it to support multiple instances, however only a single
instance was tested with the frdm_k64f board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Fixes the fxos8700 sensor driver to reflect recent changes in the
generic device driver structure, renaming driver_data and config_info to
data and config respectively. These instances in the fxos8700 sensor
driver were missed because we haven't enabled the magnetic vector
magnitude function in CI.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts fxos8700 magnetic vector magnitude options from Kconfigs to
optional device tree properties.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts fxos8700 power mode options (normal, low noise low power, high
resolution, low power) from Kconfigs to an optional device tree
property.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts fxos8700 range options (2g, 4g, 8g mode) from Kconfigs to an
optional device tree property.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The driver was using CONFIG_SRAM_BASE_ADDRESS as the value used to
recognize whether source buffer is in RAM. This label provide the
base address of the image SRAM, and not the base of actual HW SRAM.
This patch uses nrfx_is_in_ram() instead.
fixes#29467
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The at45 and nor spi flash drivers needs flash layout to work.
Probably tested were conducted with SoC that already selects
the FLASH_HAS_PAGE_LAYOUT for internal flash drivers. This add
the missing dependency.
Fixes#28094.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This module needs to format floating point values in shell print
statements, which requires FP format support.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Introduced two per instance booleans, which get set using DT info:
1. is_lsm303agr_dev: if the device is a LSM303AGR_ACCEL, then
the scale values have to be changed.
2. Handle disconnect-sdo-sa0-pull-up if present in ntsnace DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Handle interrupts correctly for multi instance, checking per
device DT bindings instead of global Kconfig definitions.
The old interrupt behaviour has been maintained, fixing DRDY to
be on INT1 and Any Motion event on INT2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
ZLP - zero length packet is used to indicate that the device
has no more data to send. If the Host asks for more data that the
device can provide and the data size is mutliplication of Endpoint
wMaxPacketSize then the device must terminate the data transfer
with ZLP.
Until this patch Nordic device driver controller was not aware of
the requested data length and could not determine when the ZLP was
required.
This patch introduces a fix that prevents the driver from starting
setup stage before the ZLP is being send.
For consistance with the Zephyr USB stack sending ZLP must be
issued from the stack level. Making trans_zlp flag true results
in blocking the driver from starting setup stage without required
ZLP.
After the data transfer finishes the driver will be prepared for ZLP
and will call back the stack to start writing ZLP. After the ZLP
is being send the driver will automatically start status stage and
end the Control Transfer.
This patch also removes CONFIG_USB_DEVICE_DISABLE_ZLP_EPIN_HANDLING
and aligns Nordic driver with others.
Without this patch the issue could occur when handling get requests.
Typical case is string descriptor of length equal to wMaxPacketSize.
Hosts usually asks for wLength = 255 Bytes when string descriptors
are being requested. In that case to successfully finish the data
stage of the Control transfer the device must send wMacPacketSize
Bytes of actual string descriptor and then ZLP to indicate that no
more data are present. After ZLP the status stage may start and the
request is finished successfully.
Without this patch the driver will not send ZLP making it unable
to end the Control Request successful - this may lead to failing
'Device Descriptor Test' from USB3CV test tool.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This patch adds setup packet copy in the Nordic device
controller driver (ubs_dc_nrfx.c). This patch is required
for subsequent patch that fixes isssues with ZLP handling.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
IN Endpoints does not require to have initialized internal
buffer. The data send are not copied to the internal buffer
anymore. This patch reduces memory usage for IN Endpoints.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Nordic device driver controller (usb_dc_nrfx.c) was fragmenting
IN transfers longer than wMaxPacketSize long using its
internal buffers. Buffers were reserved for each endpoint.
Because the Low level driver (nrfx) is capable of handling
fragmentation, there is no need to do it at the driver
controller level. Data pointer is used directly to create
the nrfx transfer. Endpoint buffers are not required anymore
and could be dropped.
This patch removes fragmentation of in transfers and omits
usage of internal endpoint buffers. Buffer could be later
freed by subsequent patches.
Nordic low level usbd driver is also capable of adding ZLP
if required however for consistance with the Zephyr USB device
stack ZLP must be triggered from stack level.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
An event was not handled by the clock control resulting in assert
and lack of notification about clock readiness.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The commit 5e97d779bb ("device: convert DEVICE_INIT to DEVICE_DEFINE
or SYS_DEVICE_DEFINE") did not convert the gsm_ppp.c properly. The
power management parameter was not set to NULL but was pointing to
the data pointer.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This commit introduces the catch that prevents building of
IEEE 802.15.4 nRF driver in case the non-secure domain of the core
is used.
Signed-off-by: Czeslaw Makarski <Czeslaw.Makarski@nordicsemi.no>
Take advantage of the new pcie_alloc_irq() API so that we get a valid
IRQ on platforms where the IRQ register is not pre-populated with a
valid value up front.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new pcie_alloc_irq() API so that we get a valid IRQ on
platforms where the IRQ registers do not contain valid values up
front.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
There are x86 platforms where the IRQ configuration register for PCIe
is not pre-populated and the OS needs to assign a number dynamically
by writing to the register.
In order to allocate interrupts we have to know which ones have been
hard-coded in device tree. We accomplish this by collecting these
values through the IRQ_CONNECT() macro and placing them in a dedicated
linker section (in ROM).
The full set of allocated interrupts are managed through a bitmap, and
the pre-allocated values (from the linker section) are inserted into
this upon initial runtime access.
This patch introduces a new pcie_alloc_irq() API that drivers can use
to allocate interrupt line numbers. The two in-tree drivers that were
using this API (I2C and UART) are converted to use the new API.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This adds support for GRLIB GPTIMER general purpose timer used in
LEON3/4/5 systems.
One of the GPTIMER subtimers is used to generate periodic interrutps
for announcing ticks. Another subtimer is used as upcounter for the
cycle_get_32() service.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Adds driver support for APBUART transmitter and receiver
interrupts. Compatible with APBUART implementations without HW FIFO
interrupt, for example QEMU.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This adds support for the GRLIB APBUART UART peripheral commonly used in
LEON3/4/5 systems.
Driver features:
- Auto-detecting debug FIFO, if configured by GRMON
- Setting and getting UART transfer attributes
- Hardware FIFO if available
- Any number of APBUART devices based on devicetree
- Error status indication
- Polled operation
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This adds support for the GRLIB IRQMP interrupt controller commonly used
in LEON3/4/5 systems.
The driver supports the 15 SPARC interrupts and 16 extended interrupts.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Neither i2c_transfer in i2c.h nor i2c_mcux_transfer in i2c_mcux.c
have any sort of locking. If e.g. an i2c eprom is updated using a
shell and simultaneously another thread access a lm75 then one
of the two transfers will fail or produce a random result.
This changes addresses this issue by that all i2c_msgs of one
i2c_transfer are completed before allowing a subsequent transfer
to start.
The code has been validated on a FRDM_K64F.
Signed-off-by: Andreas Dröscher <github@anticat.ch>
Endpoint STALL should be cleared when Endpoint is enabled.
In particular when the HOST performs SetInterface requests
and Endpoints associated with that Interface are enabled
STALL should be cleared.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Clearing the PSIZE bits in the FLASH CR should not invert the mask
defined in stm32f4xx_hal_flash.h (#define CR_PSIZE_MASK 0xFFFFFCFFU)
Signed-off-by: Justin Brederveld <jmbrederveld@gmail.com>
Add a Kconfig option (enabled by default) the enables the low-frequency
oscillator (LFXO) functionality on the XL1 and XL2 pins in the nRF53
SoC initialization routine. This cannot be done in the clock control
driver, as it was done so far, because that won't work in a setup where
the application core image does not use the system clock at all.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- Add ESP DHCP Support
- Add ESP Static IP Support including
KConfig entries for configuring IP,Gateway and netMask
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
This change enables the multi-protocol rf patch to be used for
the cc13xx_cc26xx IEEE 802.15.4 2.4 GHz PHY, which allows both
the 2.4 GHz and Sub GHz PHY to be used simultaneously.
Eventually, BLE will also work simultaneously on 2.4 GHz (with
arbitration).
Fixes#29883
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
Report errors using logging subsystem so it is easier to
see the error location while debugging code.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
Make this driver multi-instance and use the new API.
Notes for sensorhub mode:
In case of multiples devices it is possible that some of them
has i2c slaves attached to it (sensorhub mode) but not the
others. Since the driver is configured in the same way for
all the instances (CONFIG_SENSORHUB=y), the routine that initialize
the sensorhub part does not fail anymore in case no slaves
are found for a particular instance. Instead, those non-sensorhub
driver instances will set the shub_inited flag to false and
will totally ignore the feature.
Notes for triggers:
In case of multiples devices the device pin the interrupt wire is
attached to can be different (INT1 or INT2 pin). So, this
information has been moved in DTS and then stored in the
specific instance config structure.
Currently the driver is able to handle a sngle interrupt line
at a time attached to either INT1 or INT2.
MOreover, the interrupt initialization for a driver instance proceed
only if the drdy has been configured in its DT, else it returns ok.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Make driver generic for multiple ILI displays. The adopted strategy is
to share all driver code except register initialization, which has been
found to have some specific registers/values depending on the
controller.
The driver has been adjusted to support multiple compatibles.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Improve the way the nrf_qspi_nor driver configures the SCK frequency,
to properly support QSPI also on nRF53 Series SoCs that use a different
base clock frequency (96 MHz).
Add also a relevant configuration in the spi_flash sample so that it
can run on the nRF5340 DK.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Convert handful of users of DEVICE_INIT to DEVICE_DEFINE or
SYS_DEVICE_DEFINE to allow deprecation of DEVICE_INIT.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When MEC15xx boots in MAFS, ROM bootloader performs activity over
eSPI flash channel prior to FW is loaded.
Need to clear STS_DONE during early eSPI driver initialization,
before enabling interrupts to avoid unexpected ISRs in FW.
Otherwise this would cause flash_lock semaphore to be incremented
due to ROM activity and result in FW's first espi flash request
to return immediately even before eSPI bus transaction completes.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
In current implementation, for Ping command, write data/payload is
queued in FIFO infinitely eventhough Ping command have write length
of '0'.
This issue is addressed in this patch.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
This change adds IEEE 802.15.4g (Sub GHz) support for the
cc1352r.
The 2.4 GHz radio and the Sub GHz radio are capable of
operating simultaneously.
Fixes#26315
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
Obtaining irq_pin from dev leads to disabling interrupts
on unpredictable pin, as dev points to GPIO, not LSM6DSL.
Fixes#29721
Signed-off-by: Yurii Gubin <y.gubin@gmail.com>
For drivers that support CONFIG_DEVICE_POWER_MANAGEMENT there are some
cases that look like:
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
DEVICE_DEFINE()
#else
DEVICE_AND_API_INIT()
#endif
There is no need to special case this as the pm_control_fn argument to
DEVICE_DEFINE will just be ignored in the
!CONFIG_DEVICE_POWER_MANAGEMENT case. So we can cleanup the code a
little and remove the #else cases for the drivers that do this.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Option to pause writing to the pseudo terminal until it is ready to
receive data. Useful for pseudo terminal synchronization with other
host processes.
Signed-off-by: Pavel Král <pavel.kral@omsquare.com>
When setting the MAC address, the ethernet driver has to call
net_if_set_link_addr() with the updated address. This was missing and is
added now.
See e.g.
https://github.com/zephyrproject-rtos/zephyr/pull/28874
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Replaces all existing variants of value clamping with the MIN and MAX
macros with the CLAMP macro.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
We should clear the pvm interrupts (snoop and pcie pmon lite interrupt)
at source before handling them.
This will make sure that we do not lose any interrupts that may have
been asserted to interrupt controller during the handling routine.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
So far there was 100ms timeout on allocation of RX net_pkt. This is too
little for cases when lots of data are incoming on pretty
fast (e.g. 1Mbps) UART interface and application layer does not consume
received network packets fast enough. Up to now in such cases all
incoming data was processed from UART and there was no data loss when
utilizing hardware flow control. However there was high chance that data
processed from UART could not be passed further to network stack,
because of the 100ms net_pkt allocation timeout. This happens for
example when low priority application does not have enough time to run.
Increase default RX net_pkt allocation timeout from 100ms to 5s, so
there is much more time to process network packets. Such timeout should
not harm, because only a dedicated RX thread will be suspended for that
time, resulting in suspending UART traffic if hardware flow control is
supported.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There is now a hardcoded 100ms timeout on allocating new net_pkt for
received data. Move that configuration to Kconfig, so that value can be
tuned according to application needs.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There is no reason to keep active stream socket when there was some data
loss. Mark such socket for closing and close it when all (so far)
received packets have been processed.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Following migration of all in-tree boards to device tree bindings
for SDMMC pins configuration, deprecate SDMMC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for I2S pins configuration, deprecate I2S related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for USB pins configuration, deprecate USB related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for ETH pins configuration, deprecate ETH related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for ADC pins configuration, deprecate ADC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for SPI pins configuration, deprecate SPI related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for I2C pins configuration, deprecate I2C related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for CAN pins configuration, deprecate DAC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for serial pins configuration, deprecate CAN related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for serial pins configuration, deprecate (LP)U(S)ART related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for pwm pins configuration, deprecate PWN related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Reworks the mcux ethernet driver to use DT_INST_FOREACH_STATUS_OKAY and
eliminate a lot of duplicate code between instance 0 and instance 1.
Renames the ERR_MISC interrupt to ERR due to an issue with the
underscore in the device tree preprocessor macros.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add uart bus interface to extended esWIFI driver. This enables all
Inventek modules with IWIN AT Commands firmware.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
The WIFI_ESWIFI_NAME config would be uselful when there is no device
tree alternative. The esWIFI driver already is on device tree and the
label property exists. This remove WIFI_ESWIFI_NAME Kconfig variable
and switch to device tree equivalent.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Remove global access to structure eswifi_spi_data variable. Instead,
add a method to pass access to that structure. This allows better
control to the data bus variable.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
This is a temporary workaround for an issue in TI's RF Driver
API. A subsequent release of the SimpleLink SDK will mitigate
the need for it and it can be reverted when hal/ti receives
that update.
Fixes#29418
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
This change reworks the cc13xx_cc26xx IEEE 802.15.4 driver to use
the TI RF driver API that is available in modules/hal/ti.
There are a number of benefits to using TI's API including
- a stable multi-OS vendor library and API
- API compatibility with the rest of the SimpleLink SDK and SoC family
- potential multi-protocol & multi-client radio operation
(e.g. both 15.4 and BLE)
- coexistence support with other chipsets via gpio
- vetted TI RF driver resources, such as
- the radio command queue
- highly tuned / coupled RTC & RAT (RAdio Timer) API
Fixes#26312
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
In case of h/w setup with multiples device instances it is possible
that some of them wants to use triggers but not the others (no
interrupt line.
Since Kconfig configuration is the same way for all the instances
(CONFIG_LSM6DSL_TRIGGER=y), the driver behaves differently according
to how the device instance has been configured in the DT.
If irq-gpios is present, then the driver initialize the interrupt
part, else it skip irq init and returns ok, but data->gpio != NULL
xis checked in trigger_set() API.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Enable ARR preload so that period or pulse updates are taken
into account synchronously with update event
(at the end of a ongoing period)
And thus avoid undetermined intermediate pulse.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Add support for configuring Ethernet pins using DT pinctrl entries. Note
that F1 series pinctrl support is not handled as the driver does not
support F1.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Channels 4..7 are multiplexed on adc16. The NXP HAL exposes
ADC16_SetChannelMuxMode but this function is not yet included
in Zephy. The following patch adds channel-mux-b to the dts
enabling the use of the alternate channels of 16 bit adc.
Signed-off-by: Andreas Dröscher <github@anticat.ch>
1. Merged the single/multiple ring(s) APIs, now these APIs
can handle both which requires passing a ring id.
2. Updated timestamp handling to match the new timestamp
implementation in the SDK driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Those devices can use several I2C address in order to address more
than 256 Bytes using 8bit addressing. Also several physical component
can be used as a contiguous memory.
Signed-off-by: Guillaume Lager <guillaume.lager@gmail.com>
This patch makes the initialization of workqueue earlier
for Nordic driver. Without this change Nordic devices
will fail tests/subsys/usb/device test as it is resetting
USB and by that will try to start already started workqueue
thread. This may lead to Zephyr fatal error.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This driver supports the PWM driven LEDs. The devices are created from
the DT nodes with a compatible property matching "pwm-leds". For each
child node a LED is created and its "pwms" phandle's node is used to
retrieve the PWM configuration: channel, period and flags. If some of
this properties are missing (it is the case for some PWM controllers),
then reasonable default values are used.
This driver implements the following LED API methods:
- led_on
- led_off
- led_blink
- led_set_brightness
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
With STM32Cube updates
https://github.com/zephyrproject-rtos/hal_stm32/pull/75
'..._hal_rcc.c' and '..._hal_rcc_ex.c' are now systematically
compiled, due to more and more dependencies from HAL IP on rcc.
So USE_STM32_HAL_RCC and USE_STM32_HAL_RCC_EX becomes useless.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This provides structure for the regulator device hierarchy and a
driver for GPIO-controlled regulators along with its binding.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
At present this driver only supports SPI. Refactor it so that SPI is
just one of the options. This does not change any functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
This member holds the SPI bus pointer. Change its name to make that
more obvious and so that it can be used for an I2C bus also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are three separate read functions and two write
functions. This makes it harder to provide an interface that can work
with either SPI or I2C.
Use bmi160_read() for all reads and create a new bmi160_write()
function for all writes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this driver only supports a single instance. It sets up some
of its config in the init routine. It is better to put config in
constant data so that multiple instances can be supported and RAM space
is minimised.
Update the driver accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently a 'bmi160' pointer is used to point to the driver data. This
confusing, as the driver uses both data and config. Rename the variable
to 'data' like the bme280 driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver uses verbose names for the config and data structures, which
makes it harder to see which one we are talking about. Shorten it, like
the bme280 driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
All net_bufs allocated to modem_cmd_handler's data->rx_buf are consumed
synchronously in ublox-sara-r4.c in the same thread. This means that
allocating them with timeout makes no sense, because timeout
will *always* be hit when there are no more buffers in net_buf_pool.
Get rid of the unnecessary timeout, as it doesn't help and just slows
down processing of incoming data, increasing possibility of data
overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
All net_bufs allocated to modem_cmd_handler's data->rx_buf are consumed
synchronously in gsm_ppp.c in the same thread. This means that
allocating them with timeout makes no sense, because timeout
will *always* be hit when there are no more buffers in net_buf_pool.
Get rid of the unnecessary timeout, as it doesn't help and just slows
down processing of incoming data, increasing possibility of data
overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
All net_bufs allocated to modem_cmd_handler's data->rx_buf are consumed
synchronously in esp.c in the same thread. This means that allocating
them with timeout makes no sense, because timeout will *always* be hit
when there are no more buffers in net_buf_pool.
Get rid of the unnecessary timeout, as it doesn't help and just slows
down processing of incoming data, increasing possibility of data
overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far a dedicated buffer was used for data read from modem
interface. New net_bufs were allocated and filled later, which means
that data was lost when no more net_bufs were available in the pool.
Prevent data loss by allocating net_buf before attempting any read on
modem interface. Process incoming data in a loop as long as reading from
interface results in new data. Also remove dedicated buffer
(data->read_buf) and directly fill net_buf content instead. As a side
effect there are less memory copy operations and RAM usage is reduced.
Pre-allocated net_buf is now always appended to data->rx_buf. When there
was no (more) data read from interface to such net_buf, then this empty
net_buf will be on the end of data->rx_buf fragment list. Update
skipcrlf() and findcrlf() implementations to explicitly check for each
net_buf length, instead of blindly assuming them to have at least single
byte.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
cmd_handler_process() does two major things:
- reads data from modem interface and fills data->rx_buf,
- processes data in data->rx_buf.
Split implementation accordingly to two separate functions, which
improves readability (less automatic variables to follow at once) and
simplifies refactoring of each action.
No functional change was intended in this commit.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This is to make the gpio-i2c initialization occur after the GPIO pin
clock initialization.
Signed-off-by: Cassini Zhuang <cassini.zhuang@hansonggroup.com>
z_tick_get returns signed int. Adapt comparision
statement for remaining time computation.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
If CONFIG_MODEM_SIM_NUMBERS is 'n' than the data_imei field of struct
modem_context doesn't exist, so add ifdef protection for that case.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Allows the use of pin interrupt and callbacks for pca95xx family
GPIO expander chips with an interrupt line.
Enable config flag and define a gpio pin for the expander interrupt-
line (INT) in devicetree and the driver will accept pin interrupt
configurations for the expander gpio pins.
Level triggering is supported through emulation.
A worker is used to avoid waiting for I2C in ISR.
Example devicetree node:
gpioext0: tca9539@77 {
compatible = "nxp,pca95xx";
label = "GPIO_EXT_0";
reg = <0x77>;
interrupt-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
};
Fixes: #27561
Signed-off-by: Bent Ove Stinessen <bent@norbit.no>
This removes a semaphore unlock in init_spi function
which causes risks of competitive access
Signed-off-by: Clotilde Sattler <clotilde.sattler@stimio.fr>
Align register names with the ones found in the datasheet. It is easier
to follow datasheet if names are the same.
Some other minor enhancements have also been introduced (comments, use
BIT for bit fields...).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The initial configuration provided for the nrfx_power driver cannot
contain just default values, as that mean that DC/DC converters are
to be disabled, while those converters may be (and they actually are
by default for many boards) enabled through Kconfig.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for interrupt driven MSI-X PVM feature for Viper.
Function mask bit update is tracked with snoop interrupt
and vector mask bit update is tracked with pcie pmon lite
address range access detection interrupt.
Both the interrupts are required to enable this feature.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
drivers: pcie_ep: iproc: move msi/msix functions to a separate
file. This increases readability and modularity.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
File names such as pcie_ep_bcm_iproc.c / pcie_ep_bcm_iproc_regs.h
seem unnecessarily long, same with CONFIG symbols' names.
Let's shorten them by replacing 'bcm_iproc' with simply 'iproc'.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Listen func goes through a chain of calls to call winc1500_accept.
This is done to install the accept callback and should not block.
This fixes#28953 where winc1500 driver blocks on listen.
Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
There is no need to involve a work queue to control timeouts in
the uart_nrfx_uart driver. Kernel timers are sufficient for those
tasks, and the uart_nrfx_uarte driver may serve as a proof of this.
Replace then those uses of work queue with timers, for consistency
and simplicity, also to avoid potential issues with cancellation of
the delayed work queue items.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The TACH_XEC_DATA macro was not using its parameter
to retrieve the data structure.
It was working by chance so far.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
In #29055, GPIO registers programming order was modified in order
to avoid late glitch generation when programming pins at device
driver init.
The issue had been seen on non F1 device, but it made sense
to be applied on F1 series as well.
After test, it appears that it doesn't and initial F1 code was fine.
New code is generating glitch on I2C bus.
Revert the change for F1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
1, Change the allocation of DMA descriptors for the case
when multiple buffers are used for DMA transfer. This was
tested during SPI DMA transfers
2. Add support for the case when source and destination
addresses should not be incremented.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fix incorrect return value check when converting pinctrl
format to existing pin config format
Signed-off-by: Marin Jurjevic <marin.jurjevic@hotmail.com>
The header scheme for the IPM_CAVS_IDC driver changed and this legacy
platform (which is really a very close cousin of intel_adsp/cavs_v15)
broke. Fix things up. Longer term we should unify the two.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The SoC definitions have the necessary IPC/IDC bits so there is
no need to define them separately.
Originally-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Significant rework of the Intel Audio DSP SoC/board layers. Includes
code from the following upstream commits:
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Thu Jun 25 16:34:36 2020 +0100
xtesna: adsp: use 50k ticks per sec for audio
Audio needs high resolution scheduling so schedule to nearest 20uS.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 24 13:59:01 2020 -0700
soc/xtensa/intel_adsp: Remove sof-config.h includes
This header isn't used any more, and in any case shouldn't be included
by SoC-layer Zephyr headers that need to be able to build without SOF.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Sat Jun 20 15:42:58 2020 -0700
soc/intel_adsp: Leave interrupts disabled at MP startup
This had some code that was pasted in from esp32 that was inexplicably
enabling interrupts when starting an auxiliary CPU. The original
intent was that the resulting key would be passed down to the OS, but
that's a legacy SMP mechanism and unused. What it actually did was
SET the resulting value in PS.INTLEVEL, enabling interrupts globally
before the CPU is ready to handle them.
Just remove. The system doesn't need to enable interrupts until the
entrance to the first user thread on this CPU, which will do it
automatically as part of the context switch.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 13:57:54 2020 +0300
dts: intel_cavs: Add required label
Add required label fixing build for CAVS15, 20, 25.
Fixes following errors:
...
devicetree error: 'label' is marked as required in 'properties:' in
bindings/interrupt-controller/intel,cavs-intc.yaml,
but does not appear in
...
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 15:19:56 2020 +0300
soc: cavs_v18: Remove dts_fixup and fix build
Remove unused now dts_fixup.h and fix build with the recent code base.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 15:12:25 2020 +0300
soc: cavs_v20: Remove dts_fixup and fix build
Remove unused now dts_fixup.h and fix build with the recent code base.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 14:59:23 2020 +0300
soc: cavs_v25: Remove dts_fixup fix build
Remove unused now dts_fixup and fix build with the latest code base.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 12 12:29:06 2020 +0300
soc: intel_adsp: Remove unused functions
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 17:53:58 2020 +0300
soc: intel_adsp: Clean up soc.h
Remove unused or duplicated definitions.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 17:02:23 2020 +0300
soc: intel_adsp: De-duplicate soc.h
Move soc.h to common SOC area.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 15:54:19 2020 +0300
soc: intel_adsp: Remove duplicated io.h
Move duplicated io.h to common SOC area.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 12 12:39:46 2020 +0300
cmake: Correct SOC_SERIES name for byt and bdw
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 12 12:39:02 2020 +0300
soc: intel_adsp: Build bootloader only for specific SOCs
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Thu Jun 11 13:46:25 2020 +0100
boards: xtensa: adsp: add byt and bdw boards WIP
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 10 10:01:29 2020 -0700
soc/intel_adsp: Make the HDA timer the default always
The CAVS_TIMER was originally written because the CCOUNT values are
skewed between SMP CPUs, so it's the default when SMP=y. But really
it should be the default always, the 19.2 MHz timer is plenty fast
enough to be the Zephyr cycle timer, and it's rate is synchronized
across the whole system (including the host CPU), making it a better
choice for timing-sensitive applications.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 15:21:43 2020 +0300
soc: cavs_v25: Enable general samples build
Enables general samples build for SOC cavs_v25.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 15:13:53 2020 +0300
soc: cavs_v20: Enable general samples build
Enable general sample build.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 14:35:13 2020 +0300
soc: cavs_v18: Fix build general samples
Fix building general samples for CAVS18.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 14:22:40 2020 +0300
soc: intel_adsp: Add support for other SOCs
Support other SOCs in the "ready" message to the Host.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 13:25:39 2020 +0300
soc: intel_adsp: Move adsp.c to common SOC area
Move adsp.c to common and clean makefiles.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 17:18:18 2020 +0300
boards: intel_adsp: Remove dependency on SOF
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 9 14:29:44 2020 +0100
soc: xtensa: cavs: build now good for cavs20 + 25
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 15:57:01 2020 +0300
soc: cavs_v15: Fix build for hello_world
Fix build for other then audio/sof targets.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 14:50:12 2020 +0300
sample: audio/sof: Remove old overlays
Removing old overlays used to switch logging backend.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon Jun 8 15:02:01 2020 +0300
soc: intel_adsp: Correct TEXT area
Correct HEADER_SPACE and put TEXT to:
(HP_SRAM_WIN0_BASE + HP_SRAM_WIN0_SIZE + VECTOR_TBL_SIZE)
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 14:44:47 2020 +0300
soc: intel_adsp: Trivial syntax cleanup
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 14:41:07 2020 +0300
soc: intel_adsp: Fix bootloader script path
Make it possible to find linker script if build is done not inside
ZEPHYR_BASE.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 9 12:10:17 2020 +0100
soc: xtensa: cavs20/25: fix build with new headers - WIP
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 13:35:38 2020 +0300
soc: intel_adsp: Fix include headers
Fixes include headers
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 9 10:38:50 2020 +0100
soc: xtensa: cav18: updated headers- WIP
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Fri May 1 15:29:26 2020 -0700
soc/xtensa/intel_adsp: Clean up MP config logic
CONFIG_MP_NUM_CPUS is a platform value, indicating the number of CPUs
for which the Zephyr image is built. This is the value kernel and
device code should use to predicate questions like "is there more than
one CPU?"
CONFIG_SMP is an application tunable, controlling whether or not the
kernel schedules threads on CPUs other than the first one. This is
orthogonal to MP_NUM_CPUS: it's possible to build a "SMP" kernel on a
uniprocessor system or have a UP kernel on a MP system if the other
cores are used for non-thread application code.
CONFIG_SCHED_IPI_SUPPORTED is a platform flag telling an SMP kernel
whether or not it can synchronously signal other CPUs of scheduler
state changes. It should be inspected only inside the scheduler (or
other code that uses the API). This should be selected in kconfig by
soc layer code, or by a driver that implements the feature.
CONFIG_IPM_CAVS_IDC is a driver required to implement IPI on this
platform. This is what we should use as a predicate if we have
dependence on the IPM driver for a platform feature.
These were all being sort of borged together in code. Split them up
correctly, allowing the platform MP layer to be unit tested in the
absence of SMP (c.f. tests/kernel/mp), and SMP kernels with only one
CPU (which is pathlogical in practice, but also a very good unit test)
to be built.
Also removes some dead linker code for SMP-related sections that don't
exist in Zephyr.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Jun 8 16:41:55 2020 +0100
soc: xtensa: bootloader - use linker script
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Jun 8 16:26:18 2020 +0100
soc: xtensa: further fix headers - WIP
Simplify the directory structure, WIP for cavs20 and cavs25
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon Jun 8 12:59:30 2020 +0300
soc: cavs_v15: Remove unneeded include
Remove include fixing build.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun Jun 7 12:37:35 2020 +0100
soc:xtensa: adsp: remove sof specific code from soc headers
TODO: v1.8+
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Marc Herbert <marc.herbert@intel.com>
Date: Thu Jun 4 23:19:37 2020 -0700
intel_adsp_*/doc: fix duplicate .rst labels
Quick fix purely to make the build green again.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Author: Marc Herbert <marc.herbert@intel.com>
Date: Thu Jun 4 22:34:40 2020 -0700
samples/audio/sof: use OVERLAY_CONFIG to import apollolake_defconfig
This reverts commit 21f16b5b1d29fca83d1b62b1b75683b5a1bc2935 that
copied it here instead.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 5 12:34:48 2020 +0300
soc: intel_adsp: Move soc_mp to common
Moving soc_mp to common SOC area, it still needs fixes for taking
number of cores from Zephyr Kconfig, etc.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 16:05:06 2020 +0300
soc: intel_adsp: Move memory.h from lib/
For those files from SOF referencing platform/lib/memory.h we have
include.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 15:20:09 2020 +0300
soc: intel_adsp: Rename platform.h to soc.h
Rename to prevent including it from SOF.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 11:47:55 2020 +0300
soc: intel_adsp: Move headers
Move headers to more convenient place
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 11:21:51 2020 +0300
soc: intel_adsp: More SOC cleaning
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Marc Herbert <marc.herbert@intel.com>
Date: Mon Jun 1 15:31:34 2020 -0700
samples/audio/sof: import sof/src/arch/xtensa/ apollolake_defconfig
Import modules/audio/sof/src/arch/xtensa/configs/apollolake_defconfig
into prj.conf and new boards/up_squared_adsp.conf
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 15:07:40 2020 +0100
soc:xtensa: adsp: let SOF configure the DSP for audio
Let SOF do this for the moment.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 15:06:20 2020 +0100
soc: xtensa: cavs: remove headers similar to cavs15
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 3 15:58:38 2020 +0300
soc: intel_adsp: Move ipc header to common
Remove duplicated headers from CAVS to common SOC part
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 3 13:02:09 2020 +0300
soc: cavs_v15: Remove unneeded headers
Remove also from CAVS15.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 18:34:11 2020 +0300
Remove more headers
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 14:12:09 2020 +0100
soc: xtensa: remove cavs sod headers for drivers and trace.
Duplicate cavs15 headers.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 14:05:12 2020 +0100
samples: move sof dai, dma and clk configs to SOF
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 17:38:45 2020 +0300
soc: intel_adsp: Remove more duplicated headers
Remove more headers
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 2 15:50:03 2020 +0100
samples: sof: remove pm realted files.
Use the SOF versions.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 16:55:40 2020 +0300
WIP: Strip lib from include path
WIP, pushed for sync
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 14:44:33 2020 +0300
soc: intel_adsp: Remove more headers
Remove even more common headers
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 14:00:47 2020 +0300
soc: intel_adsp: Remove SOF headers
The headers would be used by audio/sof app directly from SOF module.
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Sat May 30 11:01:26 2020 -0700
soc/intel_adsp: Alternative log reading script
This script speaks the same protocol and works with the same firmware,
but:
* Is a single file with no dependencies outside the python3 standard
library and can be run out-of-tree (i.e. with setups where the
firmware is not built on the device under test)
* Operates in "tail" mode, where it will continue polling for more
output, making it easier to watch a running process and acting more
like a conventional console device.
* Has no dependence on the diag_driver kernel module (it reads the DSP
SRAM memory directly from the BAR mapping in the PCI device)
* Is MUCH smaller than the existing tool.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu May 28 16:17:51 2020 +0300
Decrease HEP pool size to 192000
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:27:00 2020 +0100
soc: xtensa: cavs25: complete support for cavs25
Builds, not tested on qmeu due to missing SOF ROM (TODO)
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:24:26 2020 +0100
soc: xtensa: cavs20: complete cavs20 support
Now boots on qemu.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:22:13 2020 +0100
soc: xtensa: cavs18: complete boot support
Now boots on qemu.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:19:23 2020 +0100
soc: xtensa: cavs15: use cavs15 instead of apl as linker soc name
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:16:06 2020 +0100
TODO: samples: sof: work around missing trace symbols.
Disable local trace.
Needs trace updates finished before this can be removed.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:57:19 2020 +0100
dts: xtensa: rename apl to cavs15 DTS
This DTS is used by more than APL SOC. i.e. all CAVS15 SOCs
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:52:20 2020 +0100
west: commands: sign: Add signing support for other CAVS targets
Sign for CAVS15, CAVS18, CAVS20 and CAVS25 SOCs
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:50:07 2020 +0100
boards: xtensa: cavs: used Zephyr mask macro
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:49:46 2020 +0100
soc: xtensa: move code to SOF
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue May 26 11:40:36 2020 +0100
soc: xtensa: use SOF versions of clk
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 18:38:45 2020 +0300
soc: intel_adsp: Send FW ready for non SOF configuration
Configure windows and send FW ready when used without SOF, should be
loaded with fw_loader script.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 18:02:22 2020 +0300
soc: intel_adsp: Use SOF version of the file
Use exact copy from SOF module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:47:27 2020 +0300
soc: intel_adsp: Clean up include headers
Remove SOF mentions from the SOC headers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:43:05 2020 +0300
soc: intel_adsp: Move SOF specific code to samples/audio/sof
Move SOF specific code to the SOF sample.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:39:42 2020 +0300
soc: intel_adsp: Use SOF module's version of mem_window.c
Use exact copy from SOF module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:36:41 2020 +0300
soc: intel_adsp: Use exact copy from SOF module
Use SOF module verion of the clk.c
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 14:03:35 2020 +0300
soc: xtensa: Add {SOC_FAMILY}/common/include path
Add ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include path if exist.
Fixes issues for xtensa SOCs.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 25 16:18:50 2020 +0100
soc: xtensa: cavs common: fix headers for build
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 25 16:10:57 2020 +0100
soc: xtensa: adsp: add so_inthandlers.h for Intel platforms
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 25 16:08:26 2020 +0100
cmake: xtensa: select correct compiler per CAVS target.
TODO: what about XCC ?
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue May 19 14:59:26 2020 +0300
boards: up_squared_adsp: Move SOF configuration to samples
Move SOF-specific configuration to samples/audio/sof prj.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri May 15 15:29:50 2020 +0300
soc: intel_adsp: Move SOF code to modules/audio/sof
Move SOF dependent code out of SOC area.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu May 14 17:30:38 2020 +0300
Move task_main_start() to audio/sof sample
Start task_main_start() from main of audio/sof sample.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed May 13 15:37:20 2020 +0300
Rename up_xtreme_adsp to intel_adsp_cavs18
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon Apr 27 14:12:59 2020 +0300
Add sample audio/sof for SOF initialization
Add dedicated sample where we put SOF specific initialization.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 11 18:49:36 2020 +0300
WIP: soc: cavs_v18: Cleanup
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 11 15:44:06 2020 +0300
soc: cavs_v15: Move soc init to common part
Moving SOC init to the right place.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 11 15:02:28 2020 +0300
soc: intel_adsp: Move common part to special dir
Moving common part to common/adsp.c
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri May 8 14:37:50 2020 +0300
boards: up_xtreme_adsp: Add initial up_xtreme_adsp board
Add initial board copying existing up_squared_adsp board and using
CAVS1.8 SOC family.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu May 7 15:30:51 2020 +0300
soc: intel_adsp: Generalize bootloader
Move bootloader to soc/xtensa/intel_adsp making it available for other
boards.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue May 5 21:31:00 2020 +0100
boards: xtensa: up_squared: Add support for all CAVS
Add boot support for all CAVS versions. TODO: needs to be made common
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue May 5 21:25:34 2020 +0100
soc: xtensa: intel_adsp: Manage cache for DMA descriptors
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 4 21:10:50 2020 +0100
soc: xtensa: adsp: use 24M567 clock
Use audio clock
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 4 10:04:01 2020 +0100
xtensa: soc: adsp: enable system agent
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 15:03:07 2020 +0100
soc: xtensa: intel_adsp: increase mem pool to 192k
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 15:02:31 2020 +0100
soc: xtensa: intel_adsp: re-enable DMA trace
Buffer will be empty (as trace items sent to Zephyr LOG) but
logic is running.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 11:18:55 2020 +0100
soc: xtensa: intel: dont use uncache region yet.
Some code was still using this region. Use later.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 10:07:28 2020 +0100
soc: xtensa: intel_adsp: fix notifier init
Topology now loads.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 1 21:18:38 2020 +0100
boards: up2: Need to use sof config for bootloader
This will need uncoupled at some point. For testing today.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 1 21:16:38 2020 +0100
boards: up2: increase heap to 128k
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Apr 30 11:35:19 2020 +0300
boards: up_squared_adsp: Use bigger HEAP
Use HEAP from old demo.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 1 16:06:32 2020 +0100
soc: xtensa: intel_adsp: Fix config.h naming collisions
Rename sof version to sof-config.h
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Apr 30 11:22:42 2020 +0300
Small cleanups
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 29 22:00:44 2020 +0300
tests: sof/audio: Test ll scheduler
Add more tests for scheduler.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 29 18:38:35 2020 +0300
tests: Add first schedule test
Add initial test for testing scheduling.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 29 13:36:23 2020 +0100
soc: xtensa: rmeove build warnings
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 28 18:04:33 2020 +0300
soc/intel_adsp: Register sof logging
Register sof logging for tracing
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 28 14:16:55 2020 +0300
boards: up_squared_adsp: Define HEAP_MEM_POOL_SIZE
Define HEAP_MEM_POOL_SIZE when SOF enabled.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 28 10:09:20 2020 +0300
tests: audio/sof: Add interrupt API for testing
Add initial interrupt API for testing.
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 27 15:54:28 2020 +0100
soc: xtensa: adsp: Update linker script for SOF sections.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 27 11:20:01 2020 +0100
soc: xtensa: adsp: send SOF FW metadata as boot message
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun Apr 26 21:47:20 2020 +0100
soc: xtensa: adsp: re-enable all SOF IP init.
Do all SOF IP init.
TODO: ATOMCTL, WFI on LX6
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sat Apr 25 15:30:40 2020 +0100
soc: xtensa: irq: Make sure IPC IRQ is registered.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 22 20:56:09 2020 +0300
tests: sof: Enable console
Enable console for the test.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 22 17:57:22 2020 +0300
soc: cavs_v15: Fix XTENSA_KERNEL_CPU_PTR_SR
Use correct value for XTENSA_KERNEL_CPU_PTR_SR.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 22 14:48:31 2020 +0300
tests: audio/sof: Add tests for alloc API testing
Add initial tests for allocation API testing. Can be extended for
other later.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 21 17:49:32 2020 +0300
logging: Enable xtensa simulator backend for ADSP
Enable xtensa simulator backend for SOC_FAMILY_INTEL_ADSP.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 20:58:30 2020 +0100
soc: xtensa: add common cpu logic
Support for additional cores.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 21 10:11:07 2020 +0300
Update west.yaml to point to the latest repo
Update west.yaml
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:17:01 2020 +0100
soc: xtensa: cavs: Fix build for clk.c on cavs18+
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:05:31 2020 +0100
soc: xtensa: cavs15: removed unused headers.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:05:09 2020 +0100
soc: xtensa: cavs25: align with SOF headers
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:03:52 2020 +0100
soc: xtensa: cavs20: align with SOF headers
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:03:09 2020 +0100
soc: xtensa: cavs18: Align with SOF headers.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 11:42:39 2020 +0100
west: sof: Updated to latest version.
Now builds, links and runs SOF code (but not to FW ready).
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun Apr 19 13:28:53 2020 +0100
xtensa: intel adsp: build in SOF symbols if CONFIG_SOF
Code now fully links against SOF. Needs to be run tested.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Wed Apr 15 10:19:28 2020 -0700
DO NOT MERGE: temporarily add thesoftproject as remote for sof module
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Wed Apr 15 10:33:40 2020 -0700
ipm: cavs_idc: use the IPC/IDC definitions in SoC
The SoC definitions have the necessary IPC/IDC bits so there is
no need to define them separately.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 14:30:20 2020 +0100
TODO: config: Use static config for SOF module.
TODO: needs to be generated as part of SOF kconfig
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri Apr 10 21:56:07 2020 +0100
HACK: Add SOF into build
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 13:55:15 2020 +0100
west: modules: Add SOF audio module.
Add support for building SOF as a Zephyr module. This is the starting
point for add SOF audio into Zephyr. Currently builds but does not use
any symbols yet.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 13:48:48 2020 +0100
WIP soc: adsp-cavs15: Use same include directory structure as SOF
Use the same directory structure as SOF to simplify porting and allow
SOF to build without Zephyr until porting work is complete.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 13:43:44 2020 +0100
WIP soc: adsp-common: Use same include directory structure as SOF
Use the same directory structure as SOF to simplify porting and allow
SOF to build without Zephyr until porting work is complete.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 14:36:32 2020 +0000
WIP: soc: adsp-common: cache is common across all Intel ADSP platforms
De-duplicate soc.h cache definitions.
TODO: this needs done for other common functions.
TODO: need to fix include path
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 30 11:07:43 2020 -0700
WIP: soc: cavs25: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 30 11:07:12 2020 -0700
WIP: soc: cavs20: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 30 11:06:40 2020 -0700
WIP: soc: cavs18: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 12:37:17 2020 -0700
soc: intel_adsp: use main_entry.S in common for cavs_v15
The files are identical anyway.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 11:38:14 2020 -0700
soc: intel_adsp/cavs_v15: link common code
Let cavs_v15 link against the code compiled under common/.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 13:08:28 2020 +0000
WIP: soc: common: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 14:37:32 2020 +0000
WIP soc: adsp-cavs15: build power down support
Build the power down support for CAVS1.5
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 12:40:17 2020 +0000
WIP: soc: cavs15: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 14:30:08 2020 +0000
soc: cavs15: Add missing SHIM registers.
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 9 15:43:01 2020 +0000
xtensa: intel_adsp/cavs_v15: fix usage of LP SRAM power gating
Remove LSPGCTL as it can cause confusion, use SHIM_LSPGCTL instead.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Feb 26 15:28:48 2020 +0000
boards: up_squared_adsp: Use local xtensa HAL instead of SDK HAL
SDK HAL is deprecated for Intel ADSP SoCs so fix and use local HAL
module.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 10:45:15 2020 -0700
soc: add Intel Audio DSP SoC family
This creates a SoC family for the audio DSPs on various
Intel CPUs. The intel_apl_adsp is being moved into
this family as well, since it is part of the CAVS v1.5
series of DSPs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 11:29:02 2020 -0700
soc: xtensa: add CMakeLists.txt
Add CMakeLists.txt under soc/xtensa so that CMakeLists.txt
inside each SoC directory will be included, similar to
what ARM and RISCV have.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 17 12:30:43 2020 -0700
Revert "boards: up_squared_adsp: Add flasher script"
This reverts commit 80f295a9dd.
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 17 12:30:32 2020 -0700
Revert "boards: up_squared_adsp: Update logtool tool"
This reverts commit 7770d182c1.
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 17 12:30:23 2020 -0700
Revert "soc: intel_adsp: Generalize bootloader"
This reverts commit d6a33ef467.
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
soc: xtensa; intel: remove sof-config.h - SQUASH
No longer used.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The HDA wall clock timer is a 64 bit timer with 64 bit compare
registers, but it's being used from a 32 bit CPU. Writing the
comparator piecewise with a 64 bit C assignment will write the low
dword first, opening the possibility that the hardware will see time
go "backwards" and trigger an interrupt incorrectly.
Disable the enable bit while setting the comparator.
Found by inspection. In practice this will be very rare, and spurious
timer interrupts are supposed to be benign anyway (though they can
result in timeout expirations being misaligned to ticks, which might
be surprising to applications). Best to get it right.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
If other threads are accessing the modem concurrently during gsm_ppp
initialization, they can easily corrupt UART comms. Normally this is not
noticable since those services are usually started only after modem
setup has been completed. But with the new gsm_ppp stop/start
functionality, the need of synchronizing concurrent access in a
structured way has arisen.
This commit ensures modem_cmd_handler is locked when concurrent access
to the modem UART would interfere with the driver, or otherwise cause
problems. Since the semaphore is not available during this period, all
essential calls to modem_cmd_send has been replaced with the non-locking
equivalents.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
A semaphore is used by modem_cmd_handler to protect against concurrent
UART access. This is only used for the duration of sending a command,
but there are cases when one wants to prevent UART access for other
reasons, such as when powering off the modem.
This commit exposes functionality for hogging this semaphore without
having to send a command. Furthermore, a non-locking equivalent for
modem_cmd_handler_setup_cmds is added which was previously missing.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
The parameters of the associated PWM timer were not being picked up
properly, as it was assumed that parent index is the same as the child
index. This is not necessarily true if other timer nodes are active and
not being used for PWM.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
CAN remaps were guarded by CMSIS defines which are always defined
for a given SoC.
Though under this control, we're using DT_ macros that expect
a certain node to be available, which otherwise leads to cmopilation
issue.
Align CAN node remap code on other peripherals code and check for
node availability.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set stm32_dt_pinctrl_configure function as the unique entry point
to STM32 DT pinctrl management.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move pinctrl remap functions out of stm32f1 definition in order
to get it available to all series.
Allows use of more IS_ENABLED macros in calling drivers and make
code more readable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add power-gpios device-tree binding property to power on module before
communicating with it. This pin is called CHIP_PU in case of ESP32{,-S2}
and CHIP_EN in case of ESP8266. Dedicated reset pin is available only on
the latter, however Espressif recommends (in ESP8266 Hardware Design
Guidelines) to use CHIP_EN instead. Follow those recommendations and use
power-gpios to reset chip if that is provided over device-tree.
Configure power-gpios and reset-gpios as inactive by default, so that
chip becomes ready after executing esp_reset() function, either if one
or both are provided over device-tree.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Most DT bindings use reset-gpios name when there is a pin to reset whole
chip. Rename wifi-reset-gpios to reset-gpios to be more consistent
between various drivers. Additionally this prevents confusion, as
somebody might think that this pin resets only WiFi, which is not true.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Remove two operation flags in the SPI configuration
instance, which disturb software controlled chip select
lines (CS never gets released).
Signed-off-by: Marco Peter <marco@peter-net.ch>
Application might need to know the GSM modem device name so
provide it in the header file.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
When PPP is muxed, using uart_poll_out resulted in each byte getting
wrapped in a muxing header. This led to UART bombardment which
can quickly cause some modems to hang and panic. This was observed
regularly using a SIMCOM7600E modem.
A perfect fix would involve rewriting ppp.c, uart_mux.c and
modem_iface_uart.c to all use another UART API, but that would be more
invasive by several orders of magnitude than this one, which utilizes
the fact that the uart_mux implementation of uart_fifo_fill does NOT
require ISR context. Since the Zephyr UART API states that the behavior
of uart_fifo_fill outside of ISR context is implementation defined, this
should be kosher.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
These changes enable applications to restart the networking stack which
was previously not possible without rebooting the device. This was a
major show-stopper because it made power management impossible, and
furthermore made it impossible to recover from a bad modem state without
rebooting.
This has been verified to work on a SIMCOM7600E modem, both with and
without CONFIG_GSM_MUX enabled.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
The char pointer that is logged could get scoped out and so should be
strduped before logging.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Thread implements couple of counters that require notification of failed
frame reception.
Implemented RX failed notification.
Signed-off-by: Marek Porwisz <marek.porwisz@nordicsemi.no>
Attempting to initialize PPP without first ensuring we're attached to
the network packet service will sometimes lead to "NO CARRIER" errors
when we initialize PPP with the modem. This has been observed
reproducibly on some SIMCOM7600E modems.
This commit holds off on PPP initialization until modem has reported
that it is indeed attached by using the "AT+CGATT?" command (see 3GPP TS
27.007)
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
The only user of the I2C instances is the esp32 driver. Move the
Kconfig symbols down to the esp32 Kconfig for the instances it needs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A GPIO's parallel output bit in the parallel output
registers is read-only until the AOD bit is set to 1
in the pin's control registers. The proper sequence to
preset the state of an output pin is:
Configure pin as input with AOD=1 in the control register
Set pin state in the parallel output register
Set direction to output in the pin's control register.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The IIS2ICLX is a high-accuracy. ultra-low noise, low-power
two-axis linear accelerometer which can be interfaced through
either I2C or SPI bus.
Its high accuracy, stability over temperature and repeatability
make IIS2ICLX particularly suitable for inclination measurement
for industrial applications (inclinometers).
https://www.st.com/resource/en/datasheet/iis2iclx.pdf
This driver is based on stmemsc i/f v1.03.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Moved enabling SPI peripheral in front of the buffers loop.
Removed SPI DMA switching on in front of the buffers loop.
Signed-off-by: Łukasz Mazur <lukasz.mazur@hidglobal.com>
Removed SPI peripheral disabling when switching DMA to another buffer.
When using hardware chip select this would cause to stop driving
CS pin when swhitching buffers. This is different (and wrong) than
when used software CS.
Fixes#28833
Signed-off-by: Łukasz Mazur <lukasz.mazur@hidglobal.com>
Have the driver default to UART_CFG_PARITY_NONE if no parity property
exists rather than using default in binding.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes gpio_mcux_lpc_port_set_masked_raw function inside gpio_mcux_lpc
driver. Writing masked data is correctly done using device registers.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
ADC shell commands can be only executed on the property label
existing in the device tree. It is realized by the dynamic subcommand
returning existing ADC Label.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
The channel command has been extended with subcommands: id, positive,
and negetive. Some boards require positive input configuration before
measurement can be started.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Use dedicated shell macros so argument count can be validated before
the command handler is executed. This change simplifies the command
handlers implementation inside the adc_shell file.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Changed gain and reference commands to dictionary commands.
This change removes an obsolete look-up table (string <-> value)
for gain and reference commands.
Now, each modification of gain or reference value will require only
a dictionary command update.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
'remap' value can never be REMAP_FULL for usart.
Fix this value depending on the usart instance.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Stable API change: modify parameters of clock_control_async_on which
previously took a structure which contains list node, callback and user
context. Removing list node and replacing structure with two parameters:
callback and user context. List node is removed because it has no use
in current API.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Refactoring poll_out to be ready for handling preemption. uart_tx and
uart_fifo_fill modified so they are resilient to being preempted by
uart_poll_out.
Refactored uart_poll_out implementation to be common for interrupt
driven API and asynchronous API. In both APIs active state is detected
by evaluating state of ENDTX and TXSTOPPED events. If anyone is set it
means that new transfer can be started.
Patch is fixing existing issues:
- potential bytes dropping with flow control enabled
- busywaiting for ENDTX (asynchronous API) - poor performance
- potential bytes dropping during preemption
- potential uart_tx returning -EBUSY when interrupted poll_out
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
If neither a random address nor a specific local address is in the
device tree, then use the MAC address from the device information page.
Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v1.03.
Requires https://github.com/zephyrproject-rtos/hal_st/pull/5
(merged as b52fdbf4b62439be9fab9bb4bae9690a42d2fb14)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The interrupt enabling routine was called before the
chip enabling routine resulting in a runtime failure
when triggers are set.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This CL fixed the wrong comparison during searching the vw signal
that issued interrupt from MIWU in espi_vw_generic_isr().
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In order to be in line with other DT_INST macros in zephyr code base,
swap the arguments order in following macro definitions:
*ST_STM32_DT_PINCTRL
*ST_STM32_DT_INST_PINCTRL
Update the users accordingly.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to pcintrl configuration using pcintrl helper
macros.
Pinctrl init sequence has to be done before bus_mutex initialization.
Driver dts bindings are updated to reflect usage of pinctrl-x
properties
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Current set of helpers provided for STM32 pinctrl devicetree are
using device instance as input.
In order to prepare for next version that will take node identifier
as input, change existing set of macros using _INST_ namespace.
Additionally rename NODE_ID_FROM_PINCTRL to
ST_STM32_DT_INST_NODE_ID_FROM_PINCTRL.
Finally update existing macros users to this new name scheme.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
During implementation of i2c pinctrl configuration within i2c driver,
it appears that current order of register configuration used to
generate a spike on I2C bus, leading to broken configuration with
I2C device.
Reverse the order so that pin mode setting is done only after pupd,
speed and type are set, in order to avoid generating unwanted
artefacts on the bus.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Do not override OUI of the local MAC address in the devicetree.
Simplify the mac address assignment conditions. Each interface has
its own function. Code duplication will be eliminated with the
use of DT_INST_FOREACH_STATUS_OKAY in a later commit to completely
remove duplicated code.
The 3 possible MAC address assignment (local, random and unique)
are covered and have been tested.
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
This fixes wrong value for i.MX RT.
This is one less hard-coded value in eth_N_context structures.
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
This allows setting the MAC address at run time.
Signed-off-by: Antoine Zen-Ruffinen <antoine@riedonetworks.com>
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
The PLL Q divisor does not exist on stm32g0X0 variants. It should only
be configured for g0X1 variants.
Signed-off-by: Eric Hay <EHay@sierrawireless.com>
CheckRfFrequency was not assigned correctly to the Radio. This lead
to the system hang when the loramac library tries to call a relevant
Radio method when processing a join-accept message
Signed-off-by: Kuba Sanak <contact@kuba.fyi>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
For preparing the radio drivers (specifically SX1276) for LoRaWAN
support, let's add missing function definitions and callbacks required
by the stack.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Since TimerIrqHandler() API does SPI transactions, it is not advised to
call from an IRQ context. Hence, offload it to a work queue.
Reported-by: Andreas Sandberg <andreas@sandberg.pp.se>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The loramac-node library definition will also be created by
'subsys/lorawan' for the LoRaWAN support. Hence, just add the source
files if the previous declaration of the library is found else create
a new one.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Now that Zephyr names have been made short and nice the need of these
helpers is less justified.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add const modifier for hal instances, clock devices pointer, and module
base address in npcx drivers to prevent driver functions change them
unexpectedly.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In npcx7 series, there're 8 Pulse Width Modulator (PWM) modules and each
one support generating a single 16-bit PWM output. A 16-bit clock
prescaler (PRSCn) and a 16-bit counter (CTRn) determine the cycle time,
the minimal possible pulse width, and the duty-cycle steps.
Beside introducing pwm driver for Nuvoton NPCX series, this CL also
includes:
1. Add PWM device tree declarations.
2. Zephyr PWM api implementation.
3. Add aliases in npcx7m6fb_evb board device tree file for supporting
samples/basic/blinky_pwm application and pwm test suites
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Make sure remap is disabled when not requested.
This should have no impact on current cases but is important
when dynamic pin configuration will be used.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There are cases where the socket would not be closed.
offload_put function will now always close the socket
properly.
Remove error log messages as they are redundant.
on_cmd_sock_error_code handles printing errors.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This part of common code for ADC drivers, the adc_context_enable_timer()
function, was still converting sampling interval values to milliseconds
(the only option available at the time this code has been created) when
setting up the kernel timer, consequently limiting the maximum sampling
frequency to 1000 samples per second. This patch switches the routine
to specifying the interval in microseconds, to remove this limitation.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This emulator supports enable functionality to start up the device and
read a few samples. It connects itself to any BMI160 device it finds in
the device tree. The SPI emulation controller driver is used to direct
SPI messages from the BMI160 driver to the BMI160 emulator.
Add a few more definitions to the header file, as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an emulation controller which routes SPI traffic to an attached
emulator. Only one emulator is supported per bus at present, since
chip-selction functionality is not present.
This allows drivers for SPI peripherals to be tested on systems that
don't have that peripheral attached, with the emulator handling the SPI
traffic.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present register access is a mix of constants and open-coded values
in the driver. Add a few more constants to clean this up.
Signed-off-by: Simon Glass <sjg@chromium.org>
If HW flow control is enabled, then modem_context framework won't drain
UART FIFO blindly, but will stop when there is no more space in RX
ring_buf. This prevents data loss by "pausing" incoming data on hardware
level.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
If HW flow control is enabled, then modem_context framework won't drain
UART FIFO blindly, but will stop when there is no more space in RX
ring_buf. This prevents data loss by "pausing" incoming data on hardware
level.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far all received bytes over UART where blindly drained and pushed to
ring_buf. This approach is okay for UART devices without configured HW
flow control, as it basically decouples data processing from ISR handler
and gives more time before data overrun. However when HW flow control
is enabled, such behavior somehow suppresses UART flow control
advantage, because data can overrun when pushing to ring_buf.
Allow drivers utilizing modem_context framework to pass information
about whether HW flow control is enabled or not. If it is enabled, then
read data from UART FIFO to the point when RX ring_buf is totally filled
and follow such situation by disabling RX interrupt. Incoming data will
be paused on HW level, so there is lots of time for RX thread to process
ring_buf content. Reenable RX interrupts after all data in ring_buf is
processed, so that number of context switches is kept at minimum level.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This API allows to drop use of preallocated isr_buf. Most importantly as
a result RAM usage is reduced for each driver utilizing modem_context
framework. Additionally there is less copying done in ISR context, as
data is direcly read from UART FIFO to ring_buf.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Restore the flash write proectction after disabling it for
flash write and erase shell commands.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
Flash drivers are free to re-enable write protection after a write or
erase operation is complete. Therefore write protection has to be
disabled before any such operation.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
The second argument of this foonction is a bool, so passing 0 and 1
is incorrect.
Coccinelle script:
@@
expression e;
@@
flash_write_protection_set(e,
(
- 0
+ false
|
- 1
+ true
)
)
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
1. clock: move the call for MSI hardware auto calibration enabling
before the control of MSI enable to ensure its execution in all
cases.
2. counter: add call for MSI hardware auto calibration enabling after
the LSE enabling and after possible backup domain reset that may
clear MSIPLLEN.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
Described in ES096 2.14.7,
F101X8/B, F102X8/B, and F103X8/B
might not be able to enter i2c master mode on power-up.
Force reset help to mitigate this issue.
Signed-off-by: Yiyu Zhu <smallzzy@outlook.com>
Replace all calls to the assert macro that comes from libc by calls to
__ASSERT_NO_MSG(). This is usefull as the former might be different
depending on the libc used and the later can be customized to reduce
flash footprint.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
This adapts the driver to changes in the LiteX CSR accessors API
introduced in the previous commit.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This change allows to use SSD1306 based displays to be used on the
SPI bus as well.
Adding SPI shield.
Tested on SSD1306 and SSD1309 based displays using I2C.
Tested on SSD1309 based display using SPI.
Signed-off-by: Marco Peter <marco@peter-net.ch>
This change removes the interleaving control
frames.
Additionally all I2C accesses are centralized in
one single function.
Signed-off-by: Marco Peter <marco@peter-net.ch>
This CL adds more comments for each macro functions used for device tree
file for better explanations. It also changes all hex values in soc.c to
lower case.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This CL contains the drivers of NPCX Host Sub-Modules that serve as an
interface between the Host and Core domains. For most of them, the Host
can configure these modules via eSPI(Peripheral Channel)/LPC by
accessing 'Configuration and Control register Set' which IO base address
is 0x4E as default. And the interrupts in core domain help handling any
events from host side.
In this commit, we introduced six host sub-modules. It includes:
1. Keyboard and Mouse Controller (KBC) interface.
2. Power Management (PM) channels.
3. Shared Memory mechanism (SHM).
4. Core Access to Host Modules (C2H).
5. Mobile System Wake-Up functions (MSWC).
6. Serial Port (Legacy UART)
The tasks in application layer such as 8042, ACPI and host command can
cooperation with this driver by connecting api or callback functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.
Becisdes introducing eSPI device in npcx7, this CL also includes:
1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Fixed build error in in eSPI socketpair test suite since wrong function
name for eSPI flash channel api.
This CL also fixed [-Werror=unused-function] warning by adding inline
attribute in case someone includes "espi_utils.h" and doesn't call
espi_manage_callback() function.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The power draw of this magnetometer is significant,
device power management is needed for our use-cases.
Signed-off-by: Emil Hammarstrom <emil.hammarstrom@assaabloy.com>
Change-Id: I71158e629e93b491c6d673aa81001b7a7099f654
On stm32f1 series, device pinctrl configuration could be modified
thanks to remapping capability.
Remapping allows to provide alternate pinctrl configuration to a
peripheral device and applies to all impacted pins.
So, specifically for stm32f1 series, apply remapping when required
before proceeding with pin configuration.
Additionally, because remapping is defined individually for each pin,
apply a function on pinctrl configuration to check remapping setting
coherency accorss pins.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Based on pinmux data encoded in dt bindings some stm32f1 post
processing is required to eventually fit into data structures
expected in gpio_stm32_configure function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provides tool set to be used by device drivers in order to be able
to configure device signals.
This does not involve the implementation of a dedicated pinctrl
driver. In this regard, this is equivalent to implementation used
for treatment of current pinmux.c files.
Since STM32F1 uses a different GPIO configuration scheme, its
support is exlcuded for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update stm32_pin_configure prototype to use more appropriate
unsigned arguments
Additionally, fix documentation for z_pinmux_stm32_set function
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Allow to reconfigure UART baudrate on ESP and on host MCU, so a
non-default baudrate can be used for communication. This option helps
for example to increase network bandwidth without touching ESP chip
firmware.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add Kconfig options to configure modem command handler buffer size and
count. This will allow to fine tune those based on UART baudrate, system
load and available memory.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add new Kconfig option to configure modem UART interface handler ring
buffer size. This will allow to lower ring buffer to save some resources
or increase it in case high network bandwidth is utilized (with high
UART baudrate).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Remove Adafruit/Seeed TFT hardcoded settings. Note that undocumented
ILI9340/1 settings have been removed (maybe Seeed is using another ILI
variant?).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Move pixel format setting (RGB565/RGB888) to DeviceTree. Add support for
changing pixel format at runtime.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Multiple enhancements towards better code readability and consistency:
- sorted headers
- define and reference magic constants
- adjust some names
- add U suffix to unsigned constants
- move hw reset to a function
- remove non-needed initialization code from seeed tft
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Adds imx rt support.
Allows n-number of can interfaces based on device-tree.
Adds a "common" irq name.
Added CAN bus pins and dts for 1060 and 1064 EVK.
Signed-off-by: Rick Talbott <rtalbott@fastmail.com>
This enables support for the confgure and config_get functions in
the UART API, allowing users to change baudrate, parity, stop bits,
data bits and flow control in runtime.
Signed-off-by: Jesper Derander <jesper.derander@endian.se>
Add additional pinmux definitions for I2C1 and I2C2 that are used
on the stm32f030 series SoCs. Additionally, correct the PF0 and PF1 I2C
functions, which were swapped.
Signed-off-by: Brian Kubisiak <brian@kubisiak.com>
Reset rx byte counters when hw timer/counter is disabled.
Fixes issue where disabling and re-enabling async uart rx can produce
"UART_RX_RDY" events with invalid data when power management is used.
Signed-off-by: Audun Korneliussen <audun.korneliussen@nordicsemi.no>
The condition used to detect presence of optional devicetree
properties that specify read and write opcodes was inadvertently
changed to something that will never be true. Update the check and
the property extraction to restore the original behavior.
Fixes#28635.
Signed-off-by: Stephan Walter <stephan@walter.name>
The ce0cc3a7 commit (lsm6dsl: make the driver multi-instance) changes
all bus API signature, which now requires a "const struct device *dev"
and not a "struct lsm6dsl_data *data". By mistake the shub part was
left unchanged. Fix: #28565
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Algorithm for waiting for clock stabilization was failing in case when
it was waiting for clock availablity and clock was already available
before function was called. That is because nrfx_clock_is_running
was returning false because XTAL was already started but not yet
running.
Added a check for current LF source, if XTAL is picked that indicates
that RC is already running because of two stage startup procedure.
Added documentation of lfclk_spinwait with explanation of two stage
approach.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Initialize device pointer in driver's context.
It was not done quite right in commit a1708cf2f2
("drivers: ethernet: Fix device instance const qualifier loss"),
and then completely removed in commit 113d9274ea
("drivers: ethernet: remove stray expression")'
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This commit fixes the following issue:
When using slip without TAP, i.e. CONFIG_SLIP_TAP=n (default), while
another ethernet interface is enabled and sets CONFIG_NET_L2_ETHERNET=y.
This causes ethernet_init() to be wrongly called with struct dummy_api
instead of struct ethernet_api.
ethernet_init() expects struct ethernet_api (by cast), so we end up
with the get_capabilities field pointing to garbage!
Actually, as we are using the dummy api, we don't need to call
ethernet_init() at all.
Sole dependency on CONFIG_NET_L2_ETHERNET is wrong because it
can be enabled by another interface.
Signed-off-by: David Komel <a8961713@gmail.com>
Named choice is needed in order to be able to extend it
in other modules.
Closes: #28559
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
* Add missing the PINMUX macros for UART5 pins.
* Correct a typo in STM32F1_PINMUX_FUNC_PC5_ADC12_IN15; the macro
used PC4 instead of PC5 for ADC12_IN15.
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
HAS_DTS_I2C is now selected by I2C and
always used as I2C && HAS_DTS_I2C.
It could then be purely removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The correct return value is -ENOBUFS if we run out of network
buffers when sending the packets.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add BT_QUIRK_NO_AUTO_DLE quirk option for HCI rpmsg driver
when the Zephyr open source BLE controller is used.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix the error recovery mechanism that makes use of a temp variable
to avoid coverity issue without breaking error recovery.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Function spi_context_longest_current_buf() has been introduced in
commit ddef35c1da for the purpose of
getting the longest possible (potentially partial) SPI transfer
for which all currently active directions have a continuous buffer.
Such transfer can be done with taking advantage of a DMA that cannot
use scattered buffers (and this is the case for nRF SPI drivers with
which this function has been introduced).
Unfortunately, because of its inadequate name, later on this function
has been incorrectly used in other SPI drivers for getting the longer
of TX/RX buffers. And commit afc480f12b
recently "fixed" the implementation of this function, assumably to
adjust it to those incorrect uses, but this way it has also broken
the nRF SPI drivers.
Instead of restoring the original implementation of the function in
question, this commit adds a new one with functionality equivalent
to that original but with a hopefully less misleading name, and this
function is used in the nRF SPI drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Isochronous transactions do not support handshake phase
so in particular the ISO endpoint cannot be STALLed.
Isochronous transactions do no support data toggle sequencing
and should only send DATA0 PID.
Taking into consideration those requirements do not try to
clear dtoggle or STALL an ISO Endpoint in nRF USBD driver.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
The pull request #26269
drivers: SPI: Adds CS flags from devicetree
missed out on the APA102 led_strip driver, most likely due to the driver
not utilising the chip select signal until #25310
drivers: led_strip: Add support for external SPI CS on APA102 LED strips
Signed-off-by: Roman Vaughan <nzsmartie@gmail.com>
Enable by default the use of RAM buffers in the spi_nrfx_spim.c
driver for copying TX data located in flash (as SPIM peripherals
cannot transfer directly form flash). Without this patch, users can
get confused, especially when SPI transaction is used by an upper
level driver which does not check all error codes.
For size of the buffer, use the value used so far in the reel_board
default configuration and in the SPI loopback test, i.e. 8 bytes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Not possible to use device_get_binding() because we are
currently initializing DMA_1 device, so it is not ready and
device_get_binding() will fail.
Directly use string compare is more efficient.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Pins used for external LF clock source must be configured as
used by peripheral to allow using LFXO on network side.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Reimplement getaddrinfo to call SlNetUtil_getAddrInfo from the TI HAL
for a more robust implementation that supports both client and server
modes, and performs better error-checking.
Fixes#11890
Signed-off-by: Vincent Wan <vwan@ti.com>
Fixes#28275 by adding bluetooth HCI spi driver priority lower
(75 instead of 50) than SPI (70) to avoid device_get_binding
to return NULL because the device was not initialized.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Enabled going to idle when waiting for low frequency clock.
Added 2 stages of starting LF clock when XTAL is used. First
stage is starting RC and then when it is ready XTAL is started.
It is done to get event/interrupt when RC is ready which means
that LF clock is available (but not stable).
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added configuration for approach to starting system clock source.
There are 3 options: no wait, wait untill available, wait until
stable.
Added support for those modes in clock control driver which handles
low frequency source clock.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The driver is able to write with 32-bits word alignment of size
and offset, apart form sub-word writes for which it can write
part of word to aligned offset (which is a hack).
fixes#26729
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Use setting from devicetree to drive the default setting for
CORTEX_M_SYSTICK. We update the dts files to default systick to be
enabled since the major of cortex-m platforms utilize it by default
(except on Nordic SoCs, TI CC13x2/CC26x2 and MEC1501 in which we
default to disabled).
Fixes#25299
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rename wdog_cmsdk_apb_enable to wdog_cmsdk_apb_setup,
this API is supposed to be called during driver probe based on
CONFIG_WDOG_CMSDK_APB_START_AT_BOOT (enabled by default).
Fixes: 03c7d9bd49 ("drivers: wdog: Update CMSDK Wdog driver")
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
"unused value" issue reported by Coverity (CID: 214211).
This is actually a true bug as reported error is erased
and not taken into account.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The value from socket() was directly assigned to offload_context, which
was treated as a unsigned integer when compared. This prevented the
following if statement from catching any errors, leading to random RAM
access. This is fixed by using an intermediate with the same type as the
return value, which is then assigned to offload_context after error
checking.
Signed-off-by: Abram Early <abram.early@gmail.com>
An unnecessary expression that doesn't compile was inadvertently
introduced in the device constification PR. Remove it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
When getting a hfxo manager for USB sybsystem incorrect symbol
was checked. This lead to always enabling HFCLK, even for nRF5340
which needs HFCLK192M.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.
For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.
Furthermore, much of the assembly code used had issues.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
MCUX EHCI USB device controller supports a specific
number of bidirectional endpoints. Bidirectional means
that an endpoint object is represented to the outside
as an OUT and an IN Eindpoint with its own buffers
and control structures.
ep_abs_idx index refers to the corresponding control
structure, for example:
EP addr | ep_idx | ep_abs_idx
-------------------------------
0x00 | 0x00 | 0x00
0x80 | 0x00 | 0x01
0x01 | 0x01 | 0x02
0x81 | 0x01 | 0x03
.... | .... | ....
The NUM_OF_EP_MAX (and number of s_ep_ctrl) should be double
of num_bidir_endpoints. There is also no need to reserve
endpoint addresses for this controller type.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This adds supports for ISO packets so then can be transmitted and
received with userchan driver.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This adds supports for ISO packets so then can be transmitted and
received with H5 driver.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This adds supports for ISO packets so then can be transmitted and
received with H4 driver.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
The host command peripheral device API abstracts how an embedded
controller sends and receives data from a host on a bus. Each bus like
eSPI, SPI, or I2C would implement their own host command peripheral
device. Each hardware device would then handle the necessary hardware
access to send and receive data over that bus.
The chosen host command peripheral device will be used by the host
command handler framework to send and receive host data correctly.
Signed-off-by: Jett Rink <jettrink@google.com>
When offloading only ZSOCK_POLLIN and DNS_EAI_MEMORY are available, so
use those instead of the standard ones.
Fixes#28069.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The dmamux requires HEAP size definition, so that k_malloc
is valid. The HEAP size config is defined in the common for
any stm32 soc instead of specific to dma Kconfig
Signed-off-by: Francois Ramu <francois.ramu@st.com>
VCO input frequency can be checked and set during compile time.
It unfortunately does not work for output frequency because macros in
HAL are defined together with uint32_t type.
This also fixes wrong check in case of HSI used as PLL source.
Signed-off-by: Jan Pohanka <xhpohanka@gmail.com>
timeslice terminology were used in connection with synchronization
using ll BLE ticker.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Rework ticker synchronization using newly introduced
radio synchronization API.
In kconfig synchronization using ll ticker become choice
option.
If CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE is enabled the erase
timing is changed so intervals become similar to slots duration.
Previously interval was always ~90 ms, which looks like it was kept
so disproportional by oversight while the partial erase was
introduced.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Extract synchronization procedures using LL BLE controller
ticker to newly added synchronization API.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Introduced API which allows to decouple radio synchronization
mechanism from NVMC driver.
New API will allows to replace synchronization mechanism if required.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Add console over Inter Processor Mailboxes (IPM).
This is useful for AMP processors like ADSP found on up_squared board.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The SX126x supports using DIO2 to control an TX switch, but only if
the switch can be operated using a single control signal. Add support
for RF switches that are wired to a GPIO instead of the radio chip
itself. This makes it possible to use RF switches that require two
control signals (one for the RX port and one for the TX port) by
wiring them to two GPIOs on the MCU.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The stm32_dma_disable_stream first checked if the stream was
disabled and if so returned OK. If it wasn't disabled it
tried to disable it and returned -EAGAIN.
The function is used in loops that try to disable the stream
by calling this function and if it fails wait for 1ms and
retry.
Becuase this function the first time (if the stream wasn't
disabled already) fails there is always a 1 ms delay. For
the SPI driver, that has a RX and TX stream, this means
a 2ms delay between the last data and CS going high.
By first trying to disable the stream and than checking
if it succeded most of the time the first call disables
the stream and the 1ms delay isn't needed.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
- Fix GPIO CS timing when using DMA. When using GPIO CS the
CS select was enabled after the DMA started the transfer,
resulting in the first few bits being transfered while
CS was still disabled.
- Fix TX or RX only DMA transfers. When only a RX or only
a TX transfer was requested the DMA never finished.
For the RX only cause the size on the transfer was
calculated by taking the TX buffer length (0), this
caused problems.
For the TX only transfer the RX buffer was set to NULL,
this caused the DMA to acctually writing data to the
adress 0x00000000. By using the dummy destination buffer
it now only writes to valid memory.
- Add semaphore to signal that DMA is ready, instead of
just busy waiting.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Replace hardcoded sector size value in sample with sector-size
property added in dts binding file
Signed-off-by: Marin Jurjevic <marin.jurjevic@hotmail.com>
When building flash shell sample we get:
flash_stm32wbx.c:23:10: fatal error: shci.h: No such file or directory
23 | #include "shci.h"
Fix this by adding ifdef protection around inclusion of shci.h.
Fixes#28036
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Schedule read work every 100ms for better latency.
Reschedule read work directly in case of a packet is received
(fast dequeue).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Fix compile errors of the form:
video_mcux_csi.c: In function 'video_mcux_csi_init_0':
video_mcux_csi.c:422:40: error: 'const struct device' has no member
named 'driver_data'
422 | struct video_mcux_csi_data *data = dev->driver_data;
| ^~
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In the I2S CAVS driver, the DMA user data simply points to
the device struct. However, after the change to const-ify device
struct, this causes warnings from compiler because the user_data
assignment would discard the const qualifier. The user_data is
being used to point back to the device struct, and the DMA
callbacks are already casting the user data argument into
a const device struct. So it's a simple fix by casting
the device pointer to void pointer at device creation.
Fixes#28016
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fixed 'line length exceeds 80 columns' warning by shortening the clock
controller device name from NPCX_CLOCK_CONTROL_NAME to
NPCX_CLK_CTRL_NAME.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This is a follow-up to commit 701e9befe4.
The NRFX_POWER Kconfig option should be enabled together with USB_NRFX,
not with CLOCK_CONTROL_NRF, as the USB driver is the actual user of
the nrfx POWER driver.
This patch adds also missing initialization of the nrfx POWER driver
and refactors a bit the usb_init() function introduced in the commit
mentioned above, so that it does not redefine the DT_DRV_COMPAT macro
and uses for conditional compilation the same Kconfig option that is
the dependency of NRFX_USBREG.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for `CONFIG_UART_ASYNC_API` to the uart_rtt driver.
As RTT provides no mechanism for knowing when new data has arrived,
the reception commands all return errors.
This fixes hard faults when asynchronous calls are made on the uart_rtt
driver, in addition to providing a small level of functionality.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Instantiate RTT UART instances from devicetree nodes instead of from
Kconfig symbols. While RTT is implemented using software, not hardware,
it is emulating a hardware device, and thus should be configured through
devicetree. This allows the simulated UART device to be selected via
devicetree aliases and chosen nodes.
The following devicetree snippet will instantiate RTT channels 0 and 2
as UART devices.
```
/ {
rtt0: rtt_terminal {
compatible = "segger,rtt-uart";
label = "rtt_terminal";
status = "okay";
};
rtt2: rtt_secondary {
compatible = "segger,rtt-uart";
label = "rtt_app_specific";
status = "okay";
};
};
```
Fixes the RTT portion of #10621.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The general DMA driver doesn't use kmalloc anymore so it doesn't
need a memory pool. The DMAMUX_SMT32 driver still uses kmalloc,
so move the HEAP_MEM_POOL_SIZE config under DMAMUX_STM32.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use dma_stm32_disable_stream instead of stm32_dma_disable_stream
to check if the disabling of the stream really worked and if
not return an error.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Convert global conversion tables for id-to-stream and slot-to-channel
to functions that use local const static conversion tables.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
- Remove the need for kmalloc
- On hardware that supports it use 1 IRQ handler per stream to
determine the stream ID, so the ISR does not have to loop
over all ID's to see which one is active. On hardware (like
STM32L0 and STM32F0) where up to 7 streams share 3 IRQ's use
the loop to check which stream is active.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use volatile for flag shared between normal code and ISR to
prevent the compiler from possibly optimizing it away.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Reduced the size of tx_buffer_def array to 1 to save
on function stack memory. Here only 1 buffer is
enough to call the transmit function.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Modify the ethernet driver to use TX complete interrupts.
Adds HAL ethernet TX complete callback and locking semaphore.
Due to changing behavior/content of the TX DMA descriptors
on STM32H7 series, based on the state of the IP,
it is more reliable to wait for the TX complete interrupt to check
for DMA end of transmission event. This avoids polling the
DMA_DESC_OWN bit in the descriptors.
Improves reliability and performance of the ethernet peripheral.
Tested on CoapServer sample, Dumb HTTP server, telnet sample.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Assuming we stay on default Power Scale 1,
overdrive is required when System Core Clock frequency is higher
than 180MHz.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Stack overflows where seen in heavy logging conditions since printk
modifications that increased "slightly" RAM consumption
(973487fdad).
Increase RX Thread stack size to avoid these overflows.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When this code was moved from a standalone sample to an optional shell
feature the documentation on how this works and caveats was lost. Put
it back so it can be referenced in issue explanations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The conversion last year mixed up uart-pipe with uart-mcumgr. Revert
to the pre-conversion relationship.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The default priority for I2C controller initialization is POST_KERNEL
60 (SPI 70), while the default priority for device configuration is
POST_KERNEL 50. Thus the EEPROM is being initialized before its
controller. While for this driver that wouldn't be an issue recent
changes mean the device lookup returns NULL before the device is
initialized.
Change the AT2X priority to 75 so it falls between the I2C and SPI
drivers and the default ethernet priority (80), since some ethernet
controllers may store the MAC address in EEPROM.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Implement algorithm described in STM32 AN5289
with implementation proposed in STM32 Cube Application:
BLE_RfWithFlash
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Due to HSEM implementation #24862, USB CLK48 lock implementation
#25850 should be reworked.
And by the way, implement the same in entropy which is using the
same clock.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
These are all the case that coccinelle cannot find as they are inside
macro declarations.
Fixed via:
git grep -rlz -E "\(struct device \*" |
xargs -0 sed -i 's/(struct device/(const struct device/g'
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It is necessary to wrap the device pointer into data.
Which was done already on most of them when global trigger is enabled.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SDL one needs to wrap device pointer into its data and xec do not need
to pass any argument to its thread.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Passing the device's data was sufficient as only the data is being used
by the thread.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Passing driver's data to k_thread is sufficient for mcux.
On enc424j600, however, the device pointer is needed and thus is wrapped
into its data. But there seems to be a possible optimisation: all local
spi related function in fact only needs the device's data (context) and
so changing all spi related function to take the context would remove
the need to wrap the device pointer into its data.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In all of these drivers, passing the device's data was sufficient as
only the data is being used by thread.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Passing the device's data is sufficient to be used by the HAL callback
function.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Some needed to wrap the device pointer into device's data, where others
needed only device's data to be passed to HAL callback function.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Passing the device's config was necessary, and wrapping device inside
it.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It is necessary to wrap the device pointer into data, and pass the data
to the HAL callback function.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In all of these drivers, passing the device's data was sufficient as
only the data is being used by the HAL callback function then.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is a working code, but it's harder to read. And for some reason
makes some semantic patches of coccinelle running forever.
So refactoring it.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Let's set the api at built time, or this will create a bug once device
instance pointers become constant.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add an emulation controller which routes I2C traffic to attached
emulators depending on the I2C address selected. This allows drivers
for I2C peripherals to be tested on systems that don't have that
peripheral attached, with the emulator handling the I2C traffic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Reset the i2c device when read or write return with an error
code. This is to bring the i2c hardware back into a known
state after a hardware error (like EMC spikes) caused
the device to lock up.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
A build assert in dummy.c lists the following requirement:
[...] receive thread priority shall be higher than the Bluetooth
Host's Tx and the Controller's receive thread priority.
This is required in order to dispatch Number of Completed Packets
event before any new data arrives on a connection to the Host threads.
The drivers uses a priority that is equal to the Host TX thread,
and since they don't use the CONFIG define that is only available
to the controller then this BUILD_ASSERT will not catch the
requirement.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Replace npcx register base address type, uint32_t, with uintptr_t.
It is easier to know what type of base address and for linear
addresses treated as integral values.
This CL also modified IS_BIT_SET() macro function to fit MISRA code
guidelines.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This CL configures the UART wake-up event triggered from a falling edge
(START condition) on CR_SIN pin. It also includes:
1. Introduce wui_maps property in yaml file to present relationship
between Wake-Up Input (WUI) and UART device.
2. Implement wake-up mechanism by MIWU api functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add gpio support for Nuvoton NPCX series. This CL includes:
1. Add GPIO device tree declarations.
2. Introduce wui_maps property in yaml file to present relationship
between Wake-Up
Input (WUI) and 8 IOs belong to the device.
3. Zephyr GPIO api implementation.
4. GPIO callback functions implementation with MIWU api functions.
5. Overlay file for gpio basic tests
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The device Multi-Input Wake-Up Unit (MIWU) supports the embedded
controller (EC) to exit 'Sleep' or 'Deep Sleep' power state which allows
chip has better power consumption. Also, it provides signal conditioning
such as 'Level' and 'Edge' trigger type and grouping of external
interrupt sources of NVIC. The NPCX series has three identical MIWU
modules: MIWU0, MIWU1, MIWU2. Together, they support a total of over 140
internal and/or external wake-up sources.
In this CL, we use device tree files to present the relationship bewteen
MIWU and the other devices in different npcx series. For npcx7 series,
it include:
1. npcx7-miwus-int-map.dtsi: it presents relationship between MIWU group
and NVIC interrupt in npcx7. Please notice it isn't 1-to-1 mapping.
2. npcx7-miwus-wui-map.dtsi: it presents relationship between input of
MIWU and its source device such as gpio, timer, eSPI VWs and so on.
This CL also includes:
1. Add MIWU device tree declarations.
2. MIWU api function declarations and implementation to configure signal
conditions and callback function mechanism. They can be be classified
into two types. One is for GPIO which connects original gpio callback
implemetation and the other is for generic devices such as timer,
eSPI, and so on.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The driver must be able to read from this pin as well as write to it.
If the driver doesn't support bidirectional configuration then fall
back to the legacy mode.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Renamed nrf clock control driver file since it does no long control
POWER peripheral.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Removed all nrf_power/USB related stuff from clock control
driver to USB driver.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Update the driver implementation to use nrfx_clock and nrfx_power
drivers. Update also revisions of the hal_nordic and nrf_hw_models
modules, so that it is actually possible to use those drivers.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The driver utilizes the CONFIG_NET_OFFLOAD setting to avoid the
normal handling of IP packets, and instead uses a socket-like
UART interface to handle incoming and outgoing data via AT commands.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Add Kconfig switch to disable automatic eSPI slave boot acknowledge.
This allows to perform lenghty operations before continue any eSPI
handshake with eSPI master.
Required for eSPI SAF boot configuration.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This patch introduces the "led" shell command. This allows to run the
LED API functions (and to test the LED drivers) from the Zephyr shell.
The following subcommands are supported:
- on
- off
- get_info
- set_brightness
- set_color
- set_channel
- write_channels
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
This patch adds support for the Texas Instruments LP5030 and LP5036
I2C LED controllers. They are respectively providing up to 30 and 36
channels (i.e. 10 or 12 RGB LEDs).
In addition to the channel/color registers this LED controller provides
a per-LED brigthness register. This driver implements both LED-based and
channel-based API methods:
- led_on
- led_off
- led_get_info
- led_set_brightness
- led_set_color
- led_set_channel
- led_write_channels
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some LED controllers are connected to a large number of LEDs (i.e.
array/strip of LEDs). A user may need to set several LEDs at the same
time. The LED oriented syscalls are not adapted to this task. Indeed a
call per LED is needed to configure a group of LEDs. To that end, this
patch adds the led_set_channel and led_write_channels syscalls to the
LED API. They offer direct access to the raw channels. They respectively
allow to set a single channel and to write several contiguous channels
(and therefore to configure a group of LEDs).
Moreover the addition of the led_write_channels syscall also aims at
closing the gap with the LED strip API.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
The led_set_color syscall adds support for multicolor (i.e.
multi-channel) LEDs to the LED API. It allows a user to set all the
colors/channels of a LED at once by passing a color array. Note that
this array must provide an entry per color/channel and must also be
ordered following the color mapping of the LED. This color mapping can
be either retrieved from the "color-mapping" DT property or from the LED
driver itself (by using the led_get_info syscall).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
When supported by the driver the led_get_info syscall allows a user
to retrieve the following information about each LED available:
- The LED label.
- The number of colors/channels.
- And for a multicolor LED a pointer to a channel-color mapping.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Remove non necessary eswifi lock/unlock in read procedure (eswifi
lock support nesting).
Return NULL packet in case socket is closed by remote (tested with
net shell and net recv).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
In case optional timings property has been defined in DT, let's use it
and look for a matching peripheral clock and i2c bus clock so that
timing value is used instead of using runtime algorithm.
If matching the current configuration, the value will be set directly to
the I2C_TIMINGR register through the LL API.
This property is only valid for I2C V2 peripheral, so the timing config
structure member is only added in case of CONFIG_I2C_STM32_V2. Also the
initialization of the member is done conditionnaly, only in case
it is defined in DT, otherwise timings table will be empty.
Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
The spi_flash_w25qxxdv driver has been superseded by the generic
spi_nor driver for over a year. The only non-refactoring change to
the W25Q driver in the last 18 months was done to support a backport
to 1.14.
All devices supported by spi_flash_w25qxxdv driver are expected to be
supported by the spi_nor driver, using the standard `jedec,spi-nor`
devicetree compatible. No in-tree devicetree files make use of this
driver.
Remove the confusion about which driver to select by removing the
unmaintained redundant driver.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
RCC_HSI48_SUPPORT is not always defined even if SOC support HSI48.
Ex: STM32H7 family which support HSI48 but doesn't have
switch RCC_HSI48_SUPPORT.
This switch is usefull when in the same STM32 family some soc have
HSI487 and some other soc not.
So instead, use CMSIS register defines (which depends on family)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Marking as unused (ARG_UNUSED) the parameter device in the
initialization function z_clock_driver_init when it is not used.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This removes a cast when getting the isr eth address from the isr table.
Signed-off-by: Pawel Sagan <psagan@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add SPI driver for the Xilinx AXI Quad SPI IP. Despite the name, this IP
block supports both single, dual, and quad line widths.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Fix incorrect register update that results in unintentionally
in default eSPI frequency (20MHz) whenver IO mode is changed.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
-Wimplicit-fallthrough=2 requires a fallthrough comment or a compiler
to tells gcc that this happens intentionally.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
As a general rule devicetree properties should correspond to hardware
description or configuration. In cases where a Zephyr driver receives
instance-specific configuration data from a devicetree property that
property should be marked as being Zephyr-specific. Rename
concat-buf-size to zephyr,concat-buf-size to follow this guideline.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The Nordic TWIM peripheral generates a start condition for each bus
transaction. Devices such as the SSD1306 display and some NXP sensors
can only tolerate the presence of a start condition and device address
after a stop condition. Those devices will not operate correctly when
these signals are observed while the bus is already active. This
motivated the addition of a RAM buffer into which message fragments
could be collected so TWIM can transmit them without injecting
unnecessary start conditions.
However many I2C devices interpret these signals as a repeated start
and ignore them and so function properly without a buffer
concatenating the message fragments.
There is no default for the concat-buf-size property, and the previous
strict requirement for one when performing scatter/gather I/O
transactions broke working drivers for devices that tolerate the
repeated starts. Allow those drivers to work by respecting the
property description and attempting to concatenate messages only if a
buffer in which to place them has been provided.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The condition of being either the last message or not concatenable to
the next message is the inverse of the condition of committing to
concatenate the next message. The latter is arguably easier to
understand. Reverse the logic, document the conditions, and simplify
the early continue.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Do the normal post-transfer shutdown and sync management when a
transaction is rejected due to insufficient buffer size rather than
returning with the peripheral left enabled and the transfer lock held.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The original checked only the current message length against the
buffer size, not accounting for space already used.
Also improve the diagnostic to indicate how much space is required vs
given.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The 100 ms hard-coded timeout is too small to complete the transfer of
1025 bytes of SSD1306 data at 100 kHz. Increase it to 500 ms to match
STM32 policy and fix this problem.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Allow the disabling of reseting of the backup domain. This gives
the possibility to keep the content of the 20 backup registers
and use them to store information that survives a reboot.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The device may be prematurely configured before it is ready during
reset without first checking. After the driver writes to the registers
and normal mode gets selected, CANSTAT is read back to ensure the
device is now configured in normal mode (0x00). However, an
unresponsive device will be read as 0x00, the driver then assumes it is
configured correctly.
The MCP2515 will reset into configuration mode (0x04) to allow bit
timings to be configured. Adding a check for this mode prevents the
device from being misconfigured.
Signed-off-by: Roman Vaughan <nzsmartie@gmail.com>
ringbuf claim API returns pointer to contiguous area. In cases when data
in ringbuf wraps the end of internal buffer, then single call to claim
data is not enough to get all data - there is remaining part on the
beginning of internal buffer. Those remaining bytes will need to wait
for next ISR handler to trigger workqueue. Theoretically this means that
data on the beginning of ringbuf can wait there forever.
Consume data from ringbuf in a loop, stopping only when claiming results
in empty buffer. This will make sure that there is no stale data in the
ringbuf.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
The magnetometer vector-magnitude function will generate an interrupt
when magnitude is greater than specified threshold value. The user
may program the threshold value to establish the conditions needed
to detect a magnetic vector-magnitude change event. Depending on the
values chosen for the reference values, this function may be
configured to detect a magnetic field magnitude that is above
a preset threshold (with reference values = 0), or a change in magnitude
between two magnetic vectors greater than the preset threshold
(with reference values non-zero).
Default configuration of M_VECM_CFG register (address 0x69) is 0x4e.
Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
Enable input buffer for both input and output pins.
The buffer must be enabled when the pin is used as
an input. Enabling the buffer enables reading back
the GPIO value when configured as output
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Sleep minimum time in RX when gPTP is enabled. Typically we
receive constant stream of gPTP protocol data so no need to
wait very long in that case and cause timeouts.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Make sure that native_posix Ethernet driver is claiming to support
VLAN when the VLAN functionality is enabled.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add gPTP multiport support to native_posix Ethernet driver.
This means that the driver is able to create more than one
network interface and enable gPTP to each of them. This requires
that net-tools is updated as it contains configuration file
for network interfaces in host side.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Remove the macros CLOCK_ID_PRFX2 and CLOCK_ID_PRFX and replace them with
_CONCAT from common.h.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Added support for hardware flow control in EFM32 UART driver.
Signed-off-by: Timo Dammes <timo.dammes@lemonbeat.com>
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Variable "sd" is no longer referenced after refactoring in 2ed6b6a8ed.
It caused warning-as-error when building using sanitycheck, e.g. in CI.
This is 2nd fixed of the above refactor, after eb9a18432.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
PR #27485 introduced new implementations for close() that do not build
correctly. This commit fixes the problem by re-implementing them.
Fixes#27587
Signed-off-by: Vincent Wan <vwan@ti.com>
This adds an option to query the modem for the SIM's IMSI and ICCID
numbers, just like the modem's IMEI is queried today. This requires
the SIM to be present, which might not be the case for all
applications, so it can be disabled.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Short explanation of remote wake up:
The device has a possibility to wake up the HOST by sending
the wake up request. The request must be previously
explicitly enabled by the HOST just before the SUSPEND.
The HOST enables the remote wake up functionality by sending
SET_FEATURE request with remote wake up flag set to 1.
This ususally happens just before the device is suspended.
About this PR:
When the device decides to wake up the HOST it sends proper request.
Nordic USB HW is creating an event when the request has been sent.
The Zephyr USB device stack must proerly react to this event and
change the state of the device from SUSPENDED. For example if the
device was previously in CONFIGURED state it will remain CONFIGURED.
For state changes refer to Chapter 9.1.1 form USB 2.0 specification.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Expose the internal JESD216 function used to read data from the SFDP
region, and another function to read the JEDEC ID.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Some flash drivers are capable of issuing a JESD216 READ_SFDP command
to read serial flash discoverable parameters. Allow applications and
utilities access to API that reads the JEDEC ID from those devices.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Some flash drivers are capable of issuing a JESD216 READ_SFDP command
to read serial flash discoverable parameters. Allow applications and
utilities access to that capability where it's supported.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit reworks the SPI NOR driver to be more flexible in how
flash device configuration is obtained. Three alternatives are
supported:
* MINIMAL takes only the flash size from devicetree. The erase sizes
are hard-coded to the traditionally supported instructures.
* DEVICETREE requires that the data from the device's JESD216 Basic
Flash Parameters table be provided through devicetree. This
supports multiple page sizes and erase configurations, and lays a
foundation for significant enhancements in the future including
4-byte address, sleeping while waiting for operation completion, and
other features that are described by JESD216 parameters.
* RUNTIME requires nothing from the devicetree node, instead reading
the Basic Flash Parameters from the device at runtime. It extends
DEVICETREE by allowing the same firmware to run on boards with
different flash chips.
For MINIMAL and DEVICETREE the JEDEC ID from the devicetree node is
checked against the value read at runtime to confirm that the device
configuration is accurate.
The default SFDP source is MINIMAL.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Use the new SFDP infrastructure to read the supported erase type sizes
and commands from the Basic Flash Parameters block. This removes the
need for explicit reference to most block sizes from this driver.
We're also seeing devices where the page size is not 256 bytes.
Accommodate them.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The spi_nor flash interface was designed for flash devices that use a
standard SPI interface to devices that are compatible with the Micron
M25P80 serial flash, identified in Linux as compatible jedec,spi-nor.
The JEDEC Serial Flash Discoverable Parameters standard (JESD216) was
designed to allow these devices to be self-describing. As we are
increasingly being asked to support flash memories that do not use
"standard" erase sizes or commands we need data structures and helper
functions to extract information about a flash interface at runtime.
For some of these devices the commands hard-coded in the current
implementation are simply wrong.
Define generic structures that support the SFDP hierarchy and the core
Basic Flash Parameters table. The description will also support
SPI-NAND and xSPI devices that conform to the JESD216 standards.
Add bitfield values and helper functions to extract some information
that drivers might need from JESD216 fields. At this time only
information that is likely to be used is extracted; more may be added
in the future.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The one provided in the spi_nor.h header is inappropriate for this
device, which doesn't support be32k. Also that definition is moving
into the spi_nor implementation file.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add IUART driver based on MCUX SDK. This driver is used to provide
serial console support on i.MX8M Mini SoC.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Do not route close() calls via ioctl() as that is error prone
and quite pointless. Instead create a callback for close() in
fdtable and use it directly.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
There is nothing wrong with instance numbers and they are
recommended for use whenever possible, but this is an API
design problem because it's not always possible to get nodes
by instance number; in some cases, drivers need to get node
identifiers from node labels, for example.
Change these APIs (which are not yet in any Zephyr release)
to take node IDs instead of instance IDs.
Fixes: #26984
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add pin controller support for Nuvoton NPCX series
Add pin-mux controller support for Nuvoton NPCX series.
This CL includes:
1. Add pin controller device tree declarations and introduce alt-cells
to select pads' functionality.
2. Add npcx7-alts-map.dtsi since the mapping between IO and controller
is irregular and vary in each chip series.
3. Add nuvoton,npcx-pinctrl-def.yaml and its declarations to change all
pads' functionality to GPIO by default.
4. Pinmux controller driver implementation.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add clock controller support for Nuvoton NPCX series. This CL includes:
1. Add clock controller device tree declarations.
2. Introduce clock-cells in yaml file clock tree to get module's source
clock and turn off/on the its clock
3. Clock controller driver implementation.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
When uart_configure support was added uart_config_get was not
implemented. Move the 'struct uart_config' to uart_mcux_data lets us
save the uart_config settings and easily return it in
uart_mcux_config_get.
Fixes: #27420
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch removes unused Kconfig option from console
subsystem. If application wants to wait until the console
port is connected, enabled and ready to receive data
it should use uart_line_ctrl_get() API function and
check for DTR flag.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
usb_enable() must be called once by the application.
The application may want to register usb_dc_status_callback
and trace usb status codes (usb_dc_status_code).
After this patch all pre APPLICATION messages will be dropped
as USB console device is enabled in the application.
Application waits for console device until its ready by checking DTR
flag - uart_line_ctrl_get(). This function could be dropped but then
some log messages that were generated before USB device is ready
could also be dropped.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This device isn't an actual hardware driver: it's a virtual EEPROM
that stores data in an instance-specific RAM buffer, with the data
exposed on an I2C bus as a I2C follower (slave) device that can be
controlled by another device acting as a leader (master) on that same
bus.
As such it's a reasonable example of how to write an I2C follower
driver, but it's not clear that it has a real use in applications. A
Zephyr application that needs to emulate an EEPROM in a real-world
system would be unlikely to provide its data from a RAM buffer.
The sole in-tree reference is in the i2c_slave_api test, so move the
driver implementation into that test.
The Kconfig and hierarchy are being left in place until it is more
clear how this functionality should be selectable within Zephyr. The
I2C_SLAVE symbol has been converted from menuconfig to config to
eliminate a Kconfig style diagnostic.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
When, due to EMC, a spike happens on the SDA line the hardware hangs
and will not function anymore until the unit is reset.
By adding a timeout to the msg_read and msg_write function we can
detect that something went wrong, and when that happens reset
the I2C bus.
The reset will also reset all configuration, so before reseting
store all important registers and after reseting restore
those settings.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Sometimes the stop bit is still set when starting the next transaction.
When that happens the hardware will generate a start directly followed
by a stop. This will not be detected by the driver and it will endlessly
wait for the next interrupt that will never come.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Add example how to use gnome-terminal when launching a new
terminal for attaching the UART.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The FT5336 driver has been improved and generalized so that multiple
Focaltech touch controllers can be supported using the same single
driver. According to specifications the following list of controller
variants should be supported: FT5x06, FT5606, FT5x16, FT6x06, Ft6x36,
FT5x06i, FT5336, FT3316, FT5436i, FT5336i and FT5x46.
Tested using ER-TFTM028-4 display module (FT6X06).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The rtc counter is also built for the stm32l1 series
from STMicroelectronics.
The EXTI line 17 is mapped on RTC alarm pin
Signed-off-by: Francois Ramu <francois.ramu@st.com>
uart_rx_enable might be called after reception is stopped by lack
of buffers with flow control enabled. In that case there is a couple
of bytes kept in the HW FIFO. When HW TIMER is used for byte counting,
it is using RXDRDY event to count bytes. RXDRDY event is generated when
byte is received in RXD. RXD is the head of HW FIFO. When DMA ends and
ENDRX event is generated, transmitter still transmits until RTS line
goes high and transmitter reacts to it and stops transmitting. First
byte received after ENDRX lands in RXD (and generates RXDRDY event),
next by goes to RXD+1 (does not generate RXRDY event).
RXDRDY event after ENDRX is counted by the TIMER. If TIMER is reset
before restarting RX this byte is lost in the calculation. Because of
that byte counters cannot be reset before enabling RX thus move to
initialization. It applies only to HW counting but to keep it consistent
resetting was removed for both modes.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Support for defining vendor specific OUI (Organizationally
Unique Identifier) was added.
Signed-off-by: Kamil Kasperczyk <kamil.kasperczyk@nordicsemi.no>
OT_RADIO_CAPS_SLEEP_TO_TX was added as a radio capability
for ieee802154 radio. Waiting on RX state before transmission
is alternative condition to OT_RADIO_CAPS_SLEEP_TO_TX support
as it was a result of OpenThread architecture and is actually
not needed in the Zephyr. Such change lets to start transmission
faster and lower SED device power consumption in active state
about 30%.
Signed-off-by: Kamil Kasperczyk <kamil.kasperczyk@nordicsemi.no>
unsigned byte value is initialized to -1 and so never satisifies
the while condition, leading to broken ipv4 parsing (dead code).
Fix this by making byte value signed.
Reported by coverity #27326.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The USART_IntGet() function seems to return masked interrupts in the
function uart_gecko_irq_tx_ready() where it should return only
non-masked interrupts. Using USART_IntGetEnabled() fixes this issue.
This issue was discovered when using the mcumgr UART backend in the
uart_mcumgr_isr() function.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The EFR32MG21 uses a different kind of GPIO routing for peripherals.
It is based on the GPIO registers and no longer peripherals' registers.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The EFR32MG21 uses a different kind of clock for watchdogs.
It requires an additional peripheral-id parameter in the dts to get the
proper clock as it is based on the watchdog's ID i.e., cmuClock_WDOG#.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The EFR32MG21 uses a different kind of GPIO routing for peripherals.
It is based on the GPIO registers and no longer peripherals' registers.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
Use the GPIO API from emlib instead of accessing the register directly:
The emlib API is doing the checks and uses the proper registers
depending on the SoC used.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
Add HSI divisor support for clock tree configuration.
Removed HSI calibration trimming to comply with
common STM32 implementation and use reset default
configuration instead.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Adds preprocessor clock feasibility check to avoid setting
too high clocks to SYSCLK,AHB,APBx buses.
Also checks if CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
matches with the desired clock configuration by
the M7 core.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Fixed wrong usage of assertions.
Assertions should check that the value is in range and
not out of range.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Fixes#27212 by setting the AHB/APBx dividers
prior to configuring the PLL as clock source.
Prevents going over the limits of APBx clocks when
choosing the PLL as system clock source for
high frequencies (close to 480MHz)
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Fix a regression that caused flashing on nRF51x Series to stall
the Bluetooth low energy controller and flashing under
BT_CTLR_LOW_LAT option.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
This commit adds support for setting fixed configuration, read
from device tree, for ENET ETH interface and PHY.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Some ICs - like DSA switches (e.g. ksz8794) - do not use SMI to setup
and configure PHY.
This change introduces a new Kconfig define - CONFIG_ETH_MCUX_NO_PHY_SMI
- to allow replacing SMI communication with SPI or I2C.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Using SPIM_FREQUENCY_FREQUENCY_M32 to check if the device has HS-SPI and
able to use higher SPI clock than 8MHz.
Signed-off-by: Jui-Chou Chung <jui-chou.chung@nordicsemi.no>
Now that the relevant APIs generalize properly for bindings without
flags, we can remove some special case checks from the tree.
I couldn't find any more, but I did this kind of quickly, so it's
possible I missed some.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
After changes made in ff089217cb, clock control release can now return
non-negative values on success.
Signed-off-by: Rihards Skuja <rihardssk@mikrotik.com>
Removed potential race condition between uart being disabled and
rx_buf_rsp call.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added detection of uart_rx_buf_rsp call which happend to late when
uart is already disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
PPP implementation uses ring_buffer API, but RING_BUFFER Kconfig option
was not selected so far. This resulted in linker errors about undefined
reference to `ring_buf_get_claim' and 'ring_buf_put'.
Add missing RING_BUFFER selection via Kconfig, so PPP driver is properly
built.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This set of functions seem to be there just because of historical
reasons, stemming from Kbuild. They are non-obvious and prone to errors,
so remove them in favor of the `_ifdef()` ones with an explicit
`CONFIG_` condition.
Script used:
git grep -l _if_kconfig | xargs sed -E -i
"s/_if_kconfig\(\s*(\w*)/_ifdef(CONFIG_\U\1\E \1/g"
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
When `CONFIG_UART_ASYNC_API` is enabled, cleanup any pending synchronous
receptions at initialization time. Pending receptions are present when
this driver is used with the default mcuboot application.
When `CONFIG_UART_ASYNC_API` is not enabled, RX is always enabled by
this driver. As mcuboot does not use the async API, and does not cleanup
the UART driver before jumping to the next application, that application
boots with RX still enabled. This results in a 500uA increase in current
consumption.
Fixes#26555
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
In order to be able to add more entries under 'subsys/mgmt', move the
current contents of it, which relate exclusively to MCUMgr, to its own
folder.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
There are possible buffer overflows when parsing the ip address and
SSID. Ensure that we never overwrite the ip and SSID buffers.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Of course IPM drivers now provide their device instance. There are 2
drivers using IPM callbacks as well, so they get the imp device instance
pointer now through the callback.
Fixes#26923
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It was already using uart_irq_callback_user_data_set below, now it also
uses uart_irq_callback_user_data_t as callback type, so let's normalize
the callbacks.
Fixes#26923
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This patch adds adds an EEPROM driver supporting the on-chip EEPROM
found on NXP LPC11U6X MCUs. Note that this driver is only a wrapper
relying entirely on the IAP (In-Application Programming) EEPROM
commands.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
This commit adds basic support for the clock controller used in
lpc11u6x MCUs.
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
This patch adds a pinmux driver allowing to configure the IOCON (I/O
control) registers found on the LPC11U6x MCUs.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Flexcomm's SPI SSEL (or CS) will be held until frame end.
FIFOWR[EOT] (kSPI_FrameAssert enum) is the register not set.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Per the nrf9160 datasheet, UARTE must be disabled prior to configuring
PSEL.TXD, PSEL.RXD, PSEL.CTS, and/or PSEL.RTS. This also ensures that
any prior running code, such as a bootloader, which leaves the UART
enabled will not prevent the Zephyr application from changing the
configuration.
Make a similar change also to the uart_nrf_uart.c driver for the
nRF5 series.
Fixes 27080
Signed-off-by: Pete Skeggs <peter.skeggs@nordicsemi.no>
Need to call PINT_Init to initialize the block
before using it. This fixes the issue seen on
RT600 with the button example
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
- Use common clock names to avoid build error.
- Use GPIO_PortInit() to do reset/clock initialization. Only clock
enable is not adequate for RT600.
- Update to support differences between IOCON and IOPCTL modules
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
There are multiple CID errors all based on the test of
'socket > ESWIFI_OFFLOAD_MAX_SOCKETS'. The test needs to
be '>=' in all cases.
Fixes: #27138Fixes: #27139Fixes: #27140Fixes: #27141Fixes: #27142Fixes: #27143
Signed-off-by: David Leach <david.leach@nxp.com>
By fixing the issue: #21819 in the shell, it is no longer needed
to keep a workaround, which allows prompting i2c bus name.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordisemi.no>
When CONFIG_POSIX_API is set in lieu of CONFIG_NET_SOCKETS_POSIX_NAMES,
some macros such as POLLIN, POLLOUT and MSG_PEEK are undefined, and
the appropriate posix headers need to be included to access those.
Signed-off-by: Vincent Wan <vwan@ti.com>
Adds native_posix hw counter model and the counter driver.
Functionality is needed by software which is tested
on native_posix and has dependency on counter.
Hardware model was developed similarly to HW timer model.
The counter driver wraps HW counter functions and exposes
basic functionalities: starting, stopping, setting and cancelling
single channel alarms.
Code was tested against: tests/drivers/counter/counter_basic_api.
Signed-off-by: Filip Zajdel <filip.zajdel@nordicsemi.no>
Add HSE,HSI,CSI,PLL as system clock options.
Also add correct configuration of the PLL.
New sysclk options:
- HSI with: CONFIG_CLOCK_STM32_SYSCLK_SRC_HSI=y
- HSE with: CONFIG_CLOCK_STM32_SYSCLK_SRC_HSE=y
- CSI with: CONFIG_CLOCK_STM32_SYSCLK_SRC_CSI=y
Existing sysclk options:
- PLL with: CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
PLL clock options:
- More PLL source clocks:
Existing:
1. HSE with: CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
New:
2. HSI with: CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
3. CSI with: CONFIG_CLOCK_STM32_PLL_SRC_CSI=y
- PLL vco input range is auto-calculated based on PLL DIVM1
-> Example for sysclock 96MHz generated with PLL from HSI
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=12
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=4
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2
Use LL_SetFlashLatency function from stm32h7xx_ll_utils.h
instead to setup the correct latency.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
eSPI slave driver should only indicate that a channel is ready
after the eSPI master has enabled said channel.
However, this indication is incorrectly sent during eSPI reset
even before channel renegotiation starts.
Perform only channel-specific interrupts enabling inside
initialization functions.
Send Channel ready ack only after channel negotiation is received.
Add missing callbacks for channel events to notify client driver.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Update stm32 ethernet driver to get basic boot configuration from
device tree.
So far information are:
- Label
- Base address
- IRQ number and prio
- Clock settings
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add PL330 dma driver support, this driver
- supports 32 bit memory to memory operation
- supports 36 bit memory to memory operation
under a config flag DMA_64BIT
- supports secure channel
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Add 64bit source_address/dest_address fields support.
This is needed in situation where DMA controller is capable
of handling more than 32bit source and destination addresses.
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Fix compilation warnings when CONFIG_NET_SOCKETS_OFFLOAD enabled
warning: passing argument 5 of '__eswifi_socket_new' makes pointer
from integer without a cast [-Wint-conversion]
395 | idx = __eswifi_socket_new(eswifi, family, type, proto, 0x50CE);
| ^~~~~~
| |
| int
eswifi.h:137:21: note: expected 'void *' but argument is of type 'int'
137 | int proto, void *context);
| ~~~~~~^~~~~~~
In function 'eswifi_socket_bind':
warning: comparison between pointer and integer
461 | if ((addrlen == NULL) || (addr == NULL) ||
|
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
use common log module across all eswifi sources, which allows
to compile with CONFIG_NET_SOCKETS_OFFLOAD.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
It is useful to show sensor channels for a battery in cohesive block as
it is easier to read. Add a 'battery' command to handle this. It only
supports a single battery, relying on the device-tree alias to select
it.
uart:~$ battery
Temp: 23.55 C
V: 4.31 V
V-desired: 4.40 V
I: 574 mA (CHG)
I-desired: 2000 mA
Charging: Not Allowed
Charge: 100 %
V-design: 3.86 V
Remaining: 6764 mA
Cap-full: 6764 mA
Design: 6910 mA
Time full: 0h:00
Time empty: 0h:00
Signed-off-by: Simon Glass <sjg@chromium.org>
The EEPROM device doesn't mutate the source data it's given, so update
the API signature to reflect this fact.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
It can happen that the command '>' is received between
modem_cmd_send_nolock and modem_cmd_handler_update_cmds. Since the
command handler for '>' is not set, sem_tx_ready will not be given
and _sock_send will timeout. Make sure the command handlers are set
before the send by also passing them to modem_cmd_send_nolock.
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
Add support for the NXP KE1xF SoC to the eDMA driver. The KE1xF supports
m2m DMA transfers from sources 60 to 63.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
add DTCM caching management in KConfig for stm32h7
add NOCACHE_MEMORY support for stm32h7 M7 CPU series
add HAL_RCC_EX support for stm32h7 series
implemented stm32h7 support within stm32 eth driver
Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
added changes that apply to other than stm32h7 series
and prepares stm32h7 series integration:
eth_tx/eth_rx: changed type of total_len
added necessary defines for
tx_desc and own flag extractions
added read_eth_phy_register() function
and corresponding defines
added ETH_DMA_MEM and CACHE defines
following memory buffers declarations moved out of
its ifdef preprocessor macro:
dma_rx_desc_tab, dma_tx_desc_tab,
dma_rx_buffer, dma_tx_buffer
added hal_ret stm32 HAL status checks
Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
Added extra asserts to write function of SDL display driver to check if
write is within bounds.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
IPv6 support was not fully implemented in the driver and was disabled.
This commit completes the implementation and enables it when
configured.
Signed-off-by: Vincent Wan <vwan@ti.com>
After switching nSIM to 16550 UART model & driver there is no users
for ARC-NSIM UART. So remove it entirely.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Adapted driver to clock_control changes (usage of onoff manager).
Since timer is permanenty requesting the clock, it is using API
dedicated for that: z_nrf_clock_control_lf_on().
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Updated nrf clock control driver to use onoff service for managing
multiple users.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
FLASH_TYPEERASE_PAGES is null and doesn't represent a bit in the
register, thus this instruction has no effect.
It must be replaced by FLASH_CR_PER which is the bit that should
be cleared.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Added function read_non_aligned that reads data under
non-aligned flash addres to non-aligned read buffer of any size.
Signed-off-by: Mateusz Syc <Mateusz.Syc@nordicsemi.no>
Add support for wsen-itds 3-axis accel sensor, provides acceleration,
temperature data reading and supports configuring of output data rate,
operating mode and scale.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
This gets a little complicated as the driver could be
using PCI-E MMIO, MMIO specified by DTS, or I/O ports.
This driver doesn't use struct uart_device_config any
more.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Good example of the NAMED variants of the MMIO macros, since
an existing inheritance mechanism already took the first-member
slot of the dev_data/config structs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fairly straightforward example of how to deal with PCIe.
The code considers whether a particular instance is PCIe
or not on a per-instance basis, so DEVICE_MMIO_ROM is not
conditionally defined.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
A hack was required for the loapic code due to the address
range not being in DTS. A bug was filed.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The ethernet driver no longer continues to try to initialize
itself if PCIe probing fails.
This device is always PCIe so we don't need to reserve ROM MMIO
storage.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fix typo in logged Kconfig option name that is missing in used
configuration. This one was mostly problematic for developers wanting to
find such option in source tree using grep - NET_SOCKET_OFFLOAD was not
found in Kconfig files.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
With this refactoring of pcie directory, RC drivers are placed under
host/ directory, EP drivers are placed under endpoint/ directory and
they are completely independent of each other.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
The antenna control GPIO was incorrectly initialized to active. This
is unnecessary since the HAL will activate the antenna switch when the
chip enters an active state.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The new sx1276 pin configuration helpers can be used by the sx126x
driver as well. Move them to sx126xx_common.{c,h} to facilitate reuse.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Fixed AF for USART 6 on PC6/PC7 PG8/PG9/PG12/PG13/PG14/PG15
All RTS/CTS/RX/TX pins now have correct AF7 instead of wrong AF8.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
The wdt CLEAR register is a write synchronized register.
To avoid bus stall, check the status of SYNCBUSY before
accessing the register.
Use SYNCBUSY register for SAM E.
If the wdt is syncing, return -EAGAIN to avoid bus stall.
Signed-off-by: Steven Slupsky <sslupsky@gmail.com>
Add support to STM IIS2DH the ultra-low-power highperformance
three-axis linear accelerometer.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add option to concatenate i2c transfers. If concatenation buffer size is
provided then transfers will be concatenated as long as there is space
left in buffer.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Added a build-time assert to check if heap memory configuration to
make sure that it can accomodate RPMsg queue allocations.
Ref: NCSDK-5479
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
In case of control register lock, driver should return the error
immediately. Otherwise, error is later overwritten by
'rc = flash_stm32_wait_flash_idle(dev);'
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
ep_idx is common used designator for endpoint index,
rename ep_num to ep_idx in usb_dc_sam0 driver.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This commit adds a dependency on the TRNG resource in the TI Power
module, prevents the system policy from entering standby when TRNG is
active, and adds support for device PM.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Abort I2C transfers through the MCUX HAL if a transfer fails to avoid
deadlock in the driver/HAL.
Fixes#25098
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reset gpio is configured during driver initialization. There is no
reason to do it repeat that process later, so replace
gpio_pin_configure() with gpio_pin_set().
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Introduce sx1276_configure_pin() helper macro, which hides lots of
boilerplate preprocessor and C code. Doing so allows to uncover
inconsistent gpio initialization flow and prevent such in future. Also
add error log whenever gpio_pin_configure() fails.
It seems like output of gpio_pin_configure() for several
gpios (antenna_enable, rfi_enable, rfo_enable) was assigned to variable,
but its values was never checked. Return value from gpio_pin_configure()
of tcxo_power gpio was even not catched. The only output gpio
configuration that was handled properly was actually reset gpio.
Fix that inconsistent behavior by always checking return value of
sx1276_configure_pin().
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Fix flash operation timeout due to incorrect use of
secondary ticker to abort any radio in use. Ticker id 0
is reserved for split controller's pipeline preempt timeout.
Using the same ticker id caused the secondary ticker to
not be started if controller is using the same ticker id
for pipeline preempt timeout.
Fixes#26333.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Suppress -Wchar-subscripts warnings when building with Newlib, by
casting isdigit() parameter to unsigned char.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
LPC55xxx SoCs don't allow reading erased areas, the flash memory
controller (FMC) will trigger an ECC error for that area. To prevent
reading unwritten areas the low level FMC command of margin checking is
used, this will fail if the area to be read is not correctly written
(margin_check) or area is erased (blank_check).
In the case of an erased page, we return dummy data so the application
can program that area.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The generic SPI GPIO chip select support now respects devicetree flags
for signal active level. This pass DT information to driver instance to
ensure proper behavior.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Unit tests were failing to build because random header was included by
kernel_includes.h. The problem is that rand32.h includes a generated
file that is either not generated or not included when building unit
tests. Also, it is better to limit the scope of this file to where it is
used.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Since the i2c init structure is moved from config_info to the stack,
this change requires 12 bytes more stack during driver initialization.
This fixes#25255
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
wifi-reset-gpios flags were not respected so far. This means that
setting reset as active low (which is required in most cases for ESP
modules/chips) was done inside esp driver with inverted logic. Use dts
flags instead, so "active low" property is configured the same way as
for other drivers (i.e. in device-tree instead of driver).
This change also allows to configure reset as active high, in case where
ESP's nRST signal is somehow inverted on the board (behaving as RST
signal instead).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
PCI devices on 64 bit systems can be mapped anywhere, not just in the
lower 4G of memory. Remove pointer size assumptions.
Also this removes the use of a struct uart_device_config to store the
(runtime) BAR address. That struct has other stuff in it, and the
only thing we need is the single MMIO address. It's also REALLY
confusing to have two "devconf" fields in the device storing values of
the same struct type, some fields of which are used from one of them
but some from the other!
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The PCI API was originally limited to 32 bit addresses. Even though
it had code to skip over the high word in 64 bit BAR entries, it
refused to use it and returned a 32 bit value. Some devices in the
wild have default mappings from the firmware for devices above 4G.
Also remove the "iobar" API. It's dead code, we don't call it and we
don't test it. IO space BAR entries are a legacy feature from way,
way back in PCI history (I genuinely have never heard of a real device
that uses them!). And there's no difference in format between one of
these and a 32 bit "memory" BAR anyway, someone who actually had this
requirement could just use the existing API without worry.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When checking the absolute value of cycles set to the comparator
use the MAX_CYCLES instead of MAX_TICKS.
The commit changes function names and comments to make it clear
where ticks (system ticks) and where RTC cycles are used.
Fixes#26701
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
It is annoying to read just a single word at a time. Update this
command to print any amount of data. This uses byte format at present.
We could perhaps support something like:
flash read.8
flash read.16
flash read.32
to chose the size.
Example output (with line breaks to keep within git-style limit):
$ flash read FLASH_CTRL 0 20
00000000: 20 25 00 20 1d 26 00 08 69 68 00 08 45 26 00 08
| %. .&.. ih..E&..|
00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|........ ........|
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver blocks on a semaphore to receive notification when an
operation is complete, so requires CONFIG_MULTITHREADING=y.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Since commit 5963ebaf33
("drivers: spi: CS configuration through devicetree")
the SPI GPIO CS flags are obtained from DT,
but the patch series has missed the necessary changes
for the ieee802154_dw1000 driver and decawave_dwm1001_dev board.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
K_FOREVER/INT_MAX number of ticks needs delay cycles value of
maximum order and exceeds 'int32' range.
The typecast to 'int32' results in wrongly evaluating the value
as less than 'MIN_DELAY' and chooses 'MIN_DELAY' over the actual
delay cycles.
Cap the 'MAX_TICKS' to INT32_MAX.
fixes: #26632
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Make sure to retry at least once after the timeout elapses. Sample the
current time before starting the i2c transaction, and only give up if
the polling occurred after the timeout.
The timeout exists to allow the eeprom time to complete a write, during
which time it will nack transactions (at24) or the status register will
report busy (at25). If a transaction fails legitimately, but the 1ms
sleep overshoots the timeout expiration, we will not try again, which
fails to give the part the full grace period before declaring failure.
This is likely to happen in the last 1ms interval but also possible if
the eeprom thread is preempted. It is possible to only try once and give
up if the sleep lasts longer than the timeout, which fails to give the
part an adequate period to complete the write.
Waiting until the current time is after (not equal to) the timeout is
also important because we don't want to round up partial milliseconds if
the start time was sampled near the end of a millisecond boundary. The
timeouts of eeproms can be ~5ms.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
A call to atomic_set_bit_to() was used for clearing bits in an atomic_t
variable that stores information about allocated GPIOTE channels.
This caused an issue to be reported by Coverity, as the function treats
its first parameter as an array and it was provided with a pointer to
a singleton.
This commit replaces that call with atomic_and(), to prevent the issue
from being reported and for consistency with the way bits are set for
allocated GPIOTE channels (what is done with a call to atomic_or()).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The STOPTX task cannot be triggered directly in the function that
disables TX interrupt because this task stops the UART transmitter
immediately, even if it is in the middle of shifting out a byte.
Instead, this task needs to be triggered in the interrupt handler,
when the end of transmission is signaled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
To keep the bus fully loaded, the SAM0 has a fast path that recognises
special cases like TX only, RX only, or TX/RX of the same size.
Commit #ea2431f32f7 accidentally disabled this.
This increases the utilisation from around 30 % to around 90 % at 48
MHz.
Signed-off-by: Michael Hope <mlhx@google.com>
The SAM0 has a data register and a shift register. Data that is
written to the data register is transferred to the shift register by
the peripheral.
On the SAMD51, the CPU is fast enough that the first data write hasn't
been transferred to the shift register by the time the next data write
occurs, causing the second write to be dropped, causing the receiver
to wait forever.
Fix by spinning until the data register is empty.
Signed-off-by: Michael Hope <mlhx@google.com>
The gd7965 driver still called ksleep with unsigned integers.
Use the K_MSEC makro instead.
Signed-off-by: Tobias Schaffner <tobiasschaffner87@outlook.com>
Adds the chip select devicetree flags to the spi_cs_control instance.
ISM43362 chip select is ACTIVE_LOW.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Fix host RX thread being deadlocked. The deadlock occurs because the
RX thread is stuck waiting in conn_tx_alloc with K_FOREVER but if the
connection is disconnected only the RX thread can unblock it in the
handling of the disconnect event.
This commit fixes this deadlock by splitting the processing of the
disconnected event into two parts.
The part needed to unblock the RX is to release resources held by
unack'ed TX packets and mark the connection state as not connected
anymore.
The RX thread waiting for free_tx fifo and the TX thread waiting for
the bt_dev.le.pkts semaphore will both check the connected state after
having acquired them and will abort if disconnected.
The rest of the processing will be handled at normal RX thread
priority like normal.
Move the bt_recv_prio handling to the Bluetooth host when the host
has defined its own RX thread (CONFIG_BT_RECV_IS_RX_THREAD=n).
If the HCI driver has the RX thread (CONFIG_BT_RECV_IS_RX_THREAD=y),
then the responsibility to call bt_recv and bt_recv_prio correctly
falls to the HCI driver.
The helper function bt_hci_evt_is_prio() is replaced with
bt_hci_evt_get_flags() so that the HCI driver can do this correctly.
This decision to replace was made so that existing HCI drivers
maintained out-of-tree will fail at compile time with the new system.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Bluetooth: host: Move bt_recv_prio to host when RX thread is defined
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
We should not set PLLSRC bits here. It is done by
LL_PLL_ConfigSystemClock_* functions which are called later.
Also, PREDIV1 setting should not be restricted to HSE only.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Add a Kconfig option for enabling the DAC test output. On the NXP
KE1xF the DAC test output is internally routed to ADCx SE23.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add support for STM32L0X using the generic STM32 backend. This is
quite a significant change since the L0 series uses a slightly
different flash controller. Refactor the generic backend to better
support different block sizes and the L0's register interface.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Several STM32 chips have identical chip-specific code that has been
duplicated in different source files. Unify the F0x, F1x, and F3x to
use a single implementation.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
ringbuf claim API returns pointer to contiguous area. In cases when data
in ringbuf wraps the end of internal buffer, then single call to claim
data is not enough to get all data - there is remaining part on the
beginning of internal buffer. Those remaining bytes will need to wait
for next ISR handler to trigger workqueue. Theoretically this means that
data on the beginning of ringbuf can wait there forever, or simply to
the next timeout in PPP stack when data traffic continues.
Consume data from ringbuf in a loop, stopping only when claiming results
in empty buffer. This will make sure that there is no stale data in the
ringbuf.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Claimed ringbuf bytes were parsed until first frame was detected, but
remaining data in the claimed area was just ignored / lost.
Continue parsing bytes to the end of claimed area after each detected
frame.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
CLOCK_STM32_PLL_XTPRE Kconfig symbols was made to differentiate
code between F1 soc variants with XTRE and others.
It appears that specific XTRE code handling is already in place in
LL_PLL_ConfigSystemClock_* functions that are called afterwards.
Since this piece of code is not required anymore, let's remove
the symbol.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
- Fix passive mode protocol selection depending on AT versions
- Use Kconfig value for reset timeout
- Fix bug with parsing security from scan result
- Re-order some AT commands during init due to some commands having
dependency on other commands
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
Implemented rf2xx_set_txpower() in ieee802154_rf2xx.c by mapping dBm
values to RF2XX register values.
Signed-off-by: Kari Severinkangas <kari.severinkangas@tridonic.com>
Signed-off-by: Markus Becker <markus.becker@tridonic.com>
Remove K_FOREVER wait on completion_sync.
In some situations (a short on I2C SDA line for example), this
semaphore will never be released and therefore we should not wait
it forever.
Instead we wait for a maximum of 100msec and return an error if we
weren't able to retrieve the semaphore.
In such situation, the program is not stuck anymore, but the I2C
driver must be uninit then init again to work again.
Fixes#25076.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
The driver should only call net_pkt_unref on packets that get
successfully handled, ie where send/sendto return 0. If the packet
cannot be handled, net_context layer still owns the packet and should
take care or the unref.
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
The Atmel GMAC Ethernet driver may be used by both the SAM series
(e.g. SAM E70) and SAM0 series (e.g. SAM E54) SoCs.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
When writing buffers larger then page-size, there is already a routine
that checks wrap around and adjusts offsets, but this routine was
missing incrementing the data pointer, which would results in
rewriting the same page-size bytes over and over. This adds the proper
increment code.
Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
Silence a gcc warning due to possible return of unitialized variable in
erase function. This could only happen if size == 0, which doesn't seem
likely, but initializing the variable to zero should fix the issue.
Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
Add support for the SX126x series of LoRa radios using the
LoRaMAC-Node HAL.
This driver currently makes the following assumptions:
* DIO1 is used as an interrupt line.
* There is an RF switch selecting between the TX and RX ports and
that switch is controlled by DIO2.
* There is either no TCXO or the TCXO is controlled by DIO3.
Specifically, the limitations above mean that modules that use GPIOs
to control the RF switch are currently not supported. Support for such
modules would need changes to the LoRaMAC-Node code.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Add a new configuration option, LORA_SX12XX, that is shared for all of
the LoRaMAC-node-based radio drivers. By default, the appropriate
driver for the LoRa radio in the device tree is included is included
in the build.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Some boards may include an APA102 LED on an existing SPI bus. With
additional circuitry, chip select is supported where the APA102
lacks a built in CS pin.
This patch allows CS to be defined in the devicetree (through .dts
files) and utilised in the apa102.c driver if it's available. Preserving
old behaviour if no chip select is defined.
Signed-off-by: Roman Vaughan <nzsmartie@gmail.com>
Adds optional device tree properties to set delays between spi chip
select assert/deassert and clock edges in the mcux dspi and lpspi
drivers. If these properties are not set, then the minimum supported
delays are used.
Verified that tests/drivers/spi/spi_loopback/ still passes on
mimxrt1050_evk (lpspi driver) and frdm_k64f (dspi driver).
Measured with a scope that the pcs-sck-delay and sck-pcs-delay times on
the first spi transaction in the test are reduced from 7.82 us to 20 ns
on mimxrt1050_evk.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add an additional option to the spi_cs_control struct that records how
the pin has been configured in devicetree. For drivers that are not
updated, the CS behaviour is the same as before (Push-Pull).
Use the devicetree knowledge with the GPIO subsystem so that the correct
physical pin levels for the CS pin are automatically selected.
Fixes#26267
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add Nuvoton numicro series UART support, currently supports
only poll mode.
UART0 clock and pincontrol are directly configured, will be
replace when clock and gpio support is added.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
PCIe shell was enabled by default if shell is enabled in below commit:
commit ee985d81aa ("shell: enable modules by default if shell is
enabled").
However, this shell file has tests for PCIe RC, not applicable to EP.
So, should not be default enabled for PCIe EP.
If we add EP shell tests in future, they should be added under
drivers/pcie/endpoint/ directory.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
This runs the Timer/Counter for Control in 'normal' PWM mode. The
number of channels and counter width depends on the device and is
imported from DeviceTree.
Signed-off-by: Michael Hope <mlhx@google.com>
Add api to raise SGI to target cores in affinity level identified
by MPIDR. Currently only EL1S is supported.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
The front side bus interrupt delivery feature is a somewhat obscure
part of PC history (in some sense a presaging of MSI interrupts) that
we don't use.
But it's part of the spec, works on hardware, has precedence over the
"legacy" interrupt routing feature we do use, and can be legally
enabled by firmware.
Disable at init time.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
There is a typo in the function pointer assigned to get_parameters. It
should be flash_sam_get_parameters.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
It is desired to have the peripheral writes completed to clear the
interrupt condition and de-assert the interrupt request to GIC before
EOI write. Failing which spurious interrupt will occur.
A barrier is needed to ensure peripheral register write transfers are
complete before EOI is done.
GICv2 memory mapped DEVICE nGnR(n)E writes are ordered from core point
of view. However these writes may pass over different interconnects,
bridges, buffers leaving some rare chances for the actual write to
complete out of order.
GICv3 ICC EOI system register writes have no ordering against nGnR(n)E
memory writes as they are over different interfaces.
Hence a dsb can ensure from core no writes are issued before the
previous writes are *complete*.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Right now we depend on NEWLIB_LIBC to build Zephyr with LORA=y. This
seems to be the only Kconfig option like that. Convert it to select
REQUIRES_FULL_LIBC instead, which will select NEWLIB_LIBC by default and
allow to use external libc as well.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
In sensors drivers, in gpio callback function :
The device structure in parameter is related to the gpio device.
Signed-off-by: laurence pasteau <laurence.pasteau@stimio.fr>
Commit id a538dcd8f8 got rid of the usage of these pointers so they are
useless now and can be removed in this drivers.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert the present initialization code into initialization macros.
Since both the uart and the usart peripheral is implemented, two sets
of initialization macros are necessary.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
Parsed value is expected to be in range (0, UINT32_MAX). Use strtoul
instead of strtoll, so we better match its range. In a tested
configuration this saves 380 bytes of flash with newlib and arm32
target.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This enables the ACPI_EC1 interface which is typically accessed
through ports 0x6A0 and 0x6A4 in Bios.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
For some reason, use of the DT_NUM_INST macro in this driver was not
replaced with DT_NUM_INST_STATUS_OKAY. In consequence, this driver
could not be compiled successfully. Furthermore, because this now
undefined macro had been used inside UTIL_LISTIFY, gcc was not even
able to report an error, instead the compilation just "froze".
This patch replaces UTIL_LISTIFY(DT_NUM_INST()) with more appropriate
in this context DT_INST_FOREACH_STATUS_OKAY. It also adds an apparently
missing inclusion of sys/byteorder.h.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
pcie has an all in one command for listing pci devices. Make it support
additional commands and move lspcie to `pcie ls`.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If shell is enabled then enable all sub-shells if their dependencies are
satisfied. This was done for some modules and subsystems but was not
consistent.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Printing the file descriptor does not give any information when
the network interface creation fails, so print errno here instead.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The driver was returning zero due to accessing the, say, 0x81'th
endpoint instead of the 0x01'th endpoint.
Signed-off-by: Michael Hope <mlhx@google.com>
Espi has three uart port from 0 to 2 and uart sirq need to enabled for
the port which is active in the hardware. An active uart sirq shoudl be
enabled based on uart mapping configuration.
Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
All pinmux supporting CAN, SPI and I2C of F7 series are added.
Since the F7 series supports up to two CANs,
the pin names of CANs have been changed.
Several minor pinmux errors have also been fixed.
Sorted by Alternate function.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
Avoid reading LPTIM counter four times instead of three when second
read doesn't give same value. Use common code, avoid volatile for
local vars.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
According to RM, when increasing the CPU frequency, the new number of
wait states to the Flash latency bits must be written and verified
before modifying the CPU clock source and/or the CPU clock prescaler,
to prevent NMI to occur; when decreasing the CPU frequency, after.
Tested with STM32L462 SOC and MSI with several frequencies, both
increasing and decreasing. HSE built, not tested.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi@nexxiot.com>
Several shell modules use cloned code to iterate over all devices and
identify the nth instance that meets some criteria. The code was
repetitive and included various errors. Abstract to a helper function
that performs the check consistently.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
RF SPDT switches used for RX/TX selection have often power enable pin
connected to MCU's GPIO, so it is possible to disable it to save power
when not doing any data transfers. Add 'antenna-enable-gpios' property
to support such designs.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add support for TCXO power control using GPIO pin. Some boards
(including B-L072Z-LRWAN1 already supported in Zephyr) need delay
applied after powering on TCXO, so add device-tree property allowing to
configure that as well. Cache information about TCXO power status, so
subsequent requests to enable it will not result in unnecessary delays.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There are several antenna path designs on SX1276 compatible boards in
the wild. B-L072Z-LRWAN1 board has dedicated enable pins for RFI, RFO
and PA_BOOST. This is exactly what this patch allows to
configure. Second variant of antenna selection is done with a single
GPIO pin, which controls RF SPDT switches (input or output). This is
also supported, when either 'rfo-enable-gpios' or
'pa-boost-enable-gpios' property is provided alone (RFO/PA_BOOST is
selected only when transmitting, so there is no need for explicit
'rfi-enable-gpios' configuration).
Drop requirement for 'power-amplifier-output' DT property when there is
either 'rfo-enable-gpios' or 'pa-boost-enable-gpios' configured. Fail
using BUILD_ASSERT() when neither is specified.
Make the SX1276SetAntSw() logic similar to loramac-node examples
implementation, so RFO/PA_BOOST is enabled only in
RFLR_OPMODE_TRANSMITTER.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
PA selection mainly depends on board design. So it looks like
device-tree is a better mechanism than Kconfig in this case. Use string
property with two possible values: "rfo" and "pa-boost".
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
All fields in PA_CONFIG register are set explicitly, so there is no need
to read this register first.
Suggested-by: Andreas Sandberg <andreas@sandberg.pp.se>
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
The PA_CONFIG register is currently not setup correctly for the RFO
path. The biggest problem is that the output power is incorrectly set
1dBm higher than requested. Additionally, the lower power levels are
not configured properly since the max power field in PA_CONFIG is
always configured for an output power between 0 and 15dBm.
To support lower than 0dBm, adjust the max power field in the
PA_CONFIG register to shift the output power range to -4--11 dBm when
the requested power is 0 or lower.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
[Marcin: rebase on master]
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Some flash controllers support operations only when buffers are word
aligned. An example of such is nRF QSPI, which checks input buffer using
nrfx_is_word_aligned() function inside nrfx_qspi_write().
Align test array on 4 bytes, so we will gain compatibility with more
flash controllers, including nRF QSPI.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
With addition of flash_parameters structure, and supporting API call
to retrieve it, it is no longer needed to store write_block_size as
a part of flash_driver_api and it should be part of flash_parameters.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
With addition of flash_get_parameters API call, it is needed to provide
support for the API to flash drivers.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Add support to register callback function for each PCIe reset.
These callback functions are executed from corresponding
PCIe reset interrupt handler if registered.
Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Add reset interrupt handlers for all three types of reset
interrupts that iProc PCIe EP can receive - namely PERST,
INB PERST and FLR.
Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Add support for the polarity flag in the STM32 PWM driver.
STM32 boards using PWM have been updated accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The PWM drivers has been refactored using the HAL LL API. Not only that,
but the set pin_set function is now faster, as channel output compare is
just initialized if needed.
NOTE: Has been tested using H743zi board for now.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add a DSB before doing WFE in get_entropy_isr, to ensure
the memory transactions are complete.
Add a note clarifying a dependency for the existing solution
(dependency is satisfied by ARCH code but is good to state
clearly).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We need to clear the NVIC Pending bit for the RNG IRQ before
doing any WFEs and expect to wake up by RNG events. This is
because the event register will be set only if NVIC status
is changed from 0 to 1.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Appropriate WS can be loaded automatically if
the display controller has integrated temperature
sensor or an external sensor is connected.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Fixes the bq274xx sensor driver to check the i2c device pointer is
non-null, rather than the bq274xx sensor device pointer. This appears to
be the originally intended check based on the LOG_ERR message.
Coverity CID: 210035
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Initialize the dummy data transfer so spi transfer is defined even for
an undefined tx data buffer. This aligns the rv32m1 spi driver with the
mcux spi driver.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
Aligns MAC registers to the latest reference manual.
Replaces NULL buffers as some SPI drivers will fail.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
The CONFIG_BT_RPMSG_NRF53 should depend on the SOC, not the BOARD
definition. Otherwise this will break for custom boards.
Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
This commit removes API functions and macros which were deprecated in
2.2 release. GPIO drivers are updated accordingly.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Modified order of reported events on rx disable to match API
description: first RX_RDY and then RX_BUF_RELEASED.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
So far, when rx_disable was called then received data was discarded.
This is currently not according to the API but it is needed if
rx_disabled is called due to out of band information about end of
packet.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
So far, when rx_disable was called then received data was discarded.
This is currently not according to the API but it is needed if
rx_disabled is called due to out of band information about end of
packet.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The HPET timer was hard-coded to support only edge triggering
interrupts. This adds the necessary bits to enable level
triggering for the timer.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
DMA driver shall be initialized before any of its
clients. Right now, its initialization priority is
lower than that of UARTs. So, increase its init
priority to support future async uart drivers.
Signed-off-by: Jun Li <jun.r.li@intel.com>
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).
- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
Allow passing the channel as a number instead of a string in order to
support sensor-specific channels (channel SENSOR_CHAN_PRIV_START and
up).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Enable VLAN support so that this driver can be used to test
the VLAN when using qemu_x86 board.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This change removes references to raw POSIX types and functions,
allowing the drivers to build without NET_SOCKETS_POSIX_NAMES.
After this, the dependency between NET_SOCKETS_OFFLOAD and
NET_SOCKETS_POSIX_NAMES can be removed.
See issue #26033 for additional context
Signed-off-by: Adam Porter <porter.adam@gmail.com>
The driver currently blindly copies all of the outgoing bytes into the
endpoint. Instead, calculate the endpoint size and copy up to that
amount instead.
Signed-off-by: Michael Hope <mlhx@google.com>
A non-blocking, isr-safe version of get_entropy() is necessary in order
to be called during boot time before POST_KERNEL initialization.
Otherwise a crash is seen as the existing get_entropy() implementation
uses k_sem and relies on interrupts.
Fixes#18629
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
iProc PCIe EP IP is present in Broadcom PCIe offload chips.
Add iProc PCIe EP driver to provide basic PCIe EP functionality.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
Introduce common API to achieve data transfer using memcpy
to/from outbound region of PCIe EP.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Add public APIs for PCIe endpoint driver:
- EP configuration space read/write
- Mapping/Unmapping of Host buffer and PCIe outbound region
- Raise interrupt to Host
These are minimal base APIs to make PCIe EP functional.
Also, add a Kconfig and an empty CMakeLists.txt for drivers to extend.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
tested on mimxrt1060_evt
MEMORY_NOCACHE is needed
test on frdmk64f
special test slot need configure with
CONFIG_DMA_TEST_SLOT_START
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
The Nordic QSPI peripheral uses DMA transfers so data to write must be
located in SRAM. Add a Kconfig that enables copying data from NVMC to
a stack SRAM buffer so it can be written to flash.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
mcumgr and possibly mcuboot write single byte values to update the
state of objects. Rather than fail to do the write of values too
short for this peripheral detect the situation and write from a stack
buffer that meets the length criteria.
Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Currently user is forced to configure an array of 4 IO pins. This makes
no sense when there are only 2 IO pins connected on board.
Configure 3rd and 4th pin in internal structure as
NRF_QSPI_PIN_NOT_CONNECTED if only 2 were specified in device-tree.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
The cs-gpios pin on SPI controller is optional for SPI controllers that
can automatically control CS line.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Extends the fix in commit 2175675199 to
all other mcux serial drivers. They were incorrectly checking if the
transmit buffer was empty when they should have been checking if the
transmission is complete.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The STM32L072CZ MCU has a built-in USB device controller which is
supported by Zephyr's USB STM32 driver. The b_l072z_lrwan1 board has a
micro-USB connector that is wired to the MCU via two solder bridges
(SB15 and SB16) that need to be closed to connect the data lines.
Update the board documentation to describe the solder bridges and
enable the USB controller in the device tree.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
LoRa radios supported by LoRaMAC-Node have a lot of common
functionality. Zephyr's LoRa implementation for the SX1276 uses
LoRaMAC-Nodes Radio HAL to implement API functionality like send and
recv. The exact same functionality will be used by the SX126x
driver. Facilitate sharing by moving that to a separate source file.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The implementation of the board support routines is shared between all
LoRa drivers that use LoRaMAC-Node. Move them from the SX1276
implementation to a separate source file to facilitate reuse. Make
this source file conditional on CONFIG_HAS_SEMTECH_RADIO_DRIVERS since
it will be used by all LoRaMAC-Node-based drivers.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Use "kLPUART_TransmissionCompleteFlag" instead of
"kLPUART_TxDataRegEmptyFlag" to check if the tx transmition is finished.
The "kLPUART_TxDataRegEmptyFlag" would give a wrong result
even if the transmition isn't over.
Signed-off-by: Andy Liu <andy@madmachine.io>
Fixes the i2c shell to check the device name pointer is non-null before
dereferencing it.
Coverity CID: 210558
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This option will configure MCUX block (by setting RMIISRC [19] bit to 1
in SIM_SOPT2 register) to use external clock source for RMII from
ENET_1588_CLKIN).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
When setting a timeout K_TICKS_FOREVER,the lptimer clock is stopped
(no reset of the lptim).
Then is the lptim possibly re-started when another source asks for.
The lptim clock must then be re-started and continue counting.
This is the case when wakeup from sleep mode, for example.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
So far, register state was used to determine if GPIOTE channel is busy.
This leads to issues if channel is used in more customized way after
allocation. In particular, if it temporarly disabled since disabled
channel is treated as available and can be allocated to another user.
Added additional mask which tracks allocated channels. After allocation
user can reconfigure the channel.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This patch set the EXTI line 17 as the RTC alarm pin
on the stm32f2x serie from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
By using the Zephyr-native zsock_ family of types and functions, these
drivers will be decoupled from NET_SOCKETS_POSIX_NAMES.
Signed-off-by: Adam Porter <porter.adam@gmail.com>
Removed flow control configuration from Kconfig and updated samples
to use device tree for that.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Cleaned up flow control configuration. Added support for using only
cts or only rts.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Cleaned up flow control configuration. Added support for using only
cts or only rts.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Also reduce the check that the affected region is within the device
span to its minimal equivalent conditions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the necessary clock configuration to support STM32L-based
SoCs. This change likely adds support for other STM32 SoCs as well
since the HSI48 clock is configured for all SoCs that support it
(except the STM32L4x) instead of just the STM32G4X.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The entropy driver needs to use the SYSCFG block to control VREF on
the STM32L0. Clock the block if the entropy driver has been enabled.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The LPTIM driver is supposed to be only available when the SoC is
allowed to enter power sleep mode, as described in commit f30f5fff72
("drivers: timer: lptim is [EXPERIMENTAL] for stm32 soc series only").
For that it should depends on SYS_POWER_MANAGEMENT (which gates the
SYS_POWER_SLEEP_STATES and SYS_POWER_DEEP_SLEEP_STATES options) instead
of DEVICE_POWER_MANAGEMENT.
Fixes#25989
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
MPSL is a library that provides external radio IRQ source for the
802.15.4 driver. If this library is in use, the driver shall not
configure the radio IRQ.
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
The NRF5 and RF2XX drivers are using different thread names compared
to the other 802.15.4 drivers. Aligned the thread names to <chip>_rx.
Signed-off-by: Markus Becker <markus.becker@tridonic.com>
Set the thread name for the data acquisition thread in the TI LMP90xxx
ADC driver to aid in debugging and profiling.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Replace individual device instance definitions with the macro that
expands to the equivalent change.
F='struct device DEVICE_NAME_GET'
git grep -l "$F" \
| xargs sed -i -r \
-e "s@$F"'\(([^)]*)\);@DEVICE_DECLARE(\1);@'
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Some radio drivers need configuration before start-up. Up to now only
the RF2XX drivers allowed this, but other radio drivers need this as
well. In particular for setting EUI64 addresses.
Signed-off-by: Markus Becker <markus.becker@tridonic.com>
Some ticks are counted additionally when the autoreload
interrupts were too close together.
This patch improve the counts of the clock cycle.
lptim_fired worked badly in particular because the flag ARRM
was not raised when the interrupt was forced.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
If ticks is K_TICKS_FOREVER the register autoreload isn't set.
So, on the next call to the z_clock_set_timeout function
the wait for the flag ARROK will be infinite.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Used for permission validation when accessing the associated file
descriptors from user mode.
There often get defined in implementation code, expand the search
to look in drivers/ and subsys/net/.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is a follow-up to commit cf7dd4981f.
When disabling RX, it is necessary to clear the RXSTARTED event after
the ENDRX_STARTRX shortcut is deactivated, as the event might already
have been generated at this point. If the event is not cleared and
the disabling of RX is done from the user handler called in the context
of the ENDRX interrupt, a spurious UART_RX_BUF_REQUEST event will be
generated (although RX is already disabled) for which a corresponding
call to uart_rx_buf_rsp() would fail, as the second buffer is already
set. Depending on the application implementation, this can result in
other unexpected problems.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
We don't need to reset backup domain to set LSE clock source.
It's dangerous to reset backup domain, it removes:
- RTC configuration
- backup registers
- RCC Backup domain control register
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Having a completion wait function release a lock internally only when
the operation fails is confusing. Remove that feature, and make the
lock and unlock operations explicit and paired.
This makes it much more clear how to properly handle transactions that
require multiple calls to the HAL.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The stack buffer used to pad small reads must still be aligned to a
word address as the underlying driver uses DMA transfers with that
requirement. Don't assume the compiler will naturally align it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The check for small transfers inadvertently allowed a transfer of zero
bytes, which should be an error (invalid parameter).
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The consequent and alternate expressions for COND_CODE_1 must be
enclosed in parentheses, like this:
COND_CODE_1(PREDICATE, (consequent), (alternate))
The parens are missing in exactly one place in the tree. Fix it.
Reported-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Activation of the LPTIMER is valid for SLEEP MODE only
The choice of the lptim clock source is STM32_LPTIM_CLOCK
set the LSE in first position to have as default value
Signed-off-by: Francois Ramu <francois.ramu@st.com>
based on PR#25412
Some kernel tests use `CONFIG_TICKLESS_KERNEL=n` with
`CONFIG_SYS_CLOCK_TICKS_PER_SEC=1` to detect when a test runs longer
than 1 second. These tests break if a tick is announced every time a
timeout occurs. Only announce if the measured duration since the last
tick is at least the duration of a tick.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
set the min and max values of the given ticks from 0
to LPTIM_TIMEBASE which is the full register value
In case the timeout is FOREVER, then lptimer is stopped
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The current value of the counter must not be added to the accumulator.
It will be added when calling z_timer_cycle_get_32.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
When the tickless kernel isn't used, we don't want to wait for ARROK.
This wait can be endless.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
The power configuration is dependent on which SPI is physically used.
In order to allow DT_INST_FOREACH_STATUS_OKAY() to iterate through
instances without the assumption that index 0 corresponds to SPI0
(which would be incorrect in the case when only SPI1 is enabled),
we need to check the base address to identify which SPI is being dealt
with.
Fixes#25673
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The implementation of offload_getaddrinfo in this driver failed
when the node it was called with was an IP address. This condition
was never detected, and as a consequence a DNS query was done on
the IP address instead of returning it directly.
Also, the port was set first after running the DNS query.
As a consequence, if the IP address would have been returned directly,
this would have been done without a port been set.
Both errors are fixed in this patch.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Prevent usage of system work queue before it is ready by delaying
initialization of temperature device. Work queue is not used until
application stage.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
There does not seem to be a simple way to express the fact that UART1
can be initialized later at the POST_KERNEL level. The existing code
is wrong in the sense that it always initializes DT instance 1 later,
instead of doing it for UART1 (which may not be instance 1).
In addition, UART instances on other platforms are
also initialized at the PRE_KERNEL_1 level regardless of the instance
index, so let's do the same on this platform for consistency.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The power configuration is dependent on which UART is physically used.
In order to allow DT_INST_FOREACH_STATUS_OKAY() to iterate through
instances without the assumption that index 0 corresponds to UART0
(which would be incorrect in the case when only UART1 is enabled),
we need to check the base address to identify which UART is being dealt
with.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This reimplements z_timer_cycle_get_32() so it works
when IRQs are locked and solves the hung
k_busy_wait() problem.
Fixes#23622.
Signed-off-by: Jakub Cebulski <jcebulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Co-authored-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Updating the eswifi driver to provide port information (along with
IP / net context) whenever an async message is received. This is
needed to fully populate the "remote" info in "net_context"
required whenever net_context_send is called.
Also adding code to populate "remote" info in "net_context"..
Tested with STM32 disco IOT kit. Fixes#25621
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
When the loop that tries to obtain the lock in poll_out() finishes
because of hitting the max number of trials (what normally should
never happen), force the lock to be taken instead of just giving up
with sending the data. The latter approach that was in use so far
could not deal with a situation when some thread was aborted while
keeping the lock. Other threads would then have no chance to send
anything with poll_out() until it was called from an ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Correct dependency of the TEMP_NRF5 Kconfig option so that it can be
enabled only on nRF SoCs that feature the TEMP peripheral.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Some Kconfig defined devices may be defined using dt_chosen_label
function. Since there is no way to ensure a device enabled in dts
is also defined in Kconfig, it may happen that instance is not
actually defined.
In this case device_get_binding might return 0, leading to undefined
behavior in the function that calls it.
When not already done, systematically check return of function
device_get_binding on devices defined through dt_chosen_label macro.
Trigger ASSERT when required and return error when possible.
Fixes#20068
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Nordic driver must allow read from control OUT endpoint by
itself. For data stage transactions with length > MPS (64Bytes)
this must be performed for each 64B + Residue data packet.
Residue - data packet with len < 64B.
The exact length of data transfer is known from wLength field
form setup packet in setup stage. Until now driver was incorrectly
initializing the length of the data stage and at some point will
not allow for next data stage.
This commit addresses the issue #23980.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
The weak implementation returns 0 for all operations without doing
anything, which incorrectly suggests that an operation like
device_get_power_state() returned an accurate description of the
system clock power state. Return -ENOTSUP instead.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
If timeout is being overwrite exactly when previous one is expiring
then hardware event was cleared correctly but interrupt was already
triggered. Interrupt routine was assuming that compare event is set
and proceed with that assumption. However, in that corner case when
compare event was overwritten and event was cleared, that was not the
case.
As the outcome, timeout could be triggered prematurely. Fixed by
clearing pending interrupt after handling previous compare value.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
mcuboot and possibly other tools read single byte values to determine
the state of objects. Rather than fail to do the read of values too
short for this peripheral detect the situation and read into a stack
buffer that meets the length criteria, and on success copy the data
into the provided buffer.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
* still need to clear IP bit in timer irq handler
* last_time should be aligned to ticks, old code will miss some
cycles which are about (curret_time - last_time) % CYC_PER_TICK
* in timeout set, shorten the delay needed when tick is 0, this
will improve the response of timer irq
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
the pulse triggered timer irq doesn't work for all targets. In
iotdk, we found the clear of IP bit will clear int request
when elapsed called in thread context. So come back to level
triggered way which is supported in all targets, and use the sw
triggered irq to remember the irq request which may be cleared
in non timer int handler.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
* rename overflow_cyc to overflow_cycles for better understanding
* use MIN macro to replace if .. else ..
* typo fix in comments
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Allow configuring the clock prescaler divider for the NXP Kinetis
FlexTimer. Setting the prescaler to a lower value allows for much
higher resolution/accuracy for the generated PWM waveforms.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
User can now add extra Ethernet TAP parameters when starting QEMU.
This is useful if we want to set for example the MAC address
of the network interface.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
When PCIe is enabled for UART, the port address is probed during
initialization and is written back into the device config struct.
However, the device config struct is supposed to be const and
read only. This results in page faults when MMU is enabled as
the struct cannot be written into. So fix this by storing port
address in device data struct if a particular UART instance is
of PCIE.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The init function returns successful even if the first
configuration function call fails. This may leave
a non-usable UART to be discoverable with
device_get_binding() which will definitely result
in lots of head scratching. So change the init function
to return properly.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the calls to read_timer_{start,end}_of_tick_handler()
to mark the start and end of ISR which will be used to display
the time spent in ISR with benchmarking tests.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
IRQ_CONNECT() can only be called at one location to connect the irq for
CPE0. This commit modifies the driver to call into the HwiP layer in TI
HAL so that TI's RF driver can do the same when connecting the irq.
Fixes#25216
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
New update of hal_ti requires DeviceFamily_CC13X2/DeviceFamily_CC26X2
to be defined in order to include the rfc.h header.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Some kernel tests use `CONFIG_TICKLESS_KERNEL=n` with
`CONFIG_SYS_CLOCK_TICKS_PER_SEC=1` to detect when a test runs longer
than 1 second. These tests break if a tick is announced every time a
timeout occurs. Only announce if the measured duration since the last
tick is at least the duration of a tick.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add +1 tick to alarm in order to compensate the partially started tick.
Alarm will expire between requested ticks and ticks+1.
In case only 1 tick is requested, it will avoid that +1 Tick event
occurs before alarm setting is finished.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The check for assertion on the "config_func" was added to
validate that the function pointer is valid. However, in
the code we are invoking the "config_func" and comparing
its output with NULL. This causes build failures with
CONFIG_ASSERT=1. Caused by PR-25393.
Tested on Nucleo F767Zi board.
Fixes#25427
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
The existing uart driver ns16550 did not have ISR locking that
effected IO APIC working in fixed delivery mode in SMP system
x86_64. This commit adds ISR locking mechanism using spinlock
for the interrupt related services.
The CONFIG_IPM_CONSOLE_STACK_SIZE is increased to lift
limitation of stack size experienced in IPM driver test with
this spinlock impelentation.
Fixes#23026
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
Current dma struture code didn't allowed only rx channel removal,
disabling tx channel (in spi client node) was leading compilation
issue.
Fix this by moving conditional code inside SPI_DMA_CHANNEL macro and
get the part of code which is present or removed (SPI_DMA_CHANNEL_INIT)
outside of {}.
Additionally, fix indentation on '\' in whole instance init macros
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
All initialization of the Ethernet interface is done in the
eth_initialize function which is invoked by the boot code.
This function sets up DMA, programs the Ethernet module and
enables IRQs. However, this function does not setup "netif"
interface info which is done when the ethernet device is
enumerated by the NET stack via the "iface_api.init" func.
However, after the eth_initialize func is called, it is
possible that the system receives RX interrupts, and the
"rx_thread" accesses the "netif" pointer to get iface info.
However, because the "netif" info is not necessarily
populated at this time, we get a crash (as OS does NULL
access).
Fixed by enabling Ethernet IRQ after the interface is
properly setup.
Tested on Nucleo F767Zi board.
Fixes#25408
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
Use device tree provided configurations for arm architecture timer
PPIs.
This fixes issue of timer ppi not working on most hardware where
edge-triggered PPI are not supported.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Hardware does not seem to support triggering interrupts to
itself by setting line as both input/output and setting
output to desired level. So just say interrupt triggering
is not supported when line is set to output.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change adds abort of ongoing write operation in ep_ctx_reset. This is
required to keep the state of Zephyr driver consistent with state of
nrfx driver. This fixes a bug where nrfx_usbd was stuck in busy state.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
If interrupt is previously enabled and triggering condition
changes, it might fire callback based on previous condition.
To avoid this issue, disable interrupt before trying to
change settings, and enable afterwards.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:
- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
for macros which are equivalent to
DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name
Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.
This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The driver-specific config_info structure referenced from the device
structure is marked const. Some drivers fail to preserve that
qualifier when casting the pointer to the driver-specific structure,
violating MISRA 11.8.
Changes produced by scripts/coccinelle/const_config_info.cocci.
Some changes proposed by the script are not included because they
reveal mutation of state through the const pointer, though the
code works as long as the driver-specific object is defined without
the const qualifier.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
With this change, the spi transceive with dma function
waits for the spi busy flag reset and for the dma transfer end.
Then it reloads the channels until all buffers are consumed.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This change avoids the reload of the dma channel
in the callback function, just sets the corresponding Tx, Rx flag.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add simple commands to read or write a single byte from a device
register.
i2c write_byte I2C_2 36 b0 12
i2c read_byte I2C_2 36 0
Output: 0x82
I modified Anas' version to put args in variables first so that the code
is self-documenting.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of having a Kconfig property, if there is no local-mac-address
property in the devicetree than we'll generate a unique MAC address
based on unique ID registers on the SoC.
We remove the local-mac-address properties in the SoC dtsi files to
match the default behavior that existed before (ie, unique MAC address)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move from a Kconfig to select/initialize the MAC address to using the
"local-mac-address" property in devicetree. If the property is set the
drivers will initialize the mac-address from the devicetree (unless the
mac address is all 0's). The MAC address might get overwritten by
either a driver specific means or by the setting of
"zephyr,random-mac-address" in the devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Utilize the devicetree property "zephyr,random-mac-address" to determine
if a driver should use a random mac address and remove the associated
Kconfig options that enabled this feature.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rather than having each driver have its own slightly different way of
generating a random mac address, add a helper function that they all can
call so we do it one way.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add infineon XMC4 series UART support. Driver supports
only poll mode using XMCLib.
Out of 4 available UART's on SoC, only UART1 is confgired
by default in UART mode until GPIO & pinctrl support.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Both ST and STM32 modules where using same HAS_STLIB Kconfig
symbol.
Now that each module is createing is own lib, we need to be able
to distinguish libs.
Depends on zephyrproject-rtos/hal_stm32/pull/52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use DT_INST_SPI_DEV_HAS_CS_GPIOS() in drivers to determine if we should
utilize CS_GPIO base SPI chipselect handling. This allows us to remove
Kconfig option for this feature.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updating the eswifi driver to indicate "scan completion"
to WiFi Management once scanning is done.
Tested with STM32 disco IOT kit.
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
Currently all IO APIC interrupts are configured at fixed delivery mode,
which is good for HEPT timer interrupt but it imposes burdens to
device drivers to properly handle the repeated interrupt sent to all
processors.
This patch makes it more flexible so that device drivers can specify
the delivery mode it desires in the IRQ connect APIs.
- Don't hard code IOAPIC_FIXED in z_ioapic_irq_set(), meaning the
IRQ delivery mode is passed in from the 'flags' argument and
individual device driver needs to choose delivery mode for its own
IO APIC interrupt.
- To support different delivery mode in different IO APIC interrupts,
need to save and restore RTE[10:8] during IOAPIC suspend and resume.
If device driver doesn't pass either IOAPIC_FIXED or IOAPIC_LOWEST
in IRQ_CONNECT()/irq_connect_dynamic() alike APIs, the delivery mode
bit fields in the target RTE register are '0' which implies fixed mode.
If the device driver wants the interrupt to be delivered to one CPU
only, it needs to explicitly specify IOAPIC_LOWEST in one of the IRQ
connect APIs.
Signed-off-by: Zide Chen <zide.chen@intel.com>
Currently IO APIC is working in physical destination mode, which
doesn't support interrupt to be delivered to multiple local APICs.
By definition only 4 bits [59:63] in IO APIC IOREDTBL register are
available for destination addresses and it contains an APIC ID only.
This patch changes it to logical destination mode so that IOREDTBL
can potentially define a set of processors and it's posible to deliver
interrupts to multiple APICs.
Signed-off-by: Zide Chen <zide.chen@intel.com>
If IO APIC is in logical destination mode, local APICs compare their
logical APIC ID defined in LDR (Logical Destination Register) with
the destination code sent with the interrupt to determine whether or not
to accept the incoming interrupt.
This patch programs LDR in xAPIC mode to support IO APIC logical mode.
The local APIC ID from local APIC ID register can't be used as the
'logical APIC ID' because LAPIC ID may not be consecutive numbers hence
it makes it impossible for LDR to encode 8 IDs within 8 bits.
This patch chooses 0 for BSP, and for APs, cpu_number which is the index
to x86_cpuboot[], which ultimately assigned in z_smp_init[].
Signed-off-by: Zide Chen <zide.chen@intel.com>
Swap this out and make the status a parameter.
Leave a couple of cases of DT_NODE_HAS_COMPAT().
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
These are redundantly checking a node's status twice.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.
Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.
To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:
- emit macros for all existing nodes in gen_defines.py, regardless
of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add API for recovering an I2C bus. This API can be used to recover
from situations where the I2C master and one or more I2C slaves are
out of synchronization (e.g. if the I2C master was reset in the middle
of an I2C transaction or if a noise pulse was induced on the SCL
line).
Fixes#23441.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The '_' is not necessary, plus it makes the sys init object name
aligning with all others.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
init_fn is not anymore part of struct device, so let's test instead the
driver's API structure pointer which is also unique per device driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
When the device driver model got introduced, there were no concept of
SYS_INIT() which can be seen as software service. These were introduced
afterwards and reusing the device infrastructure for simplicity.
However, it meant to allocate a bit too much for something that only
required an initialization function to be called at right time.
Thus refactoring the devices structures relevantly:
- introducing struct init_entry which is a generic init end-point
- struct deviceconfig is removed and struct device owns everything now.
- SYS_INIT() generates only a struct init_entry via calling
INIT_ENTRY_DEFINE()
- DEVICE_AND_API_INIT() generates a struct device and calls
INIT_ENTRY_DEFINE()
- init objects sections are in ROM
- device objects sections are in RAM (but will end up in ROM once they
will be 'constified')
It also generate a tiny memory gain on both ROM and RAM, which is nice.
Perhaps kernel/device.c could be renamed to something more relevant.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit adds support for receiveing data from ISO OUT endpoint
for NRF devices. NRF USB IP core does not generate IRQ when
data are received on ISO OUT endpoint and it must be synchronized
with SOF event.
Enable SOF handling by default if usb audio is configured
with NRF devices.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
By this commit exception for ISO endpoints is made when it comes
to its size. ISO endpoint buffer size for nrf devices is 1023 and
may be configured with variable length size. NRFX checks is size
is chosen accordingly and it is no reason to do it in SHIM.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Revise how the unusable memory area is treated.
Do not use SPI interface directly but ssd16xx_write_cmd().
This will allow a common SPI interface to be implemented
in the future.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
INLINE is a very common macro, just like MAX or MIN.
Defining it always can easily collide with libraries or
application headers.
And option would be to add a ifdef guard around it,
But it was used in only 1 place in Zephyr, instead
of keeping it just for that, remove it.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Changes:
- Added all required board files in /boards/arm/96b_aerocore2
- Modified pinmux for stm32f4
Most of the changes in this PR is based on reverse-engineering of the
PCB layout and following commits in the PX4 firmware repository for
the same board. The manufacturer does not provide and or generate
schematics and pinout tables for this board.
This PR includes almost all of the interfaces connected to the STM32
MCU, the only thing not included is the J9 and J8 headers that connect
to a 96Boards baseboard.
These headers are not vital to the functionality of the Aerocore2.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Update dtsi and pinmux macros for stm32f7 family. Add sdmmc1 to dts file
for stm32f746g_disco. Also add board specific configuration file for
fat_fs sample.
Signed-off-by: Helge Juul <helge@fastmail.com>
Update the dtsi for stm32l471 (which the higher SoCs are based on) to
support the stm32-sdmmc disk access device. Enable the device for the
stm32l496g_disco board, and update the pinmuxing.
Note that the stm32l496g_disco board also has a card detect gpio
(MFX_GPIO8), but this is not supported yet. When not specified the
driver will assume a card is present.
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
When MSI clock is used a source of PLL, it should be possible to
select its frequency range. Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update mbedTLS commit along with the following fixes:
* Fix naming inconsistencies in some cipher modes, to match core mbedTLS
configs
* Add Kconfig to enable CTR cipher mode
Fixes#22421
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
During communication initialisation, the IMSI of the inserted SIM
card is evaluated to determine the APN. This is done by comparing
the first 5 characters of the IMSI to a list of known providers.
The list can be given in Kconfig.
To enable this functionality, set following bool in Kconfig:
MODEM_UBLOX_SARA_AUTODETECT_APN
To set a list of providers, set following string:
MODEM_UBLOX_SARA_AUTODETECT_APN_PROFILES
If the provider can not be found in the list, the APN given in
following entry is used as a fallback:
MODEM_UBLOX_SARA_R4_APN
Signed-off-by: Hans Wilmers <hans@wilmers.no>
The modem type (Sara R410 or Sara U201) is detected automatically after
hardware initialisation of the modem. Further initialisation and
functionality is then chosen depending on the detected modem type.
To enable this functionality, set following bool in Kconfig:
MODEM_UBLOX_SARA_AUTODETECT_VARIANT
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Many chips have only one serial port. When the serial port is occupied
by other devices, there is a lack of a console to output debugging
information. Semihosting can provide a console. The disadvantage of
semihosting is that a debugger must be connected, so it can only be
used for online debugging.
Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add initial support for Decawave DW1000
IEEE 802.15.4-2011 UWB transceiver.
Driver has basic functionality. Additional functions such
as reading out timestamps and delayed TX were implemented
for test purposes, but also require support in the 802154
subsystem.
Register, sub-register, and defaults defines in the file
ieee802154_dw1000_regs.h are taken from the Decawave's
DW1000 driver for the Mynewt OS.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Add support for ADC on H7 series. Note that ADC1 and ADC2 share the same
register set, so it is added as "adc1_2".
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Like stm32 L4 does,
when the STM32WBx SoC goes into STOP mode, the SPI device is disabled.
This cause the pins to not be drived anymore (i.e. they are floating)
except through their pull-up or pull-down.
From the logical point of view, the NSS pin is held high by a pull-up
so it's not a problem if the other pins are floating. However those pins
are floating input for the slaves, which increase their power
consumption.
The solution is to hold the state of the pins through a pull-up or a
pull-down. This is already done for the NSS and MOSI pins, but not for
SCK. Fix that by using pull-down on the SCK pin the same way it is
already done for the MOSI pin.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Convert i2s_sam_ssc driver to utilize devicetree. We replace Kconfig
options for specifying the DMA configuration (channel, DMA device name)
with getting that from devicetree. We also get pincfg from devicetree,
however we still have Kconfig sybmols to specify if the RF or RK pin is
enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert sam_xdmac driver to utilize devicetree. As part of the
controller binding we specify that dmas should contain a channel and the
perid for the DMA transaction.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The conversion in 9b096f40b6 left out a
few tidbits that were not converted properly. Complete the conversion
properly.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Remove semicolon between instance invocations of DT_FOREACH_IMPL_ and
thus DT_INST_FOREACH. This provides more flexibility to the user. This
requires we fixup in tree users to add semicolon where needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
MCHP Soc operation uses clear-on-write register for interrupt
status, read-OR-write operation may clear interrupts unintentional.
Fixes#24464
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Attached Flexcomm SPI driver to the main clock used by the core.
This means setting the SPI clock the same value as the core clock.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This fixes some cases where an integer timeout received as a parameter
was not converted to a timeout before being used in standard API.
Changes to the POSIX library were not included as that's being
reworked in a separate PR.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The DS3231 is an I2C real-time clock with internal temperature
compensated oscillator, maintaining civil time to 1 s precision with
nominal 2 ppm accuracy from 0-40 Cel.
The basic functionality is exposed as a counter that is always running
at 1 Hz. Much more functionality is exposed as driver-specific API,
including the ability to translate between the time scale of the DS3231
and the time scale of the Zephyr uptime clock. This allows correlation
of events in the system clock to UTC, TAI, or whatever time scale is
used to maintain the DS3231.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add a driver that can handle several instances of AT45 family chips,
which are enabled by specifying DT nodes for them with the "compatible"
property set to "atmel,at45" and other required properties like JEDEC
ID, chip capacity, block and page size etc. configured accordingly.
The driver is only capable of using "power of 2" binary page sizes in
those chips and at initialization configures them to work in that mode
(unless it is already done).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
referring the ARM's Systick driver, we did the following improvements:
* use 31 bits of 32-bit counter to avoid the rare but possible
overflow of elapsed(). If 32 bits val are used, elpased() may
return a wrong value. then wrong HW cycles.
* two ways to update the correct cycles
- through systick timer irq
- when systick timer irq cann't be handled because of irq
locked/disabled, call z_timer_cycle_get_32->elapsed to update
the correct cylces. no more than one counter-wrap is allowed.
* if elapsed() is not called too long (more than one counter-wrap) from
systick tiemr irq or from z_timer_cycle_get_32. The lost of HW cycles
is unavoidable.
* some detailed discussion can be found in #24332
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Fix use of DT_HAS_DRV_INST which does not exist.
Use DT_HAS_NODE_STATUS_OKAY(DT_DRV_INST(n)) instead.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Provide basic commands that are useful when testing a LoRa
radio. Currently, the shell supports:
> lora conf ...
> lora send ...
> lora recv ...
> lora test_cw ...
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Add an API to transmit a continuous wave at a fixed frequency. This
functionality is useful to test the radio in a lab setup.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Add basic driver for GIC V3 interrupt controller.
This implementation supports
- distributor, re-distributor and cpu interface initialization
- configuration and handling of SPI, PPI and SGI.
- V2 Legacy mode is not supported and uses system interface.
Current implementation supports GIC secure state only.
All interrupts are routed to Secure EL1 as 'irq' by configuring
them as Group1 Secure.
TODO:
- MPIDR based affinity routing setting.
- percpu redistributor probe
- message based SPI and SGI generation api
- EL1NS support. Legacy mode support.
- LPI/ITS is not supported.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Port the I2S and DMIC drivers to the new timeout API so that they do
not need to enable legacy timeouts.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
As we phase out per instance Kconfig symbols convert to utilize
DT_DRV_INST to initialize CAN instances.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As we phase out per instance Kconfig symbols convert to utilize
DT_DRV_INST to initialize CAN instances.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a build-time assert to check that the configured SHM_SIZE
does not exceed the memory allocated as shared memory. USe DT
to extract the shared memory size.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The sam0 has a page size of 64 bytes, making it incompatible with
the nvs driver that specifies a maximum write block size of
32 bytes. When CONFIG_SOC_FLASH_SAM0_EMULATE_BYTE_PAGES is set,
it should report a write block size of 1 byte, which is compatible
with nvs.
Signed-off-by: Adam Serbinski <aserbinski@gmail.com>
The dpd-wake-sequence has a value that is an array of three integers,
which was formerly indexed by a suffix on the property name. This was
updated to new accessors but failed to separate the index from the
property name. Update the access idiom.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Convert to using DT_INST_LABEL() in the dma driver and convert dma users
to use the DMA property macros to get the dma controller name. We make
the assumption in the drivers that there is a single DMA controller
instance.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Had an extra comma between macro and macro usage that casued the
following compile error:
adc_shell.c:477:22: error: expected expression before ',' token
Easy fix to remove trailing comma in ADC_SHELL_COMMAND
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Clean up as we wish to move away from using these Kconfig settings.
Also removing them from the boards' default config.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Make drivers multi-instance wherever possible using DT_INST_FOREACH.
This allows removing DT_HAS_DRV_INST in favor of making drivers just
do the right thing regardless of how many instances there are.
There are a few exceptions:
- SoC drivers which use CMake input files (like i2c_dw.c) or otherwise
would require more time to convert than I have at the moment. For the
sake of expediency, just inline the DT_HAS_DRV_INST expansion for
now in these cases.
- SoC drivers which are explicitly single-instance (like the nRF SAADC
driver). Again for the sake of expediency, drop a BUILD_ASSERT in
those cases to make sure the assumption that all supported SoCs have
at most one available instance is valid, failing fast otherwise.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The TPM (Timer/PWM Module) is a 2- to 8-channel timer which supports
input capture, output compare, and the generation of PWM signals to
control electric motor and power management applications.
This patch adds the driver and the binding necessary for instantiating
the driver. The work is based on the RV32M1 driver for TPM done by
Henrik Brix Andersen. A later patch will enable this driver to be used
for the KW41Z SoC, if PWM support is requested.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
* Define USB driver for base stm32wb device.
* Enable USB for the nucleo_wb55rg board.
* Properly initialize USB power + clock for the platform.
Signed-off-by: Pete Johanson <peter@peterjohanson.com>
Use the endop bit in the status register (instead of using a k_sleep)
to wait until the current shub operation is completed.
Please note that the recent changes to k_sleep() API was also
breaking the compilation.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear. As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert all canbus related API/samples/tests/subsys
to the new timeout API with k_timeout_t.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
We can utilize the devicetree macros to determine which instances to
enable. This will allow us to phase out the per instance Kconfig
symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This reverts commit 90cc723e65.
Using `DMAC_CHCTRLA_TRIGACT_BLOCK` breaks SERCOM UART peripheral DMA
operations (DMA-based asynchronous UART transmit operation only sends
the first byte and does not proceed any further).
The `DMAC_CHCTRLA_TRIGACT_BURST` with `DMAC_CHCTRLA_BURSTLEN(0)` is a
special case utilising the "internal FIFO", according to the datasheet
(see DS60001507E; 22.6.2.8), and should always be specified for
peripheral data transfer operations.
Also it is worth noting that Atmel and other third-party drivers use
the aforementioned "internal FIFO" configuration for peripheral data
transfers as well.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The channel direction for a V1 DMA is not allowed to be memory to memory
and there is a check in place for this. However, the check is being
performed on the stream prior to actually configuring the stream. This
results in the check always failing regardless of the channel direction.
The check has been modified to be performed on the incoming
configuration.
Signed-off-by: Abe Kohandel <abe@electronshepherds.com>
Fix I2C bit banging REPEATED START condition function by ensuring both
SDA and SCL are high before generating the REPEATED START.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix I2C bit banging STOP condition function to not create a stray
START condition if SDA is high on entry. Instead, set SDA to LOW
before generating the STOP condition.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This patch prepares the dma and introduces the dmamux on soc series
which supports this feature for memory/periph transfers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix some wrong assignments for SPI2 and add all other alternative
functions for USART, I2C, SPI and CAN according to STM32F091VC
datasheet, which is at the top end of this series.
https://www.st.com/resource/en/datasheet/stm32f091vc.pdf
Signed-off-by: Martin Jäger <martin@libre.solar>
Following other drivers, Kconfig based instances are now entirely
removed. In order to do this change, PWM nodes in board DT files have
been given a pwm{N} label so that both:
- DT API checks such as #if DT_HAS_NODE(DT_NODELABEL(pwmN)) can be
used (N being PWM instance number).
- DT references can be written as pwms = <&pwmN x y>; instead of
pwms = <&{/soc/timers@XXXXXXXX/pwm} x y>;
This approach is also used on the Linux Kernel.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Convert the GPIO bit banging I2C controller driver to use devicetree
bindings for configuring instances.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The optimisation in `spi_sam0_fast_txrx()` is broken, loading
two bytes into the `DATA` register in rapid succession will lose
one byte.
This can be observed by running `tests/drivers/spi/spi_loopback`.
The test will get stuck in `spi_sam0_fast_txrx()` forever waiting
for the final byte.
Undo this small optimisation and only load the next byte into the
`DATA` register after the response has been received.
This fixes `tests/drivers/spi/spi_loopback`.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Move to using NODELABEL references to enable driver instances for
PWM0..3. This will allow us to remove per-instance PWM Kconfig symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The PS/2 driver was enabled with a single mouse and kb brand.
However, when plugging other mice brands, the interaction between the
driver and the device(mouse) was broken. A delay after inhibithing
the PS/2 instance helped the internal FSM to start the TX process.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Get rid of legacy timeout API and move to new timeout API for LoRa.
This involves changes to API, SX1276 driver and sample application.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The LoRa APIs are expected to undergo some change as the usecase get's
increased. So let's mark it as experimental until the APIs got
stabililized.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The RTC/Counter implementation doesn't fit for the upcoming LoRaWAN
as most of the Counter drivers in Zephyr works with 1s granularity
which is not enough for LoRaWAN stack. So, k_timer calls are used in
place of Counter's alarm and k_uptime_get() APIs are used in place of
Counter's time keeping.
While at it, lets also fixup the broken alarm implementation.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reworked sam_gmac driver to get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from soc_pinmap.h that are no longer needed due to
getting all that information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The DMA callback function now controls the tx or rx buffers
and reload dma in case of multiple trnasfer before the transfer ends
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Enable dma operations with or w/o a dmamux on STM32
for SPI periph/memory operations.
Use the pi dma client with dma macros
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch is disabling the dma channel before reloading
source and dest for memory and peripheral addresses
Then the channel is enabled to re-launch the transfer.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Replace having dts_fixup.h files define DT_ADC_{0..2}_NAME with using
the new devicetree.h macros. We test to see what driver compat is
enabled via DT_HAS_COMPAT and set DT_DRV_COMPAT to that compat. Than we
can utilize the DT_INST_LABEL() macro to extract the name of the device.
We also replace the Kconfig ADC_{0..2} symbols with DT_HAS_DRV_INST.
This will allow us to remove those Kconfig symbols as this was the only
usage.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We want to limit DT_ prefix to macros from devicetree.h and generation.
So rename DT_USB* to just USB*.
Also fixup how USB_MAXIMUM_SPEED was defined. We should only define it
if the property exists.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Substitute integral constants where call sites passed named constants
that have timeout values as arguments to parameters that expect
millisecond durations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Do not assume in the SoC level device trees that NXP Kinetis FlexTimer
nodes will always be configured as PWM. Instead, configure FlexTimer
nodes for PWM at the board level for NXP Kinetis boards.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The goto instruction was removed when adding the RX thread.
While still working, this clearly break the clean handling of
error cases.
Re-instantiate the goto instruction.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
ipm_busy is meant to be used as mutex on transport layer accesses.
Due to wrong configuration on rx_thread, imp_busy was a no-op.
Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
