Add the config to support that warning message time
interval can be set.
We also find that printing all the warning messages
takes about 50ms on Chromebook. Therefore, we increase
the default time to 100ms to leave some time for EC to run
non-print instructions.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
The WWDT callback is only invoked from the warning interrupt path.
If CONFIG_WDT_MCUX_WWDT_WARNING_INTERRUPT_CFG is 0, the warning
interrupt is effectively disabled, so a configured callback would
never fire.
Return -ENOTSUP and log an error when a callback is provided
without enabling the warning interrupt, to avoid a silent no-op.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Correct the WWDT window value calculation and add proper
range validation.
The window value was incorrectly set to the minimum timeout value.
Per hardware specification, it should be calculated as:
windowValue = timeoutValue - min_window_ticks
Also add:
- MAX_TIMEOUT boundary checks
- Validation before value assignment
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Drop cat1 from the binding files to enable reuse by other
category devices as well.
Fixes#99174
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.
Duplicates inside different #ifdef branches are preserved
as they may be intentional.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Most of Espressif drivers ISRs are already running in IRAM area, except
those in this PR. Move ISRs accordingly so we avoid any
interrupt miss when cache is disabled.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
In install timeout api, the cfg parameter does not make sense to cop, we
can ignore it rather than return an error code to keep forward
compatibility.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Add the support of the IWDG early wakeup.
Gives the possibility for the user to set a
callback that will be called before an IWDG reset.
Signed-off-by: Julien Racki <julien.racki-ext@st.com>
According to API docs, wdt_disable() should return
EFAULT when called too early. Adjusted driver.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Enable clock control by default for siwx91x SoCs. Moreover, most
drivers for siwx91x soc depend on clock control, but didn't declare
it.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
The watchdog timer on SiWx91x devices is designed to
pause during deep-sleep and resume after wakeup.
However, an incorrect check in`wdt_setup` was
preventing this intended behavior. This patch removes
the check, restoring the correct pause-in-sleep
functionality.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
NuMaker watchdog control register is write-once after power-on
or reset. Thus, the control registeris written in the setup
function and the disable function only disables IRQ.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
On STM boards without an FPU (like nucleo_f091rc) the WWDG driver
requires 4K more of flash than the IWDG due to the use of floating
point math. Fixed it by refactoring to use integer math.
Reduced sample build ROM size from 24848 B to 21620 B on
nucleo_f091rc.
Signed-off-by: James Torres <jamesktorres2022@gmail.com>
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Use the "zephyr-keep-sorted-start/stop" comment to have CI check
the alphabetical order of includes, to help reducing the chance
of conflicts while contributing drivers.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Use STM32_CLOCK_INFO(), STM32_DT_INST_CLOCK_INFO(),
STM32_CLOCK_INFO_BY_NAME() and STM32_DT_INST_CLOCK_INFO_BY_NAME()
helper macros in STM32 drivers.
Using these macros ensure the clock division factor is properly
populated according to DT information. Prior these changes some
drivers only got the bus and bits position information and missed
the clock division information which is fine only when this division
factor information is 0.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
The Kconfig symbols for selecting HAL content should be part
of the HAL module integration, not defined by the SoC. Split the
symbols between the Series 0/1 Gecko HAL and Series 2 SiSDK HAL
when moving them.
For now, the Series 0/1 HAL symbols retain their name, while new
names consistent with the symbols already defined in the module
integration layer are used for the Series 2 HAL.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add Watchdog driver support for Renesas RZ/A3UL, N2L, T2M
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
On i.MX 93 platform, no need to clear interrupt flags, otherwise it
will not trigger reset.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Joe Zhou <zhongcai.zhou@nxp.com>
The IWDG4 is on the APB3 bus on STM32MP2x SoCs. When the system is
in debug mode, the watchdog should be frozen to prevent it from
expiring and resetting the system during debugging sessions.
Signed-off-by: Luc BEAUFILS <luc.beaufils@savoirfairelinux.com>
Like the H7x series, the MP2x series has a WWDG1 peripheral in the APB3
bus. The MP2 has the same LL function to freeze the watchdog in debug
mode.
Signed-off-by: Luc BEAUFILS <luc.beaufils@savoirfairelinux.com>
Properly return the correct error codes when the watchdog API
is misused. Fail timeout install if WDT_FLAG_RESET_CPU_CORE is
set, a watchdog reset will at a minimum cause a soft reset of
the entire SoC.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
emw clk designed on RT1180 can be chosen by CLKCTRL register,
add code to get sel from dts and configure it in driver.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
The p_context no longer has the const type, so all
Renesas-supported drivers need to be updated accordingly.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Turn MCX series into families.
Reasoning:
1. The MCX SOCs are quite different from each other and having them all
under one family in the HWMv2 hierarchy is fruitless because there
are so many differences that it is confusing to try to introduce
family-level code and configs since they would each only apply to a
subset of the series. There is almost nothing that can be shared
between all of them. Which is why there are comments in the MCX
family files saying not to put anything in them. This is a technical
waste.
2. Therefore, turning all of them into families is almost 0 effort and
makes sense. It will allow these different types of MCX to be
further subdivided into series in the future as the MCX portfolio
expands and such division will be necessary as new SOCs within each
letter family are released.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Xilinx Window Watchdog driver uses window watchdog mode. Window watchdog
timer(WWDT) contains closed(first) and open(second) window with 32bit
width each. Write to the watchdog timer within predefined window periods
of time. This means a period that is not too soon and a period that is
not too late. The WWDT has to be restarted within the open window time.
If the software tries to restart WWDT outside of open window time
period, it generates a SoC reset.
Signed-off-by: Harini T <harini.t@amd.com>
When WDT_OPT_PAUSE_IN_SLEEP option is passed in set enableWait flag
in addition to the enableStop.
Fixes#86437
Signed-off-by: David Leach <david.leach@nxp.com>
