The IWDG4 is on the APB3 bus on STM32MP2x SoCs. When the system is
in debug mode, the watchdog should be frozen to prevent it from
expiring and resetting the system during debugging sessions.
Signed-off-by: Luc BEAUFILS <luc.beaufils@savoirfairelinux.com>
Like the H7x series, the MP2x series has a WWDG1 peripheral in the APB3
bus. The MP2 has the same LL function to freeze the watchdog in debug
mode.
Signed-off-by: Luc BEAUFILS <luc.beaufils@savoirfairelinux.com>
Properly return the correct error codes when the watchdog API
is misused. Fail timeout install if WDT_FLAG_RESET_CPU_CORE is
set, a watchdog reset will at a minimum cause a soft reset of
the entire SoC.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
emw clk designed on RT1180 can be chosen by CLKCTRL register,
add code to get sel from dts and configure it in driver.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
The p_context no longer has the const type, so all
Renesas-supported drivers need to be updated accordingly.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Turn MCX series into families.
Reasoning:
1. The MCX SOCs are quite different from each other and having them all
under one family in the HWMv2 hierarchy is fruitless because there
are so many differences that it is confusing to try to introduce
family-level code and configs since they would each only apply to a
subset of the series. There is almost nothing that can be shared
between all of them. Which is why there are comments in the MCX
family files saying not to put anything in them. This is a technical
waste.
2. Therefore, turning all of them into families is almost 0 effort and
makes sense. It will allow these different types of MCX to be
further subdivided into series in the future as the MCX portfolio
expands and such division will be necessary as new SOCs within each
letter family are released.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Xilinx Window Watchdog driver uses window watchdog mode. Window watchdog
timer(WWDT) contains closed(first) and open(second) window with 32bit
width each. Write to the watchdog timer within predefined window periods
of time. This means a period that is not too soon and a period that is
not too late. The WWDT has to be restarted within the open window time.
If the software tries to restart WWDT outside of open window time
period, it generates a SoC reset.
Signed-off-by: Harini T <harini.t@amd.com>
When WDT_OPT_PAUSE_IN_SLEEP option is passed in set enableWait flag
in addition to the enableStop.
Fixes#86437
Signed-off-by: David Leach <david.leach@nxp.com>
Add support for nPM1304 in the npm13xx drivers. The nPM1304 supports
different voltage and current ranges which are handled through the
initialization macros.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Rename npm1300 to npm13xx in function names, documentation, etc. where
applicable for all the npm13xx drivers
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Rename npm1300 drivers and header files to npm13xx to allow for usage
with other nPM13xx product variants.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Current ESP32 clock system is mixed with RTC labeling/registers,
but it doesn't implement a real-time clock (RTC) driver.
To avoid confusion and allow adding a proper RTC driver later,
this commit renames the existing RTC interface to CLOCK and make
it as a subsystem without any peripheral attached to it.
This better reflects its actual purpose as a general clock controller.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Enables sleep mode (PM3) on RW61x. The driver
re-enables the wdt on wake-up based on the previous
configuration. Note that the wdt counter value always
resets to the max window value on wake-up
Signed-off-by: Alex Rodriguez <alejandro.rodriguezlimon@nxp.com>
This commit changes clock property of watchdog to optional and updates
driver according to this change.
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add support for the STM32WB0 series to the existing STM32 driver for
Independent Watchdog peripheral.
NOTE: this commit only includes basic support for the watchdog.
STM32WB0 specificities such as the different possible clock sources, LSI
frequency measurement or window support are left for future implementation.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Reset the watchdog back to the initial state before enabling the
expiry interrupt. This prevents the watchdog expiring immediately if
there is a long gap between `wdt_install_timeout` and `wdt_setup`.
Signed-off-by: Jordan Yates <jordan@embeint.com>
default watchdog initialization disable counting in EM1, EM2 and EM3
modes. If user use the WDT_OPT_PAUSE_IN_SLEEP flag via the watchdog api,
all 3 EM modes must take this flag into account to avoid wdt count
being frozen if we don't want to.
Signed-off-by: Adrien MARTIN <adrienmar@kickmaker.net>
The correct procedure to reload the T0 timer is:
1. Load TWDT0 register with the new value or write 1 to RST bit in
T0CSR register to load the old value.
2. Wait until RST bit in T0CSR register becomes 1.
3. Wait until RST bit in T0CSR register becomes 0.
The current watchdog driver misses step 2.
Fix the issue in this commit.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Introduce sam4l watchdog configuration. This entry is necessary to
select proper watchdog configuration at board init due to #83429.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
In order to ensure that watchdog channels are freed in proper
driver state, synchronization in form of simple loop needs
to be added after stopping. In no irq variant, it is already done
on nrfx level. NRFY function can be replaced by NRFX one in
the future.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Move the instance pointer, which is a constant value, into a dedicated
config structure. At the same time, remove the type casting macros as
this pattern has been removed from the tree for some years now.
Signed-off-by: Jordan Yates <jordan@embeint.com>
The STM32 IWDG is a single channel watchdog, and therefore should be
returning `-ENOMEM` when a user attempt to install additional timeouts,
instead of overwriting previous values.
Signed-off-by: Jordan Yates <jordan@embeint.com>
