Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Selection of the LF clock source for the GRTC should be performed
as early as possible, before starting GRTC.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Converting absolute system ticks to GRTC ticks is simple and algorithm
can be simplified. Legacy algorithm was copied from nrf_rtc_timer which
back then was working on 32 bits only.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Convert z_clock_hw_cycles_per_sec to unsigned int to increase
supported frequency range.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Add ULP Coprocessor board support for C6.
This requires a change in the board qualifier depending on the build
target.
Update esp32c6 overlay and configuration files to the proper name.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Remove deprecated nxp,kinetis-lptmr compatible string
which is superseded by nxp,lptmr compatible due to
removing family specific name.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
These socs were missing a config line to disable SYSTICK if the LPTMR is
configured for the system timer, similar to how other SOCs do this for
alternative system timers than systick.
This fixes build errors in the case where that lptmr kconfig is enabled.
Also, the LPTMR kconfig should be default no because it is a secondary
option for the system timer, being lower resolution than systick. This
also resolves build errors.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
In the case where more than a full tick was unannounced when
sys_clock_set_timeout() was called, the timer driver would
subtract it from the next timeout. However, this is already
done by the caller through the elapsed() function in timeout.c,
leading to the timer interrupt firing too early.
With this fix, SYS_CLOCK_TICKS_PER_SEC can be increased to the
full speed of the low frequency timer. The underlying sleeptimer
API must be called with a timeout of at least 1, and will if needed
increase the value to the minimum value required by the hardware.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Introduces the Z_IS_TIMEOUT_RELATIVE() macro to help ensure that
checking for relative/absolute timeouts is consistent. Using this
macro also helps ensure that we get the correct behavior when using
32-bit timeouts (CONFIG_TIMEOUT_64BIT=n).
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Do not start the LF clock unless CONFIG_CLOCK_CONTROL_NRF is enabled.
This is similar to how it's done in Nordic's GRTC driver.
Authored-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Correct the introduction comment, removing the native_posix mention,
and something which did not apply for several years.
Also remove an unnecessary include.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Including renaming the kconfig option
NATIVE_POSIX_TIMER into NATIVE_SIM_TIMER deprecating the first one.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Now that native_posix has been removed, this driver only needs to
support native_sim. Let's stop using the transitional headers which
supported both.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Modify the Cortex-M SysTick driver to work when the SoC resets SysTick
in low-power mode. This adds an invisible Kconfig symbol that must be
selected by SoCs with such behavior.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Add support for a hook-based low-power mode timer to the Cortex-M SysTick
driver, in addition to the existing Counter API-based timer. This is useful
on platforms such as the STM32WB0 where the wake-up timer is too limited
for a Counter API driver to be implemented on top of it.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
The Cortex-M SysTick supported collaboration with a so-called "IDLE timer"
to work even in low-power modes, when the SoC may disable its clock.
Rename "IDLE timer" to "low-power mode timer" to better reflect what this
timer is used for, and transform the single option into a Kconfig choice
to allow other behaviors to be implemented and chosen.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Map the timer register space using DEVICE_MMIO_NAMED_MAP so if the MMU
is enabled, the register space is mapped correctly in the virtual
memory.
Signed-off-by: Abe Kohandel <abe.kohandel@gmail.com>
1. The sys_clock_idle_exit function could be invoked multiple
times. Hence add code so that is counter is stopped and the
OS Timer is initialized once.
2. Reset the OS Timer when exiting low power modes where
the OS Timer loses its state
3. Improve the cycles conversion algorithm. Round to the nearest
microsecond when converting from ticks to microsecond rather
than always rounding up to the next highest value.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add properties to differentiate the timer counter operating modes. This
properties are necessary to spetialize the driver to be used as a normal
16/32-bit counter or to provide the clock/calendar functions.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Fixes a multitude of Kconfigs that wrongly appear on devices
where support is literally impossible
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit replaces a bunch of ifdefs and bindings with a single
extensible binding, and makes all standard mtime system timers consistent.
Signed-off-by: Camille BAUD <mail@massdriver.space>
Use hardware clock frequency to calculate watchdog expire ticks
instead of kernel's "ticks".
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Command "waitms 50" on ChromeBook EC console, then it will crash EC.
Because arch_busy_wait() is re-entried by two different tasks,
the second calling will reset the timer and may cause the first
calling to fail to reach the waiting destination
(if the first calling's wait time is longer enough).
Verified by follow test pattern:
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_api
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_error_case
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_monotonic
west build -p auto -b it8xxx2_evb tests/kernel/timer/starve
west build -p auto -b it8xxx2_evb tests/kernel/context
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
apx needs to set compare b due to errata of XTAL glitch
ap4p needs to set minimum delta to 4
err026 requires XTAL to not be switched off/on when resetting
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Originally, when the timer's source clock is 32.768 kHz, the timer driver
uses two consecutive reads to ensure the timer reading is correct.
However, it is not robust enough due to an asynchronous timing issue in
the chip. The workaround is to add at least two NOPs between the
LDR and CMP instructions. This commit implements the workaround in the
assembly code to ensure it is not affected by the compiler toolchain
or optimization flags.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Add Zephyr support for the Audio DSP on the MT8196 SOC. This is a
very similar device to previous designs. Most of this patch is just
DTS.
The biggest delta is the more complicated second level interrupt
controller, though it is still able to be represented using some
vaguely clever DTS config over the older intc_mtk_adsp driver.
Also the memory layout is slightly different, requiring a little
indirection to set the initial boot stack address and log output
buffer. And the timer "irq_ack" register bits moved.
Signed-off-by: Andy Ross <andyross@google.com>
The timer count calculations are done with the assumption that the
prescalar is disabled. When using u-boot's SPL as an early boot stage,
the omap timer driver enables the prescalar leaving this driver to
calculate incorrect counts. So explicitly disable the prescalar to match
the driver expectation.
Signed-off-by: Abe Kohandel <abe.kohandel@gmail.com>
This commit adds the systick driver for WCH CH32V003.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
