Refactor the nrf_spim device driver to share the common code between
the nrf_spim_rtio implementation.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Move the private spi_rtio.h header from the public path
include/zephyr/drivers/spi/rtio.h
the the private path
drivers/spi/spi_rtio.h
and update drivers to include it using a relative path.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
After #99399 the workaround for errata 58 in nRF52 chips is removed from
zephyr RTOS and is now part of the nrfx sdk. The initial glue code
between zephyr->nrfx 4.0.0 missed the initializatio of the errata 58
workaround. This commit adds the initialization to the glue code. Given
the errata only applies to nRF52 chips, is safe to assume there is a
single GPIOTE instance present.
Signed-off-by: Jose Morales <josfemova@gmail.com>
Update driver to follow this, stated in the documentation of the
spi_context_release: "appropriate time to call this would be at the
end of a transfer that was initiated by a transceive API call, except
in the case that the SPI_LOCK_ON bit was set"
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The SPI loopback test suite passes up transfers nop and null buffers
to the device drivers, expecting them to return early with -EINVAL
or -ENOTSUP, before setting the CS pins. Currently the NRFX based
nRF SPIM device driver sets CS unconditionally, without checking
the buffers, resulting in no transfer while toggling CS.
Add a check of the provided buffers in the transceive() function and
return early if buffers are invalid (result in 0 lenght transfer).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Use NRF_DT_INST_IRQ_ macros which support building with and without
SW ISR table for all nordic socs.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Fixes an issue with an unused function being defined if
CONFIG_DEVICE_DEINIT_SUPPORT was disabled
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Release the PM constraint at the end of the context in which it was
requested (`transceive`), instead of in a semi-related function
(`finalize_spi_transaction`) which is also called by other API functions
(`spi_release`). Asynchronous usage is released in the transaction
complete callback.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Remove the handling of cross domain pins from nrf drivers. To use
cross domain in tests, force on constlat and disable power domains
for the test.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Clocks are requested automatically by hardware on the nRF54H.
Remove additional handling from device drivers, and disable
the now unmanaged clocks in the devicetree.
Updates:
- can_nrf
- counter_nrfx_timer
- uart_nrfx_uarte
- spi_nrfx_spim
- spi_nrfx_spis
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Without this check, `spi_context_unlock_unconditionally()` is capable
to release the SPI bus semaphore (ctx->lock) which might be taken by
another SPI slave device in the meantime.
Actually, this race condition happens when `spi_release()` is called
when the SPI slave device in question (spi_cfg) has already released
its chip select and also the SPI bus lock semaphore.
So, any not required call of `spi_release()` may result in a SPI
communication issue where the SPI bus lock, held by another SPI
slave device, is prematurely released.
The observable result is the simultaneous engagement of two SPI
chip selects after such an SPI release call.
Signed-off-by: Stefan Schwendeler <Stefan.Schwendeler@husqvarnagroup.com>
Some nRF SoCs (i.e. nRF54H20) can peform DMA transfers
only from specific memory regions - `dmm` facilitates that.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Transition nrf54h away from the soc specific gpd
(global power domain) driver which mixed power domains, pinctrl
and gpio pin retention into a non scalable solution, forcing soc
specific logic to bleed into nrf drivers.
The new solution uses zephyrs PM_DEVICE based power domains to
properly model the hardware layout of device and pin power domains,
and moves pin retention logic out of drivers into pinctrl and
gpio, which are the components which manage pins (pads).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add build asserts for "memory-regions" property in nrf drivers which is
required on targets with DMM for saadc, pdm, pwm, twim, twim_rtio, twis,
tdm, uarte, spim and spis. On targets where the property is not required
the assertion macro expands to nothing.
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
SPI(M/S)20 and SPIM(M/S)21 instances enable usage of pins on different
port, but require request for constant latency mode. Added
handling of such scenario in the driver. Added testcase
to cover it.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Configure the initial pin state of the SPIM peripheral to SLEEP, not
DEFAULT. This fixes the pins being configured in DEFAULT until the first
time the interface is used if `zephyr,pm-device-runtime-auto` is
enabled.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Currently there is a mismatch between the naming of the hardware and
the drivers targetting the hardware. nrf2_ is used instead of
the actual bindings names, like nrf2_audiopll instead of
nrfs_audiopll. This makes it hard to map drivers to the hardware
they are targetting.
There is historical reason for some of this, namely the same binding
name was used for different hardware, which is why nrf2_ was used
on newer platforms. This is no longer the case though, so drivers
and configs can be named according to the hardware without conflict.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
To determine whether device runtime PM is enabled on a device, use
`pm_device_runtime_is_enabled`. This results in the same behaviour when
`CONFIG_PM_DEVICE_RUNTIME=n`, but properly controls the clocks on a
per-instance basis when `CONFIG_PM_DEVICE_RUNTIME=y`.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This is a follow-up to commit a068709171.
As the SPIM_REQUESTS_CLOCK() macro changed the type of its parameter,
all of the calls to it need to be updated accordingly. Also the call to
DT_NODELABEL() needs to be removed from that macro as DT_CLOCKS_CTLR()
already returns a node identifier.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Replace semaphores with proper atomic flags when used without
multithreading enabled.
Signed-off-by: Michal Kozikowski <michal.kozikowski@nordicsemi.no>
The nrxf_spim driver currently resumes itself for the duration of
a transfer, however, in case SPI_LOCK_ON is used, the driver needs
to keep itself resumed until spi_release() is called. Currently,
this results in unbalanced suspend as the bus puts itself both
after transaction is done, and when spi_release() is called.
This patch makes the driver check if SPI_LOCK_ON is set once
transaction is complete, if yes, selv get one more time to
account for the two puts which will follow.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
In case the SPI transaction has SPI_HOLD_ON_CS set, we need to keep
SPI resumed until spi_release() is called. This is required as we
now need to keep the CS GPIO port resumed until transaction is
complete.
Suspending CS GPIO is not allowed from ISR in some cases (H20 fast
GPIO instance) so we have to defer CS GPIO suspend to some thread
context (put_async or spi_release()).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Implement calling spi_context_cs_get_all() and
spi_context_cs_put_all() in line with pm resume/suspend.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add FOREACH macro which iterates over all SPIM instances and creates
device instances for each enabled instance.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add compile time detection if fast SPIM instances are used
and system managed device PM is enabled. This configuration is
not supported.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Fixes a bug in nrfx spi when used in modes where only MOSI is needed such
as driving a WS2812. In this mode NRFX_ASSERT() is triggered when sck pin
is configured as no-connect.
Signed-off-by: Anthony Williams <anthony289478@gmail.com>
Fast SPIM instances (SPIM120 and SPIM121) for correct operation require
the highest frequency from the global HSFLL. This commit adds needed
clock controller requests to the driver. When the runtime device power
management is enabled, the frequency is requested as long as the SPIM
is resumed, otherwise it is requested for the duration of transfers.
This commit also adds a missing call to `pm_device_runtime_put()` when
SPIM reconfiguration fails.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable the device runtime power management on the SPIM shim.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
If CONFIG_SPI_STATS is enabled, the device state for all SPI controller
drivers must contain the SPI stats. This space is allocated by calling
Z_SPI_INIT_FN as part of the device definition; this is done automatically
when using SPI_DEVICE_DT_DEFINE instead of DEVICE_DT_DEFINE. If space for
statistics is not properly allocated but CONFIG_SPI_STATS is enabled, an
unexpected write to memory outside of the stats region may occur on a SPI
transfer. This commit uses SPI_DEVICE_DT_DEFINE or
SPI_DEVICE_DT_INST_DEFINE for all in-tree SPI controller drivers.
Signed-off-by: Dane Wagner <dane.wagner@gmail.com>
SPIM12x instances can perform DMA only from memory region
that is cacheable by default.
SPIM12x instances pins are configured via CTRLSEL mechanism,
which prevents the GPIO registers from ensuring correct bus
state when peripheral does not drive the bus lines.
External configuration of SPIM12x ENABLE register fixes this issue.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Chip Select signal must be deactivated only after transaction
is finalized. In async case this means it cannot be done from
`transceive` call context, as this context is left as soon as
transfer is initialized.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
... so that it is possible to use a GPIO expander pin as the CS line.
Communication with the expander may involve an operation that cannot
be done from the interrupt context (e.g. an I2C transaction).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Updated API version enables multi-instance GPIOTE driver.
Additionally obsolete symbol that was used to specify
API version in the past was removed.
Affected drivers have been adjusted and appropriate changes
in affected files have been made.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
This patch adds support for RX buffer placed by a linker in
memory region defined in SPIM devicetree node. The buffer is placed
in memory region defined as devicetree node. The memory region node's
reference is then stored in `memory-regions` property of SPIM node.
Added build time assertion to check if `CONFIG_SPI_NRFX_RAM_BUFFER_SIZE`
Kconfig symbol has value greater than 0 when given SPIM node has
`memory-region` property.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This check has to be done independent of whether RAM is used for buffers
or not and depends on device maximum length property.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Instead of assuming only RAM is accessible by EasyDMA, use the generic
DMA accessible function.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Some targets may not have `NRF_SPIM_HAS_32_MHZ_FREQ` or
`NRF_SPIM_HAS_16_MHZ_FREQ` symbols but have `NRF_SPIM_HAS_PRESCALER`
symbol defined. The symbol informs that target supports 32 MHz and
16 MHz frequencies for SPIM instances.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
The CLOCK HAL header is only needed for nRF5340 SoC. It's used when
user wants to configure SPIM instance to 32 Mbps. The HAL checks
if is running at 128 MHz as only then 32 Mbps is supported.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Pin state after SPIM deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. With the introduction
of the power-optimized SPIM driver, it disables the peripheral instance
once the transfer is completed.
As a result, the GPIO takes control over the SCK pin and drives it
based on pinctrl configuration which causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).
To address this issue, a patch was introduced to the SPIM driver.
Now, when a SPIM instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Add option to use (by defining the `wake-gpios` devicetree properties)
an additional signal line between SPI master and SPI slave that allows
the latter to stay in low-power state and wake up only when a transfer
is to occur.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
