The registers definitions will be needed when adding vendor-specific quirks
to this driver, so this commits moves them to a dedicated header file.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
It's used to pass right device index to hal_intel module.
DT_INST_FOREACH_STATUS_OKAY() does not guarantee the node ordering.
Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
Adds a new serial shim driver for Intel SoCs. Builds upon the SEDI bare
metal UART driver in the hal-intel module.
Signed-off-by: Nachiketa Kumar <nachiketa.kumar@intel.com>
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
If the optional hardware reset line is available, this change
will use that reset line to assert the uart module and bring
it out of reset state to use.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix a build error introduced in 9f02eeadf8, the async pointers are only
available when UARTE_ANY_ASYNC is set.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This adds a check of the return of clock_control_get_rate(),
and returns error in uart_configure() if unsuccessful in
getting clock rate.
Fixes#60478
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the CONFIG_UART_USE_RUNTIME_CONFIGURE guard to
disable the API function pointers if the kconfig is not enabled.
Both .configure and .config_get should only be usable if runtime
(re-)configuration of UART is needed.
Ifdef guards are added to drivers previously lacking this guard.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Both the IRQ API and Asynchronous API support callback.
However, since they are both interrupt driven, having
callbacks on both API would interfere with each other
in almost all cases. So this adds a kconfig to signal
that the callbacks should be exclusive to each other.
In other words, if one is set, the other should not
be active. Drivers implementing both APIs have been
updated to remove the callbacks from the other API.
Though, this still leaves the option to disable
the kconfig and allows both APIs to have callbacks
if one desires.
Fixes#48606
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
TI K3 family of SoCs requires an extended set of registers to operate.
Extended functionality of the current driver to support the variant.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
With NEORV32 v1.8.2 the UART module was changed to a simpler
implementation. This updates the UART driver for the open-source NEORV32
RISC-V compatible processor system (SOC).
Signed-off-by: Tim-Marek Thomas <thomas@sra.uni-hannover.de>
Add MMIO mapping for UART Renesas driver in order to avoid
mappings inside mmu_regions.c file(s).
There are a lot of changes inside SCIF driver inside this
commit, because reg addr and size may be stored in RAM or
ROM and appropriately in different driver structures data
or cfg, and, because the name of field reg base is changed.
Note: it is common approach according to Zephyr documentation.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Split the native ptty serial driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Boot level based on parent node (PCI or no PCI device). Some platforms the
PCI bus driver depends on ACPI sub system to retrieve platform information
such as interrupt routing information. But ACPI sub system currently
support only post kernel and hence such platforms the UART driver instance
init should be invoked only post kernel in case parent node is PCI.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.
This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.
This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:
$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
cut -d/ -f6 |\
sort -u
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Merges the condition for `UART_INTERRUPT_DRIVEN || UART_ASYNC_API` into
`UART_MCUX_FLEXCOMM_ISR_SUPPORT`.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
When UART_INTERRUPT_DRIVEN=n, mcux_flexcomm_isr and the data structure
inside is left unused. This patch turns off the build of the entire ISR.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
without the call of LPUART_ClearStatusFlags(), the interrupt can
immediately trigger again, blocking the application.
CONFIG_ASSERTS=n removes the assert() including the call of
LPUART_ClearStatusFlags().
Also removed LPUART_ClearStatusFlags call for unclearable
kLPUART_TransmissionCompleteFlag.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Quite a few of the drivers meant for the POSIX arch
interacted with the host directly, and will not
work when we use an embedded libC.
Until we fix them, let's add the appropriate
kconfig dependencies to avoid users trying to build them.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Following the sam4s datasheet, the OVRE, PARE and FRAME flags should be
cleared after a uart error occured. This is done writing a 1 to the
RSTSTA bit in the UART_CR.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@basalte.be>
Add Nuvoton numaker series UART support, including interrupt-driven,
also apply pinctrl and clock-control.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Add support for communication with serial ports on native POSIX platform
via UART driver API. Serial port driver supports polling API,
configuration of the serial ports used via devicetree and command line
options, and runtime configuration with `uart_configure`.
Multiple instances of the driver are supported.
Example use and configuration is also demonstrated in the
`samples/drivers/uart/native_tty` sample.
Closes: #56586
Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
drivers: serial: uart_sam0: fix uart_sam0_irq_update TXC reset bug
uart_sam0_irq_update function resets flags that will cause int. re-entry
existing implementation also clears the TXC flag if it is set
this breaks transmit complete detection
Per the SAMD5x/E5x Datasheet Sect. 34.8.6, writing '1' to the TXC will
clear the flag and disable TX complete interrupts, this should be
preserved through the irq_update for use in the tx_complete check function
The proper fix will cache the TXC value before conditionally clearing the
flag based on that cached value. If you do not condition this on the
cached value a race condition will periodically occur where
the TXC is cleared but never cached.
Fixes zephyrproject-rtos#55386
Signed-off-by: Peter McGaughey <peter.mcgaughey@daikincomfort.com>
This reverts commit 2d03aaf99f.
The async API for NS16550 is incomplete. We are near the next
release so it is better to revert it for now, and a proper
correct implementation can be done before next-next release.
Relates to #57103
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Currently the flexcomm uart driver will not unlock IRQ
if there is an error, which might cause some problems, fix this.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Recent refactoring of the uart_async_api test (see commit
eb44414af9) revealed an issue
in the uart_nrfx_uart driver that it requested the next RX
buffer even if one was already set up (such request was just
ignored in the previous form of the test, so the problem did
not come out so far).
This patch prevents such incorrect requests from appearing.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Let's check the return values of all system calls
to ensure they do not error, or handle it gracefully
if they do.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Change the assertion when evaluating the baudrate to trig if
result is greater or equal to 16.
This will also match the comment : checking BRR.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Clean up slashes in init macro to be less messy
Update copyright to reflect recent code changes by NXP
Update outdated driver description comment
Change irq driven api variables naming to be more specific
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The flexcomm uart mcux driver init macros have a lot
of unnecessary and confusing redundancy, so let's
simplify them.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The uart_ite_it8xxx2 is relying on a node that depends on a matching
ns16550 symbol, such as:
ite_uart1_wrapper: uartwrapper@f02720 {
compatible = "ite,it8xxx2-uart";
...
uart-dev = <&uart1>;
};
But the two are currently setup to initialize at the same level and
priority. Add a dedicated priority symbol so that the wrapper device is
always initialized after the main one, regardless of the linker order.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
All posix arch boards are required to provide the same
tracing/print API.
So, instead of having a different driver for native_posix and the
bsim boards, let's have a common one which uses this API.
This in turn results in the printk strings being printed in
the same underlaying backend as before with individual drivers.
A part from this, the native_posix console driver was a full
backend for the now long gone Zephyr console shell
(named legacy_shell from 527256501f
until it was retired in fd0b7f7767).
The whole input handling in this driver was dead code
(since 140a8d0c8a)
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
API function:
- `pl011_irq_tx_enable` is expected to enable and trigger TX interrupt.
Due to HW limiation, PL011 won't trigger TX interrupt if some data
wasn't filled to TX FIFO at the beginning. So that `isr_cb` must be
called at first time to enable TX irq.
- `pl011_irq_tx_ready` will return true when FIFO can accept more
data. Here we don't need wait TX FIFO to be empty.
- `pl011_irq_tx_complete` will return true when all data have been
sent from the shift register.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
