Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Make it a little bit easier to read using already existent
definitions for the registers used here.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Issue an upstream read transaction through uncached memory to flush
out all pending transactions before power down the host domain.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
use CONFIG_SOC_INTEL_ACE15_MTPM instead of CONFIG_ACE_VERSION_1_5.
CONFIG_ACE_VERSION_1_5 leaked from SOF.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use proper errno.h error codes in pd_intel_adsp_set_power_enable()
instead of -1.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
.bss and .data are uncached in Zephyr builds for intel_adsp. No need
to try to manipulate cache of objects in those sections.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This patch enhances the power-down sequence for the HOST (HST) domain
within the Intel ADSP ACE 1.5 architecture. It introduces a check to
ensure that a specific condition, represented by a magic key value, is
met before disabling the HST domain. This additional verification step
ensures that the HST domain is only powered down when it is safe to do
so, thereby maintaining the stability and reliability of the system.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This is a partial revert of one-line from commit 06cfbd4159 ("drivers:
power_domain: Introduce a gpio monitor driver") which not just
introduced a new driver (no problem with that) but also changed the
initialization priority of another, unrelated and existing power domain
driver without even trying to compile it:
https://github.com/zephyrproject-rtos/zephyr/pull/61166#issuecomment-1780959157
```
west config manifest.project-filter -- +sof
west update
west build -b intel_adsp_ace20_lnl modules/audio/sof/app/
ERROR: /soc/ssp@28100 POST_KERNEL 43 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@29100 POST_KERNEL 44 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2a100 POST_KERNEL 45 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2b100 POST_KERNEL 46 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2c100 POST_KERNEL 47 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2d100 POST_KERNEL 48 < /soc/dfpmccu@71b00/io0_domain 51
```
Also note a reviewer (@ceolin) expressed concerns about this unrelated
change but it was ignored:
https://github.com/zephyrproject-rtos/zephyr/pull/61166#discussion_r1357908984
Using `CONFIG_KERNEL_INIT_PRIORITY_DEFAULT` here may be "bad" for some
reason(s) and maybe it should be changed in the future, but it's nothing
compared to breaking _compilation_ of code that has been validated for
months and been released in production
(https://github.com/thesofproject/sof-bin/releases/tag/v2023.09)
So the very urgent thing is to very quickly revert to the previous state
to unblock development. Then we can discuss what is the better thing to
do here.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Power rails of some peripherals are controlled externally.
This is a case in embedded controllers, where the power of
some I2C devices are managed by the main application
processor.
To ensure that zephyr drivers access the devices where is
powered on, introduce a "monitoring" power domain. It works
by registering interrupt handler with gpio a pin, so that
when power state changes, it will notify relevant drivers.
Additionaly add CONFIG_POWER_DOMAIN_INIT_PRIORITY to replace
harcoded init priority.
Fixes: #51349
Signed-off-by: Albert Jakieła <jakiela@google.com>
Disable power management for this particular test case as it expects a
particular pattern of pm get/puts that isn't matched by the driver and
usage in SoF.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Change the power_domain_intel_adsp initialization priority so that it
initializes after the DMA driver that it depends on.
Fixes a few:
ERROR: /soc/dma@72c00 POST_KERNEL 40 69 <
/soc/dfpmccu@71b00/hst_domain POST_KERNEL 75 65
ERROR: /soc/dma@72400 POST_KERNEL 40 66 <
/soc/dfpmccu@71b00/hst_domain POST_KERNEL 75 65
...
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Changing function call order. We need to first power-up the power domain
before we turn on the devices.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch contains several small changes to the intel adsp power
domain.
- include missing header,
- replacing sys_write32/sys_read32 with sys_write16/sys_read16 since
DfPWRCTL is a 16 bit register,
- renaming struct to be more representing what it is,
- passing register address, not a value to the sys_read/sys_write
functions,
- pd_intel_adsp_init is now returning actual status.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
