The current I2C driver assumes that at least one byte will be read in CQ
(command queue) mode. However, when a 0-byte read is issued
(e.g., by cmd_i2c_scan),
The read handler uses (len - 1) to set the command queue length.
When len is 0, this underflows to 0xFF, leading to an incorrect transfer
length and possible crash.
To fix this, add a check in cq_mode_allowed() for reads with length 0:
-Fallback to PIO mode in such cases.
-Properly handle 0-byte reads by issuing STOP (E_FINISH) when the slave
address is acknowledged.
-Add appropriate handling for NACK conditions when the slave address is
not acknowledged.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Replace the manually implemented GPIO-based I2C recovery logic
with Zephyr's i2c_bitbang API.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Use the RTIO work queue to fake the i2c submit calls for drivers which
haven't yet implemented the API. Applications can change the size of
the work queue pool depending on how much traffic they have on the buses.
Signed-off-by: Yuval Peress <peress@google.com>
Add a property to select the push-pull GPIO output type to drive the
I2C recovery. The default is open-drain.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
In the interrupt pending routine, only the interrupt status needs to be
cleared at the end of the interrupt routine. There is no need to do a
hardware reset(HALT) to avoid clearing the next transfer interrupt when
the current transfer is completed.
Test: Testing this function does not cause I2C data/clk to get stuck on
the system platform.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
If I2C recovery mode uses GPIO push-pull to drive(3.3v), it will result
leakage in a pull-up voltage of 1.8V on the power rail, leading to
damage to 1.8V devices, including SoC, sensors.
Therefore, the recovery mode should be changed to GPIO open-drain type
to avoid this.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The finish interrupt after the previous transaction is completed may
occur in the next transaction. To do hardware reset at this time could
potentially lead to the failure of the transaction.
Therefore, removing the hardware reset upon completing the transaction
helps to avoid a race condition.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When adjusting the prescale to increase the I2C SCL low period,
the high period must also be subtracted to maintain a consistent
frequency.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/i2c directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add a property for I2C channel switch selection. This property will
write to the SMBxxCHS register according to the I2C node you selected,
which can make channel swapping.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The ISR for CQ mode was unconditionally writing into the I2C message
buffer for all transfer types. The correct data was transferred on the
I2C interface, but the clobber caused CONFIG_I2C_LOG_LEVEL_DBG to
display incorrect data for I2C writes.
This change will also help performance of large I2C write transactions.
Signed-off-by: Keith Short <keithshort@google.com>
Introduce I2C target transfer using the PIO mode. Add an option
"target-pio-mode" in the yaml file, determined by the DTS, to dictate
whether I2C target transfer uses the PIO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Disable the timeout setting when both the clock and data are
in a low state. This allows for I2C host clock stretching
without a timeout limit.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
IT8XXX2_I2C_STR is a register of read-only, non-writable to clear.
Here we can set hardware reset bit in the IT8XXX2_I2C_CTR register
to clear the status of IT8XXX2_I2C_STR.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add I2C target driver used buffer mode. The maximum accessible buffer
is 2044 bytes, the default is 256 bytes.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Use CONFIG_I2C_INIT_PRIORITY instead of
CONFIG_KERNEL_INIT_PRIORITY_DEVICE as introduced in
c8f9f53322.
Looks like the priority was accidentally changed in
f2c42663b4.
Signed-off-by: Martin Jäger <martin@libre.solar>
These global variables should be under the mutex lock, otherwise they
will be overwritten by other transfers.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
1. To explicitly set the MSG_START flag on the first message.
2. Remove redundant declare.
3. Using data->msgs->flags is the correct address instead of
msgs->flags.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
I2C CQ mode cannot enter power policy during transfer.
test: tests\driver\i2c\i2c_api--> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
If the transaction of write or read is divided into two transfers
(not two messages), the command queue mode does not support.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Adding command queue mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
I2C command queue mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.72ms(2.54ms->1.82ms) compared to the original pio mode when the
frequency is 100KHz.
3. krabby platform can boot normally.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Updates the API and types to match updated I2C terminology. Replaces master
with controller and slave with target.
Updates all drivers to match the changed macros, types, and API signatures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Fix the flow of I2C enable interrupt. We should enable the interrupt
after I2C configuration is completed to avoid pending interrupts and
cause errors irq.
Test port:
i2c_ite_it8xxx2: i2c0
i2c_ite_enhance: i2c4
Test:
tests\drivers\i2c\i2c_api --> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
As mentioned in #42882, the I2C of IT8XXX2 is designed for two different
IP blocks, so this PR divides this I2C driver into two compatibles.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
