In some cases, VddIO2 is required to get port working.
Looking in details, VddIO2 should be set on start up
but not toggled on/off in PM use cases.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implement power mgmt hooks to support PM_DEVICE and
PM_DEVICE_RUNTIME.
In case of PM_DEVICE_RUNTIME, clock is requested for bank writes
so it is requested before configuring and released only if pin
is not configured as output.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
During configuring the low-voltage power supply of IO pads, the npcx
GPIO driver needs to set the related PORTx_OUT_TYPE bit to 1, i.e.
select to 'Open Drain IO type', also. This CL provides a mechanism that
configuring these bits via 'def-lvol-io-list' node automatically in case
the flag of gpios that have been configured to low-voltage power supply
doesn't contain GPIO_OPEN_DRAIN.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
It was found that npcx7 series' GPIOs which support low-voltage power
supply, there is an excessive power consumption if they are selected to
low-voltage mode and their input voltage is 1.8V.
To avoid this excessive power consumption, this CL suspends the
connection between IO pads and hardware instances before ec enters deep
sleep mode. Then restore them after waking up.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This change enables A, C, D, E, G, H, I, J, K, and L groups,
and fix gpio interrupt function.
This change also pull (and rename) dt-bindings/irq.h to
dt-bindings/interrupt-controller/ite-intc.h, because it is
chip-specific.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ifee039981c2cc4cf5980e663702a9921e629fc1e
Add GPIO controller driver that can be found on Renesas
RCar gen3 soc series.
Controller can handle up to 32 GPIOs per banks.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
GPIO driver properly disconnects a pin. On subsequent pin
configure calls the driver does not clear the GPIO pin's
power gate field resulting in the pin remaining disconnected.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Advanced stm32g0 socs additionally have gpio port e.
This commit adds the missing definition for the port.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Currently level interrupts are implemented using GPIO SENSE, but edge
interrupts using GPIOTE events. Using GPIOTE events results in increased
power consumption according to product specifications and erratas of
some nRF MCUs. In case of nRF52832 it is <20uA in System ON Idle and
~400-450uA when used in conjunction with SPI or TWI.
Add a user configurable option to select between GPIOTE events and GPIO
SENSE mechanism, for implementing edge interrupts. Selecting GPIO SENSE
option will allow to reduce power consumption in scenarios mentioned by
nRF MCUs erratas.
Additionally GPIO SENSE mechanism (as opposed to GPIOTE event) allows to
detect state changes of pins configured as output.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add GPIO driver for QuickLogic EOS S3 SoC.
Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>
Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Currently, if GPIO_DISCONNECTED flag is used pin remains as input,
this causes some additional power to be drain which is
undesired.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
In function gpio_stm32_enable_int, retiurn value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219652).
Fix this.
Fixes#33035
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Serial Wire JTAG configuration option is made available
under condition that SPI_3 was not enabled on SOC_STM32F103XE.
Besides being obsolete there are various other potential conflicts
with other periphals, and it is not possible to explicit them all.
To make it more coherent remove such condition, assume that user
needs to take care of such pin conflict and express SWJ as having
precedence over peripheral devices pin configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that pinmux driver holds a table of GPIO device pointers,
use gpio device as the single source of trust for gpio_base
and remove use of port_base and related code.
This way, gpio_stm32_configure could directly take gpio device
pointer as argument.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As a preparation for GPIO ports clocks power management,
add a dedicated central function fog GPIO ports clock toggling.
This function is made accessible to other users (pinmux).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On L4/L5 device, GPIO port G benefits from a dedicated supply
rail that should be enabled independently.
Review the code around this:
-Compile only when port G is enabled
-Assume that PWR clock is ON, as it is enabled as part of clock init
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver and users of pinmux on mcux lpc platforms to getting
basic port info from devicetree (register address, label)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert from device_get_binding to DEVICE_DT_GET. In doing this we
no longer need the label in the devicetree node so we remove that.
Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This CL uses a simpler configuration approach that turns GPIO's
interrupts off instead of calling npcx_miwu_interrupt_configure
with NPCX_MIWU_MODE_DISABLED.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The GPIO driver uses a proprietary GPIOTE channel allocator.
This commit makes it use the allocation mechanism provided by nrfx.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Part of GPIO pads in npcx series support low-voltage (1.8V) level
detection. In order to introduce this feature, this CL adds a new
NPCX-specific controller property, lvol_io_pads, in devicetree file.
For example, here is devicetree fragment which turn on low-voltage
support of i2c1_0 port.
/ {
def_lvol_io_list {
compatible = "nuvoton,npcx-lvolctrl-def";
lvol_io_pads = <&lvol_io90 /* I2C1_SCL0 1.8V support */
&lvol_io87>; /* I2C1_SDA0 1,8V support */
};
};
Then these pads will turn on 1.8V level detection during initialization.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This patch replace CONFIG_GPIO_SIFIVE_N_PRIORITY into interrupt-cell
of device-tree to set IRQ priority.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Now that we generate a header that extern's all possible devicetree
based device struct we can remove DEVICE_DT_DECLARE and
DEVICE_DT_INST_DECLARE as they aren't needed anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Retain the assumption that the loop will assign a pointer, but
initialize it pointer first to eliminate build warnings.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Need to declare the device before the pointer can be obtained, and to
validate the device before trying to use it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This change adds support for configurable interrupt capabilities
in the emulated GPIO controller via Devicetree bindings.
Fixes#26477
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
Convert drivers to use pinmux devicetree node to create pinmux device
object.
On intel S1000 we add 'label' as a required property and set it to
'PINMUX' to match CONFIG_PINMUX_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is about platform it8xxx2 gpio.
The devicetree use key and led as example.
Users can change it to meet their needs.
Signed-off-by: Cheryl Su <Cheryl.su@ite.com.tw>
Convert gpio drivers to use new DT variants of the DEVICE APIs.
DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
DEVICE_GET -> DEVICE_DT_GET
DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE
etc..
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE
and use PM_ as the prefix for all PM related Kconfigs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
