Use dma_slot for peripheral request instead of linked_channel.
This is a more suitable usage as described in dma_config.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Enable Zephyr device runtime power management mechanisms in Intel HDA
DMA driver. This allows Zephyr to track usage reference for power domain
gating.
PM action handler is currently empty and will be fill out later.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Enable Zephyr device runtime power management mechanisms in Intel GP DMA
driver. This allows Zephyr to track usage reference for power domain
gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Adds an attribute that describes the maximum number of scatter gather
blocks that the DMA will accept. Useful in cases where DMA is used as
the abstraction for moving data around (e.g. SoF audio streams) and
variances of the hardware need to inform decisions about how to use
the DMA API.
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This function is responsible for checking if combination of msize,
mburst and FIFO level is allowed. Possible combinations can be found in
ST documentation, eg. Table 36. FIFO threshold configurations, RM0402
9.3.13 FIFO chapter.
Previously there was no 'break' or '__fallthrough' in msize switch which
caused compilation errors. Since we are confirming that combination is
correct, 'break' statements should be used.
Besides of introducing missing 'break' statements, this patch moves
'return false' from switch to the end of the function. This makes code
shorter and easier to understand, because we have only correct
combinations.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Add the resume API function for the dma driver of the stm32U5 serie.
That completes the suspend API function.
Controlling the SUSPF bit of the GPDMA CR register is enough
to suspend/resume the channel.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
There is no need to reset the channel else DMA config is lost and
channel should be enabled again in case of resume.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Reduce logging verbosity in status call from INF to DBG as the function
can be called any given time i.e. eveything is fine even if the read and
write pointers don't differ.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Added the new intel_adsp_hda_dma_get_attribute function that
returns dma controller attributes.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Gives the stm32u5 dma driver a suspend function to
enhance the dma API.
This is a particular feature of the stm32U5 GPDMA
to suspend a channel.
A delay is required ;1ms is compatible with both stm32u5 platforms.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32U5 serie, the busy flag is handled as other serie.
When the DMA is overriden by other HAL drivers, the busy flag
is not considered.
Refer to https://github.com/zephyrproject-rtos/zephyr/pull/47645
There is no Mux for this GPDMA and fixed 16 channels.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
There is no DSPRA registers (0x71a60) in SOC Intel ACE.
Therefore this space should be not accessed. It is valid only
for some Intel CAVS SOC versions.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
GPDMA should work with disabled interrupts in ctrl_lo
This also helps with stability in SOF scenarios
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.
This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.
Adds the loopback binding option to enable the spi_loopback test.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add the support of the stm32MP1 family for DMA peripheral.
This dma driver is similar to the stm32H7.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
If cfg_hi and cfg_lo are not set to zero in config setting, different
dma slot value is bitwise ORred to the previous set value. Thus fix it.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
For Intel ACE1.x the GPDMA link list structure should be aligned
to 64 bytes to avoid the link list entry fetch crossing the 64 bytes
address alignment.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the scope of some variables in various STM32 drivers including:
- SDMMC
- DMA
- OSPI/QSPI Flash
- Interrupt controller
The variables are set static instead of global and const if appropriate.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This will use DW_CFGH_DST instead of DW_CFGH_DST_PER
to correctly setup cfg_hi. This is critical for ALH transfer.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
This will trigger link commit immediately after start
to fix hda start flow.
Applies to link out only.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
For HDA link suspend is exactly the same as stop
but the same api is used also to control gpdma with unique suspend
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Update DMA drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit is converting the DMA kconfig for the stm32 dma driver
with new macro DT_HAS_<COMPAT>_ENABLED.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
It includes the definition for the DMA peripheral of this type,
present on stm32U5 devices.
A particular DMA_STM32U5 config is selected for that purpose.
The driver is derived from the existing dma_stm32.c
The GPDMA is counting channels (0-15) ; stream offset is 0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It is frequent to find variable definitions like this:
```c
static const struct device *dev = DEVICE_DT_GET(...)
```
That is, module level variables that are statically initialized with a
device reference. Such value is, in most cases, never changed meaning
the variable can also be declared as const (immutable). This patch
constifies all such cases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previous versions were using, incorrectly, the host in/out regblock size
of 40 bytes for all peripherals when in fact the link in/out regblock size
is 20 bytes in size.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
DMA controller ownership can be done in the driver
initialization, it does not need to be part of the SoC. It simplify
the code and remove duplicated definitions.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)
Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.
The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a
Signed-off-by: Simon Hein <SHein@baumer.com>
This commit controls the stream busy flag of the dma channnel
Set as true : stream is busy each time the channel is
started or reloaded.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the channel is overriden by the HAL,
the dma irq must always be handled (even if not busy).
Only when the dma channel is not overriden by the HAL
the irq is exiting when the channel is no more busy.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
