Commit graph

703 commits

Author SHA1 Message Date
Hein Wessels
7d76842fdf drivers: dma: stm32: dmamux: support dmamux2 and bdma
Extends dmamux driver to support DMAMUX 2,
which supports the BDMA on STM32H7 devices.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Hein Wessels
c4f88a9d6e drivers: dma: stm32: dmamux: abstact calls to dma drivers
Wrap calls to DMA drivers through fops to allow
different dmamuxes to point to different types of
dma with different function calls.

In preperation to add support for BDMA and DMAMUX2.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Hein Wessels
e01270793e drivers: dma: stm32: bdma support for H7
Implement STM32H7 BDMA driver.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Andriy Gelman
8a97da056b drivers: dma: Add infineon xmc4xxx dma support
Adds dma drivers for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Jay Vasanth
c504e1e5cd drivers: dma: Add Microchip XEC DMA driver
The Microchip XEC family of microcontrollers includes a
simple DMA block implementing multiple channels. DMA supports
memory to memory, memory to peripheral, and peripheral to
memory transfers. Peripheral support is limited by each
chip to I2C and SPI controllers. DMA hardware does not support
scatter-gather or linked transactions.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-02-19 20:38:21 -05:00
Kai Vehmanen
0c0d73721e dma: dw: allow to stop in DW_DMA_SUSPENDED state
Allow DMA channel to be stopped even if it is in suspended state.
The current code in dw_dma_stop() supports this, but the recently
added early check for dw_dma_is_enabled() results in DMA stop
sequence to be skipped if the channel was in suspended state.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-19 20:37:26 -05:00
Kai Vehmanen
6422b2b094 dma: dw: fix include for chan_data
The conditional definitions are not correct as "chan_data"
is used without any include guards, but defined only if
CONFIG_DMA_DW_HW_LLI or CONFIG_DMA_DW_SUSPEND_DRAIN is defined.
Correct the declaration to match usage.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-19 20:37:26 -05:00
Francois Ramu
4de473e4c9 drivers: dma for stm32u5 returns from a repeated start or stop command
On a repeated dma_start, the stm3u5 dma driver should return
immediately if it is already started.
On a repeated dma_stop, the stm3u5 dma driver should return
immediately if it is already stopped.
This like the dma driver does for other stm32 series.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-11 07:57:44 +09:00
Daniel DeGrasse
844685224b drivers: dma: remove unused mutex from edma driver
Mutex initialized by edma driver is not used. Remove it from the
driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-02-06 10:05:44 +01:00
Tom Burdick
58312e6104 dma: Repeated start/stop support for gpdma
Allows for repeatedly calling start/stop on designwares gpdma.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-01-23 11:51:21 -08:00
Tom Burdick
b14296af38 dma: HDA ignore repeated start/stop requests
The DMA API contract specifies that start/stop may be called multiple
times. Prior to adding power management this was perfectly fine as it was.
In adding power management, there are additional side effects that can
cause issues. Instead check the state of the channel prior to start/stop
and do nothing if already in the desired state.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-01-23 11:51:21 -08:00
Adrian Warecki
5d902ea621 dma: dw: Align error code for xrun reporting
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-01-19 15:45:16 +00:00
Francois Ramu
227226313a drivers: dma: stm32 dma driver support repeated start/stop
To support the repeated start/stop, the stm32 dma driver is
returning 0 if the channel is already started/stopped.
This is not done at the dmamux level if any.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-19 12:03:50 +01:00
Piotr Makaruk
00b5114344 dma: hda: enable xrun handling
Enable link under/overruns handling and reporting such events in dma
status

Signed-off-by: Piotr Makaruk <piotr.makaruk@intel.com>
2023-01-17 18:50:15 -05:00
Lucas Tamborrino
17fbdc55b5 drivers: dma: esp32c3: add gdma driver
Add GDMA driver for esp32c3.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-01-12 19:09:01 +01:00
TOKITA Hiroshi
1690326268 dts: bindings: dma: gd32: split gd,gd32-dma-v1 for support F4xx feature
Split gd,gd32-dma-v1 from gd,gd32-dma to support F4xx specific features.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-22 13:43:49 +01:00
TOKITA Hiroshi
498ef65242 dts: bindings: gd32-dma-base: add gd,mem2mem property
Add `gd,mem2mem` property to indicate the DMA controller supports
memory to memory transfer.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-22 13:43:49 +01:00
TOKITA Hiroshi
ad055bd5fc drivers: dma: dma_gd32: Use dma_slot for peripheral request
Use dma_slot for peripheral request instead of linked_channel.
This is a more suitable usage as described in dma_config.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-22 13:43:49 +01:00
Tomasz Leman
af6d827b64 drivers: hda: enable runtime power mgmt in intel hda dma
Enable Zephyr device runtime power management mechanisms in Intel HDA
DMA driver. This allows Zephyr to track usage reference for power domain
gating.

PM action handler is currently empty and will be fill out later.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-12-16 11:03:15 +00:00
Tomasz Leman
de1bd1fa04 drivers: gpdma: enable runtime power mgmt in intel gpdma
Enable Zephyr device runtime power management mechanisms in Intel GP DMA
driver. This allows Zephyr to track usage reference for power domain
gating.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-12-15 19:17:21 +01:00
Tom Burdick
603cc27045 dma: Add max block count attribute
Adds an attribute that describes the maximum number of scatter gather
blocks that the DMA will accept. Useful in cases where DMA is used as
the abstraction for moving data around (e.g. SoF audio streams) and
variances of the hardware need to inform decisions about how to use
the DMA API.

Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-12-14 09:51:10 +01:00
Patryk Duda
e4b8dce1e5 drivers: dma: Simplify stm32_dma_check_fifo_mburst() function
This function is responsible for checking if combination of msize,
mburst and FIFO level is allowed. Possible combinations can be found in
ST documentation, eg. Table 36. FIFO threshold configurations, RM0402
9.3.13 FIFO chapter.

Previously there was no 'break' or '__fallthrough' in msize switch which
caused compilation errors. Since we are confirming that combination is
correct, 'break' statements should be used.

Besides of introducing missing 'break' statements, this patch moves
'return false' from switch to the end of the function. This makes code
shorter and easier to understand, because we have only correct
combinations.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-09 11:18:01 +01:00
Francois Ramu
9c49ee3e48 drivers: dma: stm32u5 dma with resume API function
Add the resume API function for the dma driver of the stm32U5 serie.
That completes the suspend API function.
Controlling the SUSPF bit of the GPDMA CR register is enough
to suspend/resume the channel.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-08 14:59:01 +00:00
Francois Ramu
e5306ed8e3 drivers: dma: stm32u5 do not reset the dma channel when suspending
There is no need to reset the channel else DMA config is lost and
channel should be enabled again in case of resume.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-08 14:59:01 +00:00
Jaska Uimonen
43fe2bba37 drivers: dma: gpdma: reduce logging verbosity
Reduce logging verbosity in status call from INF to DBG as the function
can be called any given time i.e. eveything is fine even if the read and
write pointers don't differ.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-11-24 15:22:30 +01:00
Adrian Warecki
7aaaffe623 dma: dwdma: Remove unused defines
There was no reference to the DW_DMA_BUFFER_PERIOD_COUNT,
so it was removed.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Adrian Warecki
cb8b1b511c dma: adsp: gpdma: Add support for get_attribute
Added the new intel_adsp_gpdma_get_attribute function that returns
dma controller attributes.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Adrian Warecki
ed1976f614 dma: hda: adsp: Add support for get_attribute
Added the new intel_adsp_hda_dma_get_attribute function that
returns dma controller attributes.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Adrian Warecki
ea85ce2693 dma: gpdma: Read linear link position in status function
Added reading of the linear link position in the status function.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Francois Ramu
1299c78c18 drivers: dma: stm32u5 dma drivers has a suspend function
Gives the stm32u5 dma driver a suspend function to
enhance the dma API.
This is a particular feature of the stm32U5 GPDMA
to suspend a channel.
A delay is required  ;1ms is compatible with both stm32u5 platforms.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-23 11:32:27 +01:00
Francois Ramu
6500c2377c drivers: dma: stm32u5 dma keep initial DMA_InitStruct
There is no reason to set DMA_InitStruct with same fields
as the LL_DMA_StructInit sets.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-23 11:32:27 +01:00
Francois Ramu
c81dba6d45 drivers: dma stm32U5 GPDMA keeps the channel busy if overriden
For the stm32U5 serie, the busy flag is handled as other serie.
When the DMA is overriden by other HAL drivers, the busy flag
is not considered.
Refer to https://github.com/zephyrproject-rtos/zephyr/pull/47645
There is no Mux for this GPDMA and fixed 16 channels.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-22 12:00:00 +00:00
Jaroslaw Stelter
5f7a6ae817 drivers: gpdma: Fix ownership programming for ACE
There is no DSPRA registers (0x71a60) in SOC Intel ACE.
Therefore this space should be not accessed. It is valid only
for some Intel CAVS SOC versions.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-11-17 00:34:45 +09:00
Adrian Bonislawski
fcbb8bb4fe dma: gpdma: disable interrupt
GPDMA should work with disabled interrupts in ctrl_lo
This also helps with stability in SOF scenarios

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-11-15 12:16:23 +00:00
Ranjani Sridharan
2bb63a2170 dma: dw: Fix compilation errors with CONFIG_DMA_DW_SUSPEND_DRAIN
This code was likely never used.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-12 22:27:10 -05:00
Ranjani Sridharan
2fb01e412f dma: dw: Fix return value in dw_dma_stop
Do not throw away the errors.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-09 21:42:13 +01:00
Tom Burdick
74b9699213 spi: SAM support SPI transfers with DMA
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.

This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.

Adds the loopback binding option to enable the spi_loopback test.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-11-08 09:37:59 +00:00
Francois Ramu
d4889366ba drivers: dma: stm32 dma driver supporting the stm32mp1 serie
Add the support of the stm32MP1 family for DMA peripheral.
This dma driver is similar to the stm32H7.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-04 10:16:56 +01:00
Jaska Uimonen
2389e446ab dma: gpdma: fix cfg_hi and cfg_lo initialization
If cfg_hi and cfg_lo are not set to zero in config setting, different
dma slot value is bitwise ORred to the previous set value. Thus fix it.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-10-27 17:09:27 +02:00
Serhiy Katsyuba
99071f99df drivers: dma: Fix for DW DMA link list alignment
For Intel ACE1.x the GPDMA link list structure should be aligned
to 64 bytes to avoid the link list entry fetch crossing the 64 bytes
address alignment.

Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2022-10-18 14:13:01 +02:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Guillaume Gautier
aba432348b drivers: Cleans variable scopes for STM32 drivers
Fix the scope of some variables in various STM32 drivers including:
 - SDMMC
 - DMA
 - OSPI/QSPI Flash
 - Interrupt controller

The variables are set static instead of global and const if appropriate.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-10-12 18:41:48 +02:00
Adrian Bonislawski
e5e7ee88a3 dma: gpdma: fix channel config
This will use DW_CFGH_DST instead of DW_CFGH_DST_PER
to correctly setup cfg_hi. This is critical for ALH transfer.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-30 15:18:20 +00:00
Adrian Bonislawski
9bb0b6dba2 dma: gpdma: fix llp config
This will setup llp config properly with dma_slot

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-30 15:18:20 +00:00
Adrian Bonislawski
feffb245fa dma: hda: fix buffer address for hda link
This will set correct buf address for hda link in&out

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-30 15:18:20 +00:00
Adrian Bonislawski
7eeeff5ce9 dma: hda: trigger link commit at dma_start
This will trigger link commit immediately after start
to fix hda start flow.
Applies to link out only.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-30 15:18:20 +00:00
Adrian Bonislawski
8c90c40c0e dma: hda: add suspend api for hda link
For HDA link suspend is exactly the same as stop
but the same api is used also to control gpdma with unique suspend

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-30 15:18:20 +00:00
Flavio Ceolin
45465708f0 soc: intel_adsp: Add ACE soc series
ACE15_MTPM is one SOC from the ACE series. Organize
it following cavs pattern.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-09-09 16:03:59 -04:00
Gerard Marull-Paretas
8d100f4f98 drivers: dma: gd32: use clock control API
Use the clock control API to enable DMA clock.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
382c1f2338 drivers: dma: gd32: use reset API
Use the reset API to reset the peripheral state before initialization.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-29 10:30:49 +02:00