During intensive testing, it was found that the clock should
be set the same way on all ACE platforms
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
This change is assumed to fix the random corruption of 4ch
capture for PDM1 channels 3-4 in PTL platform. There are no
solid facts behind this change but assumption that PDMx
controllers are not in sync if the start sequence for PDM1
is further away from PDM0. The PDM0 internal state may be
different from PDM1
The single for loop to handle the CIC and FIR start sequence
is split into two for loops to handle same registers update
tasks symmetrically for all stereo PDM controllers. E.g. two
PDMs for four microphones.
First loop programs the CIC_CONTROL and MIC_CONTROL registers
of the PDMx controllers. These features belong to the CIC block
in DMIC IP. Second loop programs the FIR_CONTROL registers of
the PDMx controllers.
In a stress test of 100 times repeated commands:
arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_1.wav; \
sleep 0.5; \
arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_2.wav; \
sleep 1
The corruption occurrence with xt-clang build was e.g. 87/200
fails in one of wav files giving 43.5% occurrence. The test was
done with Zephyr commit fe29c40a93
("llext: add inspection API test suite").
In a gcc build the occurrence of corruption is lower, around 6%
but it is seen that the channels 3-4 pdm1 are swapping randomly.
With this fix the corruption occurred zero times in xt-clang
and gcc builds with same 100 repeats.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch will disable DMIC IRQ handling in DMIC driver
because it is now managed by Mic Privacy driver
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Introduce new DAI driver used for NXP's PDM MICFIL IP.
This block implements required digital interface to provide
a 24-bits audio signal from a PDM microphone bitstream in a configurable
output sampling rate.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Print the register address, mask and value as hexadecimal to be more
intuitive and also print out the actual value from the register to have
some insights.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
With ACE3 the logging is skipped in dai_ssp_start(), move the code under
the same if cases to preserve them.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
This patch will save configured link clock and ensure
ssp starts with xtal clock if ssp ver >= 2.0
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
This patch refactors the power management initialization for the SSP
driver across ACE15, ACE20, and ACE30 generations to align with the
recommended practices outlined in the documentation. The changes
include:
1. Replacing the conditional initialization of power management state
with a call to `pm_device_driver_init` in the `ssp_init` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the SSP nodes
in the device tree files for ACE15, ACE20, and ACE30.
3. Moving the power domain assignment for the SSP device in the device
tree. The previous configuration resulted in the device not being under
any power domain and being initialized as always ON.
These changes ensure that the SSP driver is initialized with the
appropriate power management state and that runtime power management is
automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch refactors the power management initialization for the DMIC
driver across ACE15, ACE20, and ACE30 generations to align with the
recommended practices outlined in the documentation. The changes
include:
1. Replacing the conditional initialization of power management state
with a call to `pm_device_driver_init` in the
`dai_dmic_initialize_device` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the DMIC nodes
in the device tree files for ACE15, ACE20, and ACE30.
These changes ensure that the DMIC driver is initialized with the
appropriate power management state and that runtime power management is
automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch addresses the following issues with the Intel HDA DAI driver:
1. Adds power management support for the HDA DAI driver by implementing
the `hda_pm_action` function and integrating it with the Zephyr power
management framework.
2. Ensures balanced calls to `pm_device_runtime_get` and
`pm_device_runtime_put` by modifying the `probe` and `remove`
functions to use these power management calls.
3. Ensures that the io0 power domain is active when the HD Audio is in
use by assigning the correct power domain to the HDA DAI devices in
the device tree files for various Intel ADSP platforms (ace15_mtpm,
ace20_lnl, ace30, ace30_ptl).
4. Enables runtime power management for the HDA DAI devices by adding
the `zephyr,pm-device-runtime-auto` property in the device tree.
These changes ensure that the HDA DAI driver properly manages power
states, reducing power consumption and improving system stability, while
ensuring the io0 power domain is active when required.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
The SSP driver has odd dependency to outside definition of
CONFIG_INTEL_NM. This is in practise tied to SSP hardware
version and always enabled for SSP block version 1.0.
Use the new SSP_IP_VER define to replace the CONFIG_INTEL_MN
preprocssor checks. Also modify the board test case to
remove the obsolete config setting.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This commit updates the SSP driver to use the newly defined
SSP_IP_VER macros for IP version checks instead of relying
on CONFIG_SOC_* macros. The change ensures better readability
and maintainability by centralizing the IP version definitions
and comparisons.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
We use the name cell at a given index to retrieve
a clock's id.
But not all clocks provide a name cell, so use 0x0 as clock-id
for these situations.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
IRQs are currently only enabled during the driver
initialization function (i.e: sai_init()). As such,
even though they're not needed (i.e: after a TRIGGER_STOP
operation) they remain enabled. Fix this by enabling IRQs
after during the TRIGGER_START operation and disabling them
during the TRIGGER_STOP operation.
This change is required by irq chips (i.e: irqsteer) which
perform PM operations during irq_enable()/irq_disable(). If
interrupts are left enabled all the time that means the irq
chip's PM resources might also remain enabled.
To make this change possible, the irq will have to be stored
inside the SAI's configuration structure.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Renamed soc from ace30_ptl to ace30.
We were previously using the wrong soc name.
The correct name is ace30.
There is only one ptl platform, but there can be several ace30 platforms.
Signed-off-by: Grzegorz Bernat <grzegorzx.bernat@intel.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
TX/RX FIFO underrun shouldn't crash the RTOS when it occurs.
Also, since this can also happen under "normal" conditions
(i.e: DMA doesn't copy data fast enough from/to SAI's FIFOs)
the software should be able to recover from it.
As such:
1) Remove `z_irq_spurious()` call.
2) Clear error flag
3) De-escalate error message to warning message
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The ESAI is already reset during the config_set() function
so no need to also reset it during init().
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Programming of the MLCS register was performed on the incorrect bits.
Additionally, saving the new version did not erase the previously set
value, which could result in an incorrect register value.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
This commit adds a new API function, `dai_ssp_dma_control_set`, to the
Intel SSP DAI driver. This function is designed to set DMA control
parameters specifically for the SSP interface.
The addition of this API function allows for more granular control of
DMA settings, which can be beneficial in scenarios where DMA
configuration needs to be modified independently of other DAI settings.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Refactor the TLV parsing code from the dai_ssp_parse_aux_data function
into a new, separate function called dai_ssp_parse_tlv. This change
improves the modularity of the code and allows for the TLV parsing logic
to be reused in other contexts where only TLV data needs to be parsed
without the entire configuration blob.
The new dai_ssp_parse_tlv function takes a pointer to the TLV data and
its length as parameters, enabling it to process a buffer containing
multiple TLV entries. The original dai_ssp_parse_aux_data function is
now simplified to prepare the TLV data and call the new parsing
function.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
The previous port acquire/release functions have been removed,
and a new IP acquire/release mechanism has been introduced.
Additionally, the RX FIFO clearing function for PTL has been corrected.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
The unreset of ACE PDM controllers is moved to beginning of
void dai_dmic_start() and done side-by-side. This change is done
for adhering to recommended hardware initialization flow to
avoid intermittent failures on ARL-S.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch removes the traces printed inside spinlock protected
code. The DMIC capture start code is timing critical. Traces
leave an unknown delay into start sequence, so it's better to not
produce them.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The dai_dmic_update_bits() function is used in start trigger
code dai_dmic_start() and in capture runtime to control DMIC
IP in unmute sequence. Especially the start sequence is timing
critical so it's better not produce additional delay in this
function.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This commit refactors the SSP driver to support the Intel ACE30 PTL
platform. The changes include:
- Adding new structures ssp_rx_dir and ssp_tx_dir to hold the TDM
slot configuration for RX and TX directions
- Adjusting the dai_ssp_set_config_blob functions to work with
the new TDM slot configuration.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the
management of the DAI part from the management part of the SSP IP.
Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
approach.
- Update device tree bindings and instances to reflect the new SSP IP
management mechanism.
- ace30 (PTL) support.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
headers for dmic are now part of the SoC and maintained per generation,
so create one header for PTL and build the code for PTL in some of the
drivers (dmic_nhlt).
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
While running the following command:
aplay ... | arecord ...
multiple times, it was discovered that the SAI transmit
FIFO goes into underrun. This only happened in the
beginning, a few BCLK cycles after unmasking the transmit
data line. With the following flow:
1) Trigger start on RX
a) Do TX and RX software reset
b) Enable RX FIFO error interrupt
c) Enable RX DMA requests
d) Enable receive data line
e) Enable transmitter
f) Enable receiver
..... some time has passed .....
2) Trigger start on TX
a) Enable DMA requests
b) Enable transmit data line
and configuration in mind:
1) RX is SYNC with TX
2) TX is ASYNC
3) Each FSYNC edge is 32-bit wide
4) Each frame contains 2 32-bit words
this points to the following possibilites:
1) The transmitter is enabled so close to the
start of a new frame that even though the DMA requests
are asserted, the DMAC doesn't have enough time
to service them until the module goes into underrun
=> the timing is bad.
2) The transmitter is enabled somewhat close to
the start of a new frame such that the DMAC is not
fast enough to service the module until it goes into
underrun => DMAC is too slow AND the timing is bad.
Although the exact cause was not pinpointed, this patch
aims to fix the problem by writing a frame's worth of 0s
in the transmit FIFO. This way, even if we're dealing with
scenario 1) or 2), the DMAC has plenty of time to perform
the transfer (i.e: a frame), thus avoiding the underrun.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
In previous generations, each MCLK divider could be enabled separately.
Starting with ACE, there is a single-bit MDE field to enable a single
divider. The existing code would not enable MDE in case MCLK1 is used.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
When SSP is consumer for FS and BCLK then it does not needs MCLK as the
shifting and rate is derived form the I2S bus directly.
When SSP provides FS only then the BCLK setup is not needed.
When SSP provides BCLK only then both MCLK and BCLK setup is needed.
In hardware multiple SSPs share the same MCLK source, in case of one
SSP port is used as clock provider while other is used as clock consumer
then the consumer SSP should not need to depend on the provider SSP
configuration, the ports can run in different clock rates.
In this example the consumer SSP should not try to configure and lock the
MCLK frequency to some arbitrary rate (as it does not need MCLK at all)
which might be different than the frequency needed by the provider port.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the management
of the DAI part from the management part of the SSP IP.
Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
approach.
- Update device tree bindings and instances to reflect the new SSP IP
management mechanism.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
There's no way this log level was intentional: this line is just the
title / prefix of a multi-line section with mostly LOG_INF statements.
Fixes commit 6423bc3bc8 ("drivers: dai: intel: ssp: Improve logging
output") which was very large hence error-prone.
Fixes SOF bug https://github.com/thesofproject/sof/issues/9026
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Add support for performing pinctrl operations. For now,
the only supported operation is applying the pinctrl default
state. Pinctrl is left optional to allow for scenarios in which
this is not required (e.g: AMP system in which another
OS configures the pinctrl).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Some SAI instances are mutliline, meaning they can have multiple
TX/RX data lines (channels). Depending on the board, the index
of the TX/RX data lines that are connected to the consumer
(e.g: the codec) may not always be 0. This commit fixes this
issue by adding support for passing the index of the used
TX/RX data lines through the DTS.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since a DMA cell now allows specifying a channel and a MUX value
there's no need to fetch these values from the HAL. This, in turn,
allows for more flexibility and reduces the coding effort for new
platforms that want to use the SAI driver.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
