Commit graph

530 commits

Author SHA1 Message Date
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Henrik Brix Andersen
c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Gerson Fernando Budke
eb2c6d7e2c drivers: timer: sam: Update to use clock control
This update Atmel SAM timer driver to use clock control drivers.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Krzysztof Chruscinski
656b0e6426 drivers: counter: Adapt to use device tree
Modifying counter drivers (rtc and timer) to rely completely on
device tree and not on Kconfig of MDK flags.

Adapting dtsi for all SoCs and adapting test configuration.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2023-03-20 16:59:40 +01:00
Krzysztof Chruscinski
93619d7b73 drivers: counter: nrfx_rtc: Use clock control when driver enabled
RTC shall enabled LF clock only if CLOCK_CONTROL driver is enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2023-03-20 16:49:50 +01:00
Benjamin Björnsson
c02688a308 drivers: counter: add support for rtc in STM32C0-series
This commit extends the rtc counter driver to work on
the STM32C0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-03-20 09:53:49 +01:00
Benjamin Björnsson
6c8ef27a77 drivers: counter: stm32_rtc: enable backup domain only when supported
The STM32C0-series does not have a backup domain, this patch
enables us to extend this driver to the C0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-03-20 09:53:49 +01:00
Rainer Paat
ed2c25effc drivers: counter: MCP7940N: initialization fix
This PR fixes MCP7940N initialization failure on Sunday if
external battery is used to keep the RTC running over the
MCU or Zephyr OS restarts.

Signed-off-by: Rainer Paat <rapaat@gmail.com>
2023-03-10 14:09:49 +01:00
Adrian Bonislawski
1243fa7f2d drivers: counter: align ace rtc get_value with api
This will align ace rtc get_value parameter with counter api
and fix build warning

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2023-02-20 11:13:45 +01:00
Adrian Bonislawski
c1b216d3bf drivers: counter: return status in ace rtc counter
This will align return value with counter API and fix build warning

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2023-02-20 11:13:45 +01:00
Adrian Bonislawski
9952576945 drivers: counter: fix ace counters build errors
This will fix includes and allow to successfully build ace counters

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2023-02-20 11:13:45 +01:00
Guillaume Gautier
60fc300195 drivers: counter: Do not keep RTC value between resets on STM32
This commit changes the ability to keep the RTC value between resets, and
turns it off by default.
Though this feature makes sense for an RTC counting the time and date,
here it is used as a counter. As such the registers used for coutning
should be reset after each MCU reset.

This change puts back in place the previous behavior before the Kconfig
CONFIG_COUNTER_RTC_STM32_BACKUP_DOMAIN_RESET was removed.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-08 12:10:34 +01:00
Adam Kondraciuk
dac3a42063 drivers: counter: align to NRF_TIMER hal
Align driver with changes introduced in the hal. `nrf_timer_frequency_set`
was changed to `nrf_timer_prescaler_set`, update driver accordingly.

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-06 10:07:17 +01:00
TOKITA Hiroshi
c1fc906599 drivers: counter: gd32_timer: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
33963c43ca drivers: counter: nrfx_timer: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
21dc3f58e4 drivers: counter: nrfx_rtc: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
429b05a79a drivers: counter: stm32_timer: remove counter_stm32_is_bit_mask() function
Remove implementation of counter_stm32_is_bit_mask() and
Use IS_BIT_MASK() macro.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
Guillaume Gautier
3e6c9c40aa drivers: counter: Properly deprecate Kconfig symbols in STM32 RTC driver
Now that both RTC source clock Kconfig symbols are disabled by default,
we invert the ifdef so that in the absence of configuration we still
fall in the LSI configuration.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-09 10:14:35 +01:00
Guillaume Gautier
1cbc1c14f0 drivers: counter: Deprecate Kconfig STM32 source clock
Following #50104, properly deprecates old Kconfig symbols concerning
RTC source clock and makes them optional to have them disabled by
default.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-09 10:14:35 +01:00
Mahesh Mahadevan
3f38b011c3 drivers: counter: Update NXP LPC RTC for wakeup source
Add support to wakeup from low power modes

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-01-04 11:03:42 -06:00
Mateusz Sierszulski
d4a6a14926 drivers: counter: Add counter_gecko_stimer driver
This commit adds initial support for Silabs Real-Time counter

Co-authored-by: Filip Kokosinski <fkokosinski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2022-12-20 22:50:19 +01:00
TOKITA Hiroshi
e965db984d samples: counter: alarm: add support for GD32 boards
Add support for boards that implements the GD32 SoCs.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-12 10:08:12 +01:00
TOKITA Hiroshi
981d88bf7b drivers: counter: add support for GD32 timer
Adds support for GD32 timer

Note: Currently, it is not supporting RISC-V(GD32V) devices.
It needs some work on the interrupt controller first.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-12 10:08:12 +01:00
Patryk Duda
227ac76828 drivers: counter: Reset timer using RCC before initialization
In multi-image environment, after jump to the image we can have running
timer with interrupts enabled. If interrupt is triggered, the asserts
in the driver can cause a crash.

This patch also adds 'resets' property for all timer nodes.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-09 09:43:36 -08:00
Patryk Duda
a9ed11ab8d drivers: counter: Add __fallthrough in STM32 counter driver
STM32 counter driver uses switch statement in which cases don't end
with break or return intentionally.

Affected switches in counter driver check status of all timer channels
(maximum 4 channels), but the number of channels is not determined
during compilation. In switch, we jump to channel with highest number
and then check other channels with lower numbers.

Compiler can warn about it, so this patch adds information that it was
intentional.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-07 14:26:42 +00:00
Manuel Arguelles
4fbf940019 drivers: counter: support NXP S32 System Timer Module
NXP S32 System Timer module includes a 32-bit count-up timer and four
32-bit compare channels with a separate interrupt source for each
channel. The timer is driven by the module clock divided by an 8-bit
prescale value.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-11-30 11:29:39 +01:00
Gerson Fernando Budke
e68f568f86 drivers: counter: Enable support to stm32l5 mcu
Add driver entries to enable stm32l5 rtc driver.

Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
2022-11-29 13:40:27 +00:00
Guillaume Gautier
58f82bf243 drivers: counter: Remove unused Kconfig symbols for stm32 rtc
Remove a set of Kconfig symbols for configuring the RTC on STM32
that are no longer useful

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-11-10 11:27:49 +00:00
Guillaume Gautier
3bfc22ac73 drivers: counter: Add support for STM32 RTC source from dts
Add support for STM32 RTC source from dts

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2022-11-10 11:27:49 +00:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Keith Short
a328bc0183 include: fix native_posix_counter includes.
Add limits.h and irq.h to fix build errors for boards/tests that include
the zephyr,nativer-_posix-counter driver.

Signed-off-by: Keith Short <keithshort@google.com>
2022-10-12 16:10:05 -04:00
Pawel Czarnecki
6cc8f31310 drivers: counter: add missing includes
Add missing irq.h, spinlock.h and kernel.h headers

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2022-10-13 00:07:37 +09:00
Anas Nashif
3d85ae37b6 arm: add missing includes
Add missing includes that were previously included indirectly.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 18:37:53 -04:00
Anas Nashif
0869e62539 intel_adsp: cleanup ace_v1x-regs.h more and prep for removal
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Gerard Marull-Paretas
ac63bca423 include: add missing sys_clock.h include
Some headers made use of types defined in sys_clock.h (e.g. k_timeout_t)
without including it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
4ba74c2ec9 include: add missing limits.h include
Some files used definitions found in limits.h (e.g. INT_MAX) without
including it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
acc8cb4bc8 include: add missing irq.h include
Some modules use the IRQ API without including the necessary headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
34a6848887 include: add missing arch/cpu.h include
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas
97ef197d05 include: add missing zephyr/ prefix
Some files still manage to get into the tree without the zephyr/ include
prefix (likely because they lack CI coverage).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-06 10:41:02 +02:00
Anas Nashif
a5bd666f4e lib: notify: build sys-notify conditionally.
Add a new Kconfig and build this code conditionally, so we do not end up
with this file being built for each zephyr app.

Partial fix for #50654

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-03 10:18:15 +02:00
Sylvio Alves
e4969ec52e drivers: esp32: add check for absolute alarm configuration
ESP32 counter based on Timer or RTC misses the
COUNTER_ALARM_CFG_ABSOLUTE flag check.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-19 18:37:28 +02:00
Hu Zhenyu
3f9131ff5f tests: Enable the counter_basic_api test on mec172x board
1. enable timer5 on dts
2. Replace all BTMR_Type with struct btmr_regs, to make it compatiable
   on both mec 15 and 17
3. As MEC15 and MEC17 have different ways to access the register, use
   "#if defined" to access counter_cfg->girq_id on different board.

Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
2022-09-09 16:32:07 -04:00
Piotr Kmiecik
0acd68247f drivers: ace_v1x wallclock driver
Wallclock driver with functionality required by ACE v1x base firmware.

Signed-off-by: Piotr Kmiecik <piotrx.kmiecik@intel.com>
2022-09-06 17:44:03 +02:00
Tatsuroh Hayashi
cc434a9fe1 drivers: counter: STM32F1RTC support
Add RTC support of STM32F1 family.

Fixes #31175

Signed-off-by: Tatsuroh Hayashi <tatzu884@gmail.com>
2022-09-06 09:43:54 -05:00
Adam Wojasinski
63ab9b3c6d drivers: Replace deprecated nrfx API
This commit replaces API that became deprecated with the release
of nrfx2.9 - see CHANGELOG in zephyrproject-rtos:hal_nordic repository

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2022-08-31 10:43:14 +02:00
Jimmy Zheng
a2cc4b702f drivers: counter: add Andes atcpit100 counter driver
atcpit100 counter driver support 4 32-bit PIT channel, using channel 3 as
the default counter.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2022-08-26 11:55:36 +02:00
TLIG Dhaou
402ebb3df0 drivers: counter: Patch for the stm32 counter
Fix the TIM_Typedef types.

Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
2022-08-23 20:08:35 +02:00
Gerard Marull-Paretas
a202341958 devices: constify device pointers initialized at compile time
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).

Automated using:

```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-22 17:08:26 +02:00
Gerard Marull-Paretas
6b1e4baee4 drivers: counter: mcux_qtmr: initialize timer devices at compile time
Initialize timer devices at compile time. This allows to constify the
array of timer devices.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-19 11:51:26 +02:00