Migrate renesas,ra-agt-counter implementation to use hal_renesas.
Add additional AGT_CLOCK_SUBCLOCK count source.
Add constraint for counter resolution to 32 or 16 bit variant.
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Add support for cc23x0 RTC driver in counter.
RTC is always ON after device boot. Timer is restared only
on POR, and is active during STANDBY and ACTIVE power states.
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Add missing curly braces in if/while/for statements.
This is a style guideline we have that was not enforced in CI. All
issues fixed here were detected by sonarqube SCA.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Don't use the same name for the structure instance and type.
As that is a violation of MISRA-C 2012 rule 5.7.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This PR adds a new devicetree property
that allows enabling external battery
backup functionality.
Signed-off-by: Marcin Lyda <elektromarcin@gmail.com>
Add a workaround for NRF52 anomaly 78: "High current consumption when
using timer STOP task only". Use the SHUTDOWN task instead.
For consistency, CLEAR the timer timer after STOPPING on devices that
lack the SHUTDOWN task. This also aligns the behavior with
nrfx_timer_disable().
For devices with the SHUTDOWN task, this restores the behavior previous
to e92323f.
Fixes#87224
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
The IT8xxx2 timer driver uses timer 7 and timer 8 to implement the alarm
timer and the top timer, respectively.
Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Implement the '.reset' interface in the nrfx-timer driver
to allow the upper layers to use the counter_reset
function.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Implement the '.reset' interface in the native-posix driver
to allow the upper layers to use the counter_reset
function.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Remove deprecated nxp,kinetis-lptmr compatible string
which is superseded by nxp,lptmr compatible due to
removing family specific name.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
clean up usage of select USE_STM32_LL_RCC, USE_STM32_LL_EXTI
and USE_STM32_LL_PWR from Kconfig.stm32
this modifications due to the include unconditionally of
stm32xxxx_ll_rcc.h, stm32xxxx_ll_exti.h and
stm32xxxx_ll_pwr.h in the HAL.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Including renaming the DTS binding and kconfig options
deprecating the old one.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Move macro from nrf_clock_control.h to soc_nrf_common.h. Clock control
header fetches many dependencies (e.g. onoff.h) so move macro to more
low level header.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Since the RA2L1 uses the macro "ICU_EVENT" instead of
"ELC_EVENT" (which is currently used) to input into
the IELSR register, the ek_ra2l1 board cannot assign
any interrupts for any driver.
This commit aim to correct the Event macro to input correct
value for IELSR register on all the Renesas SoC by using
"BSP_PRV_IELS_ENUM" macro.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
The Atmel sam4l have generic clock 5 enabled at 1024Hz. Update sam4l
sam_tc_input_freq_table index 0 to reflect right value.
signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current code is enabling the IRQ before calling the GPT_Init()
function which (beside being incorrect by design) opens the door to a
spurious irq to cause the isr function call before the init. This
corner case can be easily observed for example when running the code
inside a hypervisor/jailhouse where restarting the cell without
previous proper exit (device deinit) can cause a crash (null pointer
dereference) when an IRQ is triggered before the init.
Signed-off-by: Aziz Sellami <aziz.sellami@nxp.com>
The current code is enabling the IRQ before calling the TPM_Init()
function which (beside being incorrect by design) opens the door to a
spurious irq to cause the isr function call before the init. This
corner case can be easily observed for example when running the code
inside a hypervisor/jailhouse where restarting the cell without
previous proper exit (device deinit) can cause a crash (null pointer
dereference) when an IRQ is triggered before the init.
Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
Changes introduced in 293b9a16ca didn't
verify correct behaviour when running `TIMER1` with `TIMER0` is paused,
and was reporting the wrong tick counter being incremented. Correct this
and extend the testing to verify correct behaviour.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Refactor and merge the SoC support files for the Atmel SAM E70 and SAM V71
product series. These SoCs are part of a larger product family (SAM
E70/S70/V70/V71) and share a common set of peripherals.
Support for the two remaining product series (SAM S70/V70) is not part of
this refactoring as these will require further additions to the Atmel HAL.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit adds support for the STM32WB0 series to
the existing STM32 timer-based counters driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add requesting for global HFSLL when fast instance TIMER (e.g.
TIMER120 in nrf54h20) is used.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The Atmel counter driver requires a valid pinctrl list to initialize.
This relax this condition since the timer can be used as general purpose
timer, which may not require a pin associated with the timer unit.
Fixes#83509
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
