Commit graph

947 commits

Author SHA1 Message Date
Thinh Le Cong
a218c92592 drivers: adc: Remove doxygen comment blocks
Remove all doxygen comment blocks on driver

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Thinh Le Cong
0ed8c6fa93 drivers: adc: Adding ADC 16-bit driver support for board EK-RA2A1
Adding ADC 16-bit driver compatible to support ADC16 on RA2A1

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Bartlomiej Buczek
e02a1b742a Revert "drivers: adc: nrfx: Temporary fix for SAADC power consumption"
New hal_nordic was merged some time ago, fix no longer needed.

This reverts commit fe0b6b3b55.

Signed-off-by: Bartlomiej Buczek <bartlomiej.buczek@nordicsemi.no>
2025-12-16 10:19:51 -06:00
Guillaume Gautier
cec2702012 drivers: adc: stm32: fix init issue when 2 adc are enabled
If several ADCs are used and share a common clock property (for example
ADC1/2 prescaler value on STM32U5), none of them should be enabled when
the clock is set.
To that end, make sure to disable ADC at the end of the initialization,
it will be enabled later when necessary anyway.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-15 17:10:20 +00:00
Michał Stasiak
cdb23524c3 drivers: nrf: remove GPIO HAL inclusion
Since pin retention handling was moved to nrfx,
GPIO HAL no longer has to be included in analog drivers.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-11 05:49:05 -05:00
Qingsong Gou
a8d0a7789e drivers: adc: sf32lb: fix ref_internal
Fix adc ref_internal value

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-10 17:37:09 +00:00
Sreeram Tatapudi
5ecf248ba3 drivers: infineon: Drop cat1 from the files names
Drop cat1 from the file names to enable reuse by other
category devices as well

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-07 21:19:38 -05:00
Badr Bacem KAABIA
c8d9011925 drivers: adc: mcux_adc16: Fix buffer size check for multi-channel reads
The mcux_adc16 driver's read function fails to validate the user-provided
buffer size when `adc_sequence.options` are used (extra samplings).

The calculation erroneously considered only the size required for one
channel, neglecting the total number of channels in the sequence.

This leads to a **buffer overflow** when reading multiple channels.

Fix this by using `POPCOUNT(sequence->channels)` to determine the
correct channel count and ensure the buffer size is sufficient.

Signed-off-by: Badr Bacem KAABIA <badrbacemkaabia@gmail.com>
2025-12-06 07:12:36 -05:00
Mathieu Choplain
c4d884c7ed drivers: adc: stm32: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Sai Santhosh Malae
78f47a362f drivers: adc: siwx91x: Return raw ADC value
Instead of returning a converted ADC reading, return the
raw ADC sample. Conversion is left to the user based on
the selected ADC mode (single-ended or differential).

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-04 05:21:40 -05:00
Sai Santhosh Malae
f4c152ab47 drivers: adc: siwx91x: Add ref_internal to device API
The Siwx91x ADC reference voltage is configurable rather than fixed.
Expose `ref_internal` in the device API so the driver can retrieve the
reference voltage from the device tree instead of assuming a constant
value.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-04 05:21:40 -05:00
Alvis Sun
e69bbfc55c drivers: adc: npcx: add-v2t support for npck3
Please note that when performing conversions,
the selected channels must all be of the same type
(either ADC raw or V2T.)

Mixing ADC and V2T channels in a single conversion sequence is
not supported.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-12-04 05:21:24 -05:00
Alvis Sun
b4a9e6f0b6 drivers: adc: npcx: add adc driver support for npck3
As title.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-12-04 05:21:24 -05:00
Martin Hoff
ff3637bf83 soc: silabs: siwx91x: enabled clock control by default for siwx91x soc
Enable clock control by default for siwx91x SoCs. Moreover, most
drivers for siwx91x soc depend on clock control, but didn't declare
it.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-02 15:18:53 -05:00
Aksel Skauge Mellbye
a83b19b3f9 soc: silabs: Fix clock control dependency declarations
Most drivers for Series 2 depend on clock control, but didn't
declare it. Enable clock control by default for Series 2 SoCs.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-01 11:11:14 +01:00
Nikodem Kastelik
ad1e5ac253 nordic: update and align to nrfx 4.0.1
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-11-27 14:45:17 +01:00
Qingsong Gou
e968b69db8 drivers: adc: sf32lb: add adc driver support
Add adc driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-27 11:32:59 +01:00
Ayush Singh
a9fa2ef116 drivers: adc: cc13x2_cc26x2: Fix PM
- Currently, ADC driver does not implement any PM related constraints.
  Due to this, when using it with PM enabled (example ieee802154, which
  enabled PM by default), it will stall the system.
- Similar to pwm driver, disable standby when ADC is sampling. The
  variable standby_disabled is just a flag to ensure that we disable (or
  enable) standby only when ADC driver selects it. Otherwise, it is
  possible to have a condition where ADC enabled PM and ieee802154
  disables it.
- This follows what TI SDK ADC driver does [0].

[0]: 507c93efc8/source/ti/drivers/adc/ADCCC26XX.c (L186)

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-24 17:29:44 +01:00
Ayush Singh
239e5a6b2f drivers: adc: cc13xx_cc26xx: Fix includes
- Include device specific headers even if the header files end up being
  the same.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-24 17:25:24 +01:00
John Batch
62ca912c47 modules: hal_infineon: DMA cmake lists update
Updates DMA includes from the modules needed for DMA PDL based driver
implementation.
Cleans up cmake to use only USE_INFINEON_DMA Kconfig option to select
dma files from PDL/HAL.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-18 17:49:09 -05:00
Pete Johanson
fbf04aa1c8 drivers: adc: shell: add support for ADI AD7124 ADCs
Include the correct compatible for the ADI AD7124 family of ADCs.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-11-18 11:22:06 +01:00
Josuah Demangeon
30950b888d style: drivers: sort Kconfig and CMake includes
Use the "zephyr-keep-sorted-start/stop" comment to have CI check
the alphabetical order of includes, to help reducing the chance
of conflicts while contributing drivers.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
1b87ec87ef style: drivers: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in drivers/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Etienne Carriere
97fc64e812 drivers: adc: stm32: clean instance init macro indentation
Cleanup indentation in ADC_STM32_INIT() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
b0ccb2295f drivers: stm32: use STM32_CLOCK_INFO_BY_NAME() and friends
Use STM32_CLOCK_INFO(), STM32_DT_INST_CLOCK_INFO(),
STM32_CLOCK_INFO_BY_NAME() and STM32_DT_INST_CLOCK_INFO_BY_NAME()
helper macros in STM32 drivers.

Using these macros ensure the clock division factor is properly
populated according to DT information. Prior these changes some
drivers only got the bus and bits position information and missed
the clock division information which is fine only when this division
factor information is 0.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Vinicius Carvalho
6efc612e8d drivers: adc: nxp: adc reference and differential channels
Fixed regression related to adc reference and adjusted to be
compatible with NXP K and MCX series.

Signed-off-by: Vinicius Carvalho <carvalho-vinicius@outlook.com>
2025-11-13 23:13:36 +02:00
Yuval Peress
bf0e0b3cad adc: esp32 add missing header
Without this header the logic in adc_esp32.c will never have either
ADC_CALI_SCHEME_CURVE_FITTING_SUPPORTED or
ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED defined. This means
that we always see the warnings aout uncalibrated samples.

Signed-off-by: Yuval Peress <yuval.peress@gmail.com>
2025-11-02 12:34:34 -05:00
Kim Seer Paller
fcd7842ca8 drivers: adc: Add AD4170-4, AD4190-4, and AD4195-4 ADC driver
Add initial support for the AD4170-4, AD4190-4, and AD4195-4 24-bit
ADCs, including reference selection, programmable gain amplifier, ADC
conversion modes, configurable analog inputs, filter settings, and both
bipolar and unipolar operation. Supports internal and external buffered
references, and operation from a 4.75-5.25V analog supply and a
1.7-5.25V digital supply.

Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>
2025-10-24 13:26:26 -04:00
Guillaume Gautier
7c4d42b4fd drivers: adc: stm32: add support for rcc prescaler clock
Some series like F1, F3, N6 and U3 use an ADC prescaler defined in the RCC.
Instead of adding specific properties in the RCC driver, use the secondary
clock system to configure the prescaler.

The ADC driver now configures the clocks depending on their presence and
their name. Three clocks can be defined:
- the register clock (mandatory for all series)
- the kernel clock (depends on series)
- the prescaler value (depends on series)

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-24 13:24:44 -04:00
Guillaume Gautier
004c613e25 drivers: stm32: replace MODIFY_REG HAL macro by stm32_reg_modify_bits
For all STM32 drivers and SoC, replace the MODIFY_REG macro (defined in
the STM32 HAL) by stm32_reg_modify_bits defined in Zephyr.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-24 08:58:25 -07:00
Guillaume Gautier
73e9749c68 drivers: stm32: replace SET_BIT HAL macro by stm32_reg_set_bits
For all STM32 drivers, replace the SET_BIT macro (defined in
the STM32 HAL) by stm32_reg_set_bits defined in Zephyr.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-24 08:58:25 -07:00
John Batch
7fe5875aac drivers: adc: Infineon AutAnalog SAR ADC driver
Adds AutAnalog SAR ADC driver files to support ADC conversions in the
PCSOC Edge family of MCUs.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-10-24 09:44:03 +03:00
Bjarki Arge Andreasen
bbad3d9717 drivers: nordic: support pin retention for AIN
Devices which use AIN (COMP, LPCOMP, SAADC) don't use pinctrl to
configure their pins, thus pinctrl can't manage pin retention like
is done for other devices. Thus for now, add manually disabling
pin retention to the drivers.

In the future, we should probably use pinctrl for these inputs
as well, at which point this commit can be reverted.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-10-23 18:06:30 +02:00
John Batch
75c731cbcc drivers: adc: Infineon HPPASS SAR ADC Driver
Adds HPPASS SAR ADC driver and HPPASS Analog driver files to support
ADC conversion for the PSOC C3 family of MCUs.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-10-21 22:54:55 +03:00
Guillaume Gautier
625e2acda8 drivers: adc: stm32: Rename sequencer and oversampler and fix macro issue
In STM32 ADC binding, rename the possible values of the sequencer and
oversampler properties to use lowercase string, similar to the internal
regulator.

Adapts the driver and the dtsi with the new values.

Fixes a macro issue in the driver. Since the value from the dtsi didn't
start with internal_regulator_, the reconstruction of the defines by
the macro ANY_ADC_INTERNAL_REGULATOR_TYPE_IS was missing this prefix and
the comparison failed. Add a new argument to the IS_EQ_STRING_PROP to be
able to insert such a prefix.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-16 17:11:12 +03:00
Guillaume Gautier
88735a4aa1 drivers: adc: stm32: remove useless check of internal regulator state
Disabling the internal regulator is immediate so there is no need to check
the state of the Enable bit in the register.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
67906ce049 drivers: adc: stm32: use the new differential support property
Use the new differential support property instead of relying on the series
name to determine if the ADC supports differential input channels.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
7acd045e62 drivers: adc: stm32: use the new channel preselection property
Use the new channel preselection property instead of relying on the series
name to determine if the ADC channels need to be preselecting.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
77be4b72eb drivers: adc: stm32: use the new deep powerdown property
Use the new deep powerdown property instead of relying on the series name
to determine if the ADC needs to be be put out or into deep powerdown mode.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
7c719cefd5 drivers: adc: stm32: use the new internal regulator property
Use the new internal regulator property instead of relying on series name
to determine if the regulator should be enabled, and how to check that it
is ready.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Guillaume Gautier
a0cadb03c7 drivers: adc: stm32: relies on a ll define rather than series names
For managing the CCRDY flag, rely on the presence of the LL constant
LL_ADC_FLAG_CCRDY rather than a list of series.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-10-13 11:27:22 -04:00
Martin Hoff
c2835ab6a9 drivers: adc: silabs: unify silabs adc kconfig
To reduce the number of Kconfig files and improve maintainability,
we are merging the three different Kconfig files from Silabs for ADC.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-10-09 12:42:56 -04:00
Martin Hoff
be9df47f33 drivers: adc: add DMA support for Silabs IADC
This commit introduces DMA support for the Silabs IADC driver.
A new Kconfig option is added to enable DMA support, ensuring
compatibility with the existing ADC configuration.

DMA can be used for synch/asynch operation.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-10-09 12:42:56 -04:00
Martin Hoff
4d3b459d24 drivers: adc: silabs: removed the old IADC driver
iadc_gecko driver has been replaced by adc_silabs_iadc.c.
The old files and bindings are removed.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-10-09 12:42:56 -04:00
Martin Hoff
766dbf738c drivers: adc: add IADC support for silabs series 2 boards
This commit introduces a new driver for the silabs Incremental ADC (IADC).

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-10-09 12:42:56 -04:00
Michał Bainczyk
20932639cb drivers: nrf: Add missing SoC header includes to adc and i2s
Add missing SoC header include required by memory region assertion
to adc_nrfx_saadc and i2s_nrf_tdm shims.

Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
2025-10-09 12:37:58 -04:00
Marcio Ribeiro
e8c6695f08 drivers: adc: esp32: split adc_esp32.c between 2 files
Splits driver source code between adc_esp32.c and adc_esp32_dma.c to
improve maintenance

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2025-10-08 17:47:42 +03:00
Marcio Ribeiro
a96e18de97 drivers: adc: esp32: enable adc dma on non gdma socs
Enables adc dma on:
- esp32
- esp32-s2

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2025-10-08 17:47:42 +03:00
Torbjørn Biering Tvermosegaard
863a7668b3 drivers: adc: ad599x: Fix async logic error and driver breakdown
The general ADC documentation states, that it is possible to use the
adc_read_async function with third parameter (k_poll_signal *async) set to
NULL, in which case the callback is called when all channels have been
converted. This change fixes this issue as it now also checks if a callback
has been set.

Signed-off-by: Torbjørn Biering Tvermosegaard <tbt@foss.dk>
2025-10-08 08:45:08 +02:00
Ali Hozhabri
f9655654ab drivers: Fix the improper use of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
Fix the improper use of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC for STM32WB0
drivers due to the misunderstanding of its definition.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2025-10-03 21:15:08 -04:00