Commit graph zephyr/drivers/adc
Author SHA1 Message Date
Martin Hoff
ee852fa416 drivers: adc: siwx91x: add PM device support to ADC driver
This patch adds PM device support to the siwx91x ADC driver. It allows
the ADC to be reconfigured after waking from deep sleep. Without this
patch, the ADC peripheral fails to return valid values after the system
resumes from deep sleep.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2026-06-04 14:05:14 +02:00
Sylvio Alves
14ab49c815 drivers: adc: esp32: flush dma buffer cache after dma read
Invalidate the DMA buffer after a DMA transfer so the CPU
reads the freshly captured samples instead of stale cache
lines.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-06-03 18:27:15 -04:00
Camille BAUD
16b8db7fbf drivers: bflb: Convert EFUSEs to OTP
Use new OTP API instead of syscon

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-06-02 20:19:36 -04:00
Benjamin Cabé
8d579a72fa drivers: adc: add ADC driver for M5Stack M5PM1 PMIC
Expose the M5PM1 on-chip ADC as a Zephyr ADC controller child of the MFD
device.

The driver supports rail monitoring channels (VREF, VBAT, VIN, 5VOUT),
GPIO1/GPIO2 inputs via the ADC mux, and an internal temperature channel
at 12-bit resolution.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-4.7
2026-06-02 20:18:46 -04:00
Richard Mc Sweeney
deb16ae425 drivers: mux input support for pse84 autanalog sar
Updated pse84 autanalog sar to support muxed inputs.

This implementation uses the autonomous controller (MFD).
The autonomous controller (AC) a programmable state machine. The AC
is shared across all autonomous analog peripherals including the
SAR, PRB, PTComp, CTB, and CTDAC.

The device supports 8 direct GPIO inputs and 16 muxed inputs.
The muxed inputs can be sourced from pins or from interal signals
from other autanalog blocks. Muxed inputs can be chosen by assigning
channels 8 and above. Only 2 muxed channels are allowed per sequencer
when operating in high-speed mode. 1 muxed channel is permitted per
sequencer when operating in low power mode.

Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
2026-05-29 22:05:52 +02:00
Sylvio Alves
881978f13f drivers: adc: esp32: fix dma init clock and reset sequence
The DMA path enabled the SARADC bus clock directly with
adc_ll_enable_bus_clock() and adc_ll_reset_register(), which
skips the function clock on chips where reset and clock control
are independent and also skips the temperature sensor register
preservation. On ESP32-C3 this left the SAR analog block in a
state where writing the digital controller timer enable bit
stalled the bus and hung the driver on the first DMA read.

Replace the manual sequence with adc_apb_periph_claim() and add
sar_periph_ctrl_adc_reset() at the start of every DMA read.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-05-20 14:08:52 +02:00
Davide Di Lello
82741b2614 drivers: infineon: Update copyright for Infineon
Update structure of the copyright

Signed-off-by: Davide Di Lello <Davide.Dilello@Infineon.com>
2026-05-12 22:19:02 +02:00
Srinivas Edireswarapu
80b39f06b4 drivers: adc: mchp_xec: add MEC175x support and DTS encoding
Add MEC175x SoC series support to the Microchip XEC ADC driver.
Refactor the driver to use DTS-encoded GIRQ and PCR properties
instead of series-specific ifdefs, enabling a unified driver
across MEC150x, MEC172x, and MEC175x.

Update mec_adc.h register definitions to support all three SoC
series with proper Kconfig guards for 16-channel ADC variants.

Signed-off-by: Srinivas Edireswarapu <srinivas.edireswarapu@microchip.com>
2026-05-12 22:16:23 +02:00
Ren Chen
927340f0bf drivers: adc: it8xxx2: add timeout kconfig for adc reading
Add configurable timeout(forever by default) for waiting on
data valid interrupt to prevent blocking forever if the
interrupt is unexpectedly disabled.

If k_sem_take() times out, disable adc interrupt and then
read adc value if the data is valid as fallback path.

Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
2026-05-12 09:08:43 +02:00
Guillaume Gautier
8c39353686 drivers: adc: stm32: fix get channel differential
The LL_ADC_GetChannelSingleDiff function to know whether an ADC channel
is configured as differential or single-ended was not used correctly.
This lead to systematically disabling the ADC to reconfigure it, even if
the configuration was already the correct one.

Instead of returning the mode, LL_ADC_GetChannelSingleDiff returns the
channel if it is configured as differential, or 0 if it is single-ended.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-05-06 19:57:55 +02:00
Guillaume Gautier
725e397e90 drivers: adc: stm32: lock adc during setup
If the channel setup function is called while an ADC conversion is
on-going, it can lead the system to hang indefinitely. Prevent this by
adding a locking mechanism on the setup function, similar to what is
done for the read function.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-05-04 21:57:23 +02:00
Zhaoxiang Jin
3c16651862 drivers: adc: mcux_lpadc: set BUF21 mode after enabling regulator
set BUF21 mode after enabling regulator, to ensure the buffered
output is available for the LPADC's VREFI reference.
This fixes an issue where the LPADC would produce inaccurate
conversion results due to BUF21 being left disabled.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-05-04 15:00:39 +02:00
William Markezana
557ad86efc drivers: adc: bflb: add internal TSEN channel support
Add temperature sensor (TSEN) support to the BFLB ADC driver.

When input_positive is set to the TSEN channel (14), the driver
automatically configures CONFIG2 for TSEN mode: enables TS_EN,
sets VREF to 2.0V, CHOP_MODE to Vref AZ, and clears test/debug
bits. ADC calibration is skipped for TSEN channels since the
temperature formula uses raw values.

A new adc_bflb_tsen_read_phase() function is exposed for the TSEN
sensor driver to perform the two-phase measurement (TSVBE_LOW
toggle) needed for temperature calculation.

Also makes efuse calibration failure non-fatal (warning instead
of error) since some chips lack programmed trim data.

Signed-off-by: William Markezana <william.markezana@gmail.com>
2026-04-29 16:31:08 -04:00
Alexpandi Muniyandi
e6d4293dca drivers: adc: Add a driver support for TI MSPM0 ADC module
Add driver support for TI MSPM0 ADC module.

Add a configurable reference voltage support with vref.
Add this driver in shell.

Signed-off-by: Jackson Farley <j-farley@ti.com>
Signed-off-by: Alexpandi Muniyandi <alexpandi@linumiz.com>
2026-04-24 15:38:00 -04:00
Antoniu Miclaus
073415a294 drivers: adc: ad405x: fix sample rate bit position
ad405x_reg_update_bits() performs a raw read-modify-write without
shifting the value into the field position. The sample rate field
in TIMER_CONFIG occupies bits [7:4] (AD405X_FS_BURST_AUTO_MSK =
GENMASK(7, 4)), but ad405x_set_sample_rate() passes the raw enum
value (0-15) without shifting it.

This causes the rate value to be written into bits [3:0] instead
of bits [7:4], corrupting unrelated fields and setting the wrong
sample rate.

Shift the value by 4 to place it into the correct bit position,
consistent with how other callers handle non-zero-based fields
(e.g., ad405x_set_gp_mode() manually shifts for GP1_MODE_MSK).

Fixes: 4a9d1473d3 ("drivers: adc: ad405x: Add AD405X driver")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
2026-04-24 13:01:39 +02:00
Antoniu Miclaus
2146308638 drivers: adc: ad4114: fix uninitialized status variable
The status variable is used in the while loop condition before
ad4114_read_reg() has a chance to populate it. If the uninitialized
stack value happens to have bit 7 set, the loop is skipped entirely
and the driver proceeds to read ADC data before the conversion is
ready, returning stale or invalid results.

Initialize status to 0 so the loop always executes at least once.

Fixes: 8250cc68b7 ("drivers: adc: ad4114: add driver support")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
2026-04-23 07:10:58 -04:00
Antoniu Miclaus
38c6ca3c15 drivers: adc: ad405x: fix bitwise AND used instead of logical AND
Use logical AND (&&) instead of bitwise AND (&) when checking the
product ID during initialization. The intent is to verify that the
product ID matches neither AD4052 nor AD4050, which requires a
logical operation.

Fixes: 4a9d1473d3 ("drivers: adc: ad405x: Add AD405X driver")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
2026-04-23 07:10:47 -04:00
Guillaume Gautier
0d55eba1b1 drivers: adc: stm32: fix channel 0 setting on stm32h5
On STM32H5, the bit 0 of the Option register of ADC1 controls the channel 0
switch control. It has to be set if either ADC1 or ADC2 wants to use this
channel. Until now, it was enabled only if ADC1 requested channel 0. This
commit fixes this by setting the option bit if channel 0 is used, with no
consideration of the ADC instance.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-04-22 17:14:38 +02:00
John Batch
2a3783442b drivers: adc: infineon: fix HPPASS SAR channel lookup for hex addresses
Correct the IFX_HPPASS_SAR_CH_EXISTS macro to correctly match devicetree
nodes using a hex address.

Assisted-by: Github Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
2026-04-21 18:42:05 -04:00
Richard Mc Sweeney
9e8b3cf7ea drivers: Refactor pse84 autanalog-adc to use MFD
- Added autanalog MFD support in PSE84 DTS files
- Refactored autanalog ADC in PSE84 to use a common
MFD for handling the global AC configuration
- Constructed AC to use phandle in the overlay
for a better the user experience.
- Added support for a basic and advanced mode
with custom AC

Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
2026-04-17 10:36:07 +02:00
Jjateen Gundesha
0c9fd34a46 drivers: adc: lpadc: fix calibration sequencing with 1us delay
LPADC_DoOffsetCalibration() triggers offset calibration but returns
immediately without waiting for it to complete. If gain calibration
is requested before offset calibration finishes, the hardware silently
rejects it and GCC[RDY] never asserts, causing
LPADC_FinishAutoCalibration() to spin forever at boot (~50% of the
time on affected boards like FRDM-MCXA266).

Fix by replacing LPADC_DoAutoCalibration() with the split HAL API:
  LPADC_PrepareAutoCalibration() + k_busy_wait(1U) +
  LPADC_FinishAutoCalibration()

The 1us busy-wait gives offset calibration sufficient time to complete
on all LPADC platforms before the gain calibration request is issued.
Only the HAS_CTRL_CALOFS path is affected (the path that also calls
DoOffsetCalibration); the HAS_CFG_CALOFS path has no preceding offset
calibration and is left unchanged.

Fixes #105652

Signed-off-by: Jjateen Gundesha <jjateen97@gmail.com>
2026-04-07 08:39:42 -05:00
Aksel Skauge Mellbye
315da11745 drivers: adc: siwx91x: Fix clock configuration
Since `a78cd34` the ADC driver did not correctly configure
its internal divisor. The responsibility was moved from the
clock control driver to the ADC driver and the `init` function
of the ADC driver was updated accordingly. But the driver
continued calling the clock control API from the `configure`
function, leading to `-EINVAL` being returned.

Correctly configure the internal divisor in the ADC driver by
calling the HAL API directly.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2026-04-02 08:48:48 -05:00
Pieter De Gendt
acf7dd4847 drivers: adc: Use DEVICE_API macro
Put ADC device driver APIs into corresponding iterable section.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2026-04-02 08:47:22 -05:00
Ren Chen
06f17b1768 drivers: adc: it51xxx: validate buffer size in start_read()
Move buffer size validation into `start_read()` to prevent adc
context from getting stuck. This issue is revealed by
`tests/drivers/adc/adc_error_cases` test.

Also, this patch adds check for unsupoorted options, including
oversampling and invalid resolution and adds support for higher
channel range. (8 and above).

Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
2026-04-01 09:16:23 -05:00
Guillaume Gautier
9e10d4a7ca drivers: adc: stm32: fix preselection register for stm32h72x/73x
STM32H72x/73x ADC have a PCSEL_RES0 register instead of PCSEL for other
series.
Make a special case to prevent a compilation error.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-31 13:54:23 -05:00
Pisit Sawangvonganan
3c44bcd2a0 drivers: fix typo in (adc, audio, bluetooth, can, charger)
Utilize a code spell-checking tool to scan for and correct spelling errors
in all files within:
- `drivers/adc`
- `drivers/audio`
- `drivers/bluetooth`
- `drivers/can`
- `drivers/charger`

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2026-03-27 20:21:24 -04:00
Tim Pambor
22d1ea568e drivers: adc: shell: fix a dangling pointer warning
Fix a dangling pointer warning in adc_shell.c by placing the
help text in a static variable instead of returning a pointer
to a local variable.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2026-03-27 09:16:21 +01:00
Amneesh Singh
f4e25a3f50 drivers: adc: am335x_ti: fix log format specifier
Change format specifier to %zu for size_t. While at it, also change
required_size to size_t, for better compatibility. This prevents
compilation warnings.

Signed-off-by: Amneesh Singh <amneesh@ti.com>
2026-03-25 07:53:17 -04:00
Guillaume Gautier
e0d3379c07 drivers: adc: stm32: add stm32c5 adc support
Update STM32 ADC driver for STM32C5 and STM32 HAL2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-24 09:07:31 -04:00
Guillaume Gautier
22b086de60 drivers: adc: stm32: add an error message if calibration is missing
To prevent missing calibration when adding new series, add an error
message if no calibration is done.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-24 09:05:34 -04:00
Guillaume Gautier
1aeb56e8c0 drivers: adc: stm32: add calibration for stm32u3
Calibration for STM32U3 ADC was missing.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-24 09:05:34 -04:00
Zhaoxiang Jin
a1d27d4f7f adc: shell: migrate to SHELL_HELP macro
Migrate ADC shell command help strings to use the SHELL_HELP
macro for consistent formatting and improved maintainability.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-03-24 09:55:34 +01:00
Pierrick Curt
8f59a69840 drivers: adc: mcp3221: add driver support
The MCP3221 is a 1-channel 12-bit A/D converter with I2C interface.

Signed-off-by: Pierrick Curt <pierrickcurt@gmail.com>
2026-03-24 09:54:56 +01:00
Guillaume Gautier
eadb255c75 drivers: adc: use the new injected support property in the driver
Use the new has-injected-support property in the Kconfig instead of
filtering on series directly, and use it also in the driver to return an
error if a specific instance doesn't support injected (this is the case
for STM32U5 where ADC1 and 2 support injected, but not ADC4).

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-23 10:37:18 -04:00
Guillaume Gautier
6d664ea6bf drivers: adc: stm32: do not stop conversion unconditionally
In order to write into some ADC registers, it is necessary to have no
on-going conversions (either regular, injected, or both). Until now, each
time such a write was needed, the ADC was disabled unconditionally,
stopping any potential on-going conversion.

With the introduction of the injected mode, this could lead to problems
if for example an injected is configured differently than a running
regular one. In that case it would stop the regular conversion. If the
application is waiting the result before starting another one, it will be
stuck waiting forever.

To avoid cases like this, return an error rather than stopping conversion
and disabling the ADC. This reworks many functions to return an error in
case it was not possible to safely disable the ADC.

It stays possible to force an ADC disable even though a conversion is
running, this is useful at init where we don't want this to fail.

This also creates a dedicated function for the preselection register to
avoid duplication.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-23 10:37:18 -04:00
Guillaume Gautier
a9f59076e0 drivers: adc: stm32: add injected mode support
Add injected mode support for STM32 ADC driver. To avoid potential
conflicts when configuring the ADC registers, some settings (like presel)
are moved into the channel_setup function when injected is enabled.

Also configures an ISR when DMA and injected mode are enabled. The reason
is that DMA is not available for injected sequence, so an ISR is still
necessary in this case.

Factorizes the "start_read_xxx" functions to avoid needless duplication
between sync/async and regular/injected mode.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-23 10:37:18 -04:00
Guillaume Gautier
d739f1c8c4 include: zephyr: drivers: adc: add sequence priority
Add sequence priority support in the ADC API.
The priority assigned to a sequence reflects how time-sensitive it is
compared to other sequences. The number of priority levels supported
and the exact behavior obtained by assigning a specific priority to a
sequence are hardware-specific.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-23 10:37:18 -04:00
Fabrice DJIATSA
782c47f6bb drivers: adc: stm32: Remove call to LL_ADC_REG_SetContinuousMode
It is unnecessary since it is never set to continuous (and single is the
default value), and causes issues on STM32F1 by starting conversions out
of turn (setting ADON bit while it is already set, without changing
any other bit in the register start a conversion).

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-03-23 08:48:46 -04:00
Hau Ho
5acd81b6a4 drivers: adc: renesas: Add MCU-specific macro to skip conv_speed on RX14T
Add MCU-specific macro to skip conv_speed on RX14T

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2026-03-23 10:16:41 +01:00
Gabriele Zampieri
96f6dc50ac drivers: adc: max2253x: initial driver support
The max2253x family is a Field-Side Self-Powered, 4-Channel,
12-bit, Isolated ADC.

Signed-off-by: Gabriele Zampieri <gabriele.zampieri@arsenaling.com>
2026-03-19 12:29:32 +09:00
William Markezana
d547042bf9 drivers: bflb: extend shared drivers with BL70XL SoC support
Add CONFIG_SOC_SERIES_BL70XL to preprocessor conditionals across
existing Bouffalo Lab drivers that share register-compatible code
paths with BL60x/BL70x:

- cache: L1C flush-enable workaround applies to BL70XL
- flash: XIP address defines, L1C wrap, QPI JEDEC ID support
- gpio: BL70XL includes, fix BIT() usage for pin set/clear
- i2c: clock source calculation
- serial: UART clock divider, guard UART1 (BL70XL has only UART0)
- spi: GLB address and FIFO size, clock calculation
- syscon: efuse SAHB clock selection
- input: IR receiver pin mapping and clock divider

Signed-off-by: William Markezana <william.markezana@gmail.com>
2026-03-18 17:40:26 -05:00
Shankar Ramasamy
e521064e64 drivers: adc: microchip: Update ADC G1 driver for PIC32CM_JH01
Update ADC G1 driver implementation to support PIC32CM_JH01

Signed-off-by: Shankar Ramasamy <shankar.ramasamy@microchip.com>
2026-03-18 15:21:47 -05:00
Etienne Carriere
88f9ade8ed drivers: adc: stm32wb0: use LL_GetPackageType()
Use LL_GetPackageType() HAL function since it is fixed in WB0x HAL
v1.3.0.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2026-03-17 18:26:31 -04:00
Guillaume Gautier
872b423b63 drivers: adc: stm32: add rtio support
Add RTIO support for the STM32 ADC driver to be able to stream data
continuously.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-16 12:28:34 +01:00
Sylvio Alves
c64a74e711 espressif: adapt to hal_espressif IDF master sync
Adapt all Espressif SoC and driver code to the updated
hal_espressif module synced with IDF master branch.

Main changes:
- clock control: delegate peripheral clock gating to HAL
  layer using new clock/reset APIs
- SPI/GDMA: adapt to restructured DMA HAL with new channel
  allocation and configuration interfaces
- ethernet: add RMII clock configuration and PHY management
- GPIO: simplify using direct HAL function calls
- flash: adapt to updated SPI flash HAL interfaces
- linker scripts: update IRAM/DRAM mappings for new HAL
  object files
- DTS: fix ESP32-S2 PSRAM dcache1 address to match actual
  MMU mapping region (0x3f800000 DRAM1 instead of 0x3f500000
  DPORT which lacks 8-bit access capability)
- west.yml: update hal_espressif revision

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-03-13 11:38:18 +01:00
Zhaoxiang Jin
74f6827c32 drivers: adc: mcux_lpadc: Add device PM Action suppport
Add device PM Action suppport for lpadc driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-03-13 07:09:22 +01:00
Zhaoxiang Jin
af3bfc6084 drivers: adc: mcux_lpadc: Add support for PM policy device constraints
Add support for PM policy device constraints to the MCUX LPADC driver.
This allows the driver to specify that certain power states should be
disabled when the device is active, which can help ensure proper operation
and reduce power consumption.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-03-13 07:09:22 +01:00
Zhaoxiang Jin
d6168d4d3e drivers: adc: add shell commands for ADC emulator
Add shell commands for the ADC emulator driver (zephyr,adc-emul) to
allow runtime configuration of emulated ADC values during testing and
development.

The new shell commands support:
- Setting constant raw ADC codes for a channel
- Setting constant input voltage in millivolts for a channel

Commands are dynamically populated with available ADC emulator devices
from the devicetree. This enables interactive testing of ADC-dependent
code without requiring physical hardware or signal generators.

Example usage:
  adc_emul <device> raw <channel> <value>
  adc_emul <device> mv <channel> <millivolts>

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-03-09 11:05:50 +01:00
Zhaoxiang Jin
8f1dfd5fb3 drivers: adc: emul: allow differential mode with warning
Change the ADC emulator driver to accept differential mode configuration
instead of rejecting it with -ENOTSUP. When differential mode is requested,
the driver now logs a warning that samples are provided as raw codes and
continues operation.

This allows testing of ADC configurations that use differential mode
without requiring the emulator to implement full differential conversion
logic. The raw code values can still be set via shell commands or API
calls for testing purposes.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-03-09 11:05:50 +01:00
Albort Xue
d40e921228 drivers: add: mcux_lpadc: Add clock configuration and enable
Add explicit clock configuration and enable calls during driver
initialization.

Note: -ENOSYS is temporarily ignored as not all clock control
drivers currently implement the configure API. This handling
should be removed once all clock drivers support configure.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2026-03-05 04:38:52 +01:00