Adopt new sys_count_bits helper from util.h and avoid
having conflicting definition
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Enable the adc_error_cases test on Series 2 devices and change
the return values in the driver for unsupported configurations
to what the test expects.
Ensure that the resolution configuration in the test is valid
such that the invalid buffer test correctly receives -ENOMEM.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
The ADC driver API already supports ADC readings which can return signed
values, these are differential readings. In Nordic's datasheet, we have
a mode called "single ended", but its just a name. "Single ended" is a
differential reading, with the negative channel tied to GND. This is not
compatible with zephyrs definition of a single ended reading.
To support Nordic's "single ended" mode, the user must configure
a differential reading, with the negative input tied to ground, which
the saadc driver can then use to configure the reading as Nordic SAADC
"single ended", and return negative values as expected.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
The stm32u3x header files defines LL_ADC_SINGLE_ENDED but not
LL_ADC_DIFFERENTIAL as the device doesn't support differential mode. The
driver only checked for LL_ADC_SINGLE_ENDED and assumed that when that was
defined, LL_ADC_DIFFERENTIAL would also be defined.
Check for both when figuring out which calibration type will be required.
Signed-off-by: Keith Packard <keithp@keithp.com>
The SAMPLERATE register can be used as a local timer instead
of triggering individual SAMPLE tasks. When SAMPLERATE.MODE is set
to Timers, it is sufficient to trigger SAMPLE task only once in order
to start the SAADC and triggering the STOP task will stop sampling.
The SAMPLERATE.CC field controls the sample rate.
The SAMPLERATE timer should not be combined with SCAN mode and
only one channel should be enabled when using the internal timer.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
This Kconfig does not belong in the ADC folder, because there is not
actually a zephyr ADC driver for this. Also, remove HAS_MCUX_ADC_ETC as
well because it is a useless config.
The cmake line to pull in this driver from the SDK in the zephyr repo is
totally unnecessary. If a user wants to use this SDK driver they can add
it to their build like any other SDK driver or any other
external code module. Zephyr should not be a cesspool of random build
glue for random pieces of code.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Remove the configs that are not actually used for anything anymore or
never were, or that are redundant with other configs, and don't have any
code changes outside of Kconfig to remove.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This is temporary fix for SAADC power consumption. Need to be
removed after hal_nrfx version upgrade.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
The original code process causes the following two issues:
1. The first sample is always 0 because the `ctx` sequence in `data` is
assigned the input sequence until the `adc_context_start_read`. As a
result, the `while (channels) { ... }` loop is not executed, and
`adc_enable_measurement` is not called.
2. Since the `ctx` sequence in `data` is assigned in
`adc_context_start_read`, which occurs after the `while (channels) {
... }` loop, the ADC samples the previously set channel.
Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
The IO_CONTROL_1 register is 3 bytes long according to the datasheet.
This fixes the register not being written to correctly.
Signed-off-by: Luna Pes <zephyr@orangemurker.com>
Add build asserts for "memory-regions" property in nrf drivers which is
required on targets with DMM for saadc, pdm, pwm, twim, twim_rtio, twis,
tdm, uarte, spim and spis. On targets where the property is not required
the assertion macro expands to nothing.
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
Differential mode support consists of:
- If differential mode is supported by the underlying hardware AND at
least one differential channel is enabled in the devicetree for this
ADC instance, then perform a differential mode calibration in addition
to the usual single ended calibration during initialisation.
- Set channels to the appropriate differential or single ended mode
during channel setup.
Currently the N6 series is not supported even though the underlying
hardware supports differential mode, due to complications in the
calibration procedure.
Signed-off-by: Matt Rodgers <mrodgers@witekio.com>
Co-authored-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
GAIN field is not present on LV10A, so instead we need to
check the input value to the function.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
The CH32V003 has a 8 channel, 10 bit onboard ADC. Add an immediate
mode driver and the appropriate pinctrl bindings. Note that the
CH32V003 GPIO pins have both a floating input and an analogue input
mode, and the pinctrl is needed to put the pin in analogue mode.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Check that the channels are configured with the reference
ADC_REF_INTERNAL when compiling the driver.
Signed-off-by: Colin Evrard <colin.evrard@mind.be>
SHIM Nordic modification for the ADC driver controlling the SAADC
peripheral. Replaced HAL based implementation in favor of nrfx driver.
As a next step, it is planned to implement a feature that will allow
the peripheral SAADC timer to be used for sampling, and for this it is
necessary to use the nrfx driver in this SHIM.
This will allow more accurate and faster sampling than the kernel
mechanism currently provides.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Corrected the timeout condition in the ti_adc_sequencer_start function
to ensure proper timeout handling during ADC sequencer operations.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
For a long time (since version 3.3.0) nrfx contained an incorrectly
defined symbol NRF_SAADC_8BIT_SAMPLE_WIDTH that was set to 8 for nRF54L
and nRF54H Series SoCs, which was probably only true for very early
engineering revisions of those. Based on this, the adc_nrfx_saadc driver
was incorrectly writing consecutive 8-bit samples in supplied buffers,
cutting off the highest 8 bits of the results. And for sequences with
multiple channels, it was even causing that the results written as
16-bit words by hardware were partially overwritten in next iteration.
In nrfx 3.12.0 (see commit f46798fa55)
this was finally corrected - the symbol is now deprecated and it is
always set to 16. This commit is a follow-up to the above and removes
parts of adc_nrfx_saadc that now became dead code to prevent further
confusion regarding 8-bit sampling.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
It is not an error if the clock source is already enabled. This
may happen if a bootloader has used the peripheral and not
de-initialized it before booting the application.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Prevent integer underflow when sequence->channels is 0.
Add an explicit check before calling find_msb_set().
Coverity CID: 487765
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
The ADC has a dedicated interface for communicating with the DMA.
The ADC module provides four interrupt sources (one for each
conversion result storage register) which can be configured to
source the DMA trigger.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Add check for odr <= 0 and cast odr to uint32_t before multiplication
to avoid integer overflow and division by zero.
Fixes: CID 489220
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
Several drivers checked for the presense and availability of data cache
through Kconfig symbol. This is supported according to the current
documentation, but the symbol DCACHE masks two types of cache devices: arch
and external caches. The latter is present on some Cortex-M33 chips, like
the STM32U5xx. The external dcache is bypassed when accessing internal
SRAM and only used for external memories.
In commit a2dd232410 ("drivers: adc: stm32: dma support") the rationale
for gating dcache for adc_stm32 behind STM32H7X is only hinted at, but
reason seems to be that it was the only SOC the change was tested on. The
SOC configures DCACHE=y so it is most likely safe to swap the SOC gate for
DCACHE.
The DCACHE ifdefs are now hidden inside the shared stm32_buf_in_nocache()
implementation.
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
This patch adds the ADC driver for TI K3 family of SoCs. Technical
reference can be found in the Technical Reference Manual (TRM) of the
board.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Add driver for the microchip MCP3561/2/4R ADC. Registers lock and
CRCCFG protection mecanism is not implemented. Tested on an MCP3564R.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
Add initialization of `ret` to avoid reports of uninitialized variable
being returned. This variable normally gets initialized while the loop
iterates over channels, but potentially it could be left uninitialized
if the loop finished in its first iteration because of no channels to
be processed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
