Commit graph

128 commits

Author SHA1 Message Date
Eugeniy Paltsev 14afc02caa isr_tables: adopt _irq_vector_table for using on 64bit architectures
As of today generic _irq_vector_table is used only on 32bit
architectures and 64bit architectures have their own implementation.
Make vectors size adjustable by using uintptr_t instead of uint32_t
for vectors.

The ARCv3 64 bit HS6x processors are going to be first users for
that.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-01-04 16:47:51 -08:00
Daniel Leung 9be37553ee timing: do not repeatedly do init()/start()/stop()
We should not be initializing/starting/stoping timing functions
multiple times. So this changes how the timing functions are
structured to allow only one initialization, only start when
stopped, and only stop when started.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-11-11 23:55:49 -05:00
Torstein Grindvik c02eb30bbf gen_isr_tables: Function ptr instead of (void *)
gen_isr_tables.py generates C-code which initializes a table with
values, and these values are structs with members cast to
(const void *) and (void *), respectively.

The actual struct definition has a member of type (const void *)
and another of type void (*)(const void *).

In order to avoid a large amount of reported issues in Coverity,
cast this to the exact type.

Signed-off-by: Torstein Grindvik <torstein.grindvik@nordicsemi.no>
2020-10-02 18:48:46 +02:00
Anas Nashif 6e27478c3d benchmarking: remove execution benchmarking code
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.

For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.

Furthermore, much of the assembly code used had issues.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif 5dec235196 arch: default timings for all architectures
Use default if architecture does not have a custom timing
implementation.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Eugeniy Paltsev a28ec6201f isr_tables: don't whole-archive library
As of today we have a bit weird situation with generated
sw_isr_table / irq_vector_table tables.

On the final linkage stage we pass two files which content
section with sw_isr_table / irq_vector_table. They are
 * libarch__common.a (with an outdated tables from the first
   linkage stage)
 * isr_tables.c.obj (with an actual tables)

The sections where tables are located are marked with
".gnu.linkonce" prefix. That means:
<<<As a GNU extension, if the name begins with .gnu.linkonce,
we only link a single copy of the section.>>>

However the "libarch__common.a" is passed to linker with
"--whole-archive" option which means <<<include every object
file in the archive in the link, rather than searching the archive
for the required object files>>>

That combination confuses MWDT linker and breaks linkage with
MWDT toolchain.

As a simple fix we can move the sw_isr_table / irq_vector_table
sections to their own library and link this library with
"--no-whole-archive" option.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Tomasz Bursztyka 93cd336204 arch: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka 6df8b3995e irq: Change dynamic API to take a constant parameter
All ISRs are meant to take a const struct device pointer, but to
simplify the change let's just move the parameter to constant and that
should be fine.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Stephanos Ioannidis 3322489d22 config: Rename TEXT_SECTION_OFFSET to ROM_START_OFFSET
The `TEXT_SECTION_OFFSET` symbol is used to specify the offset between
the beginning of the ROM area and the address of the first ROM section.

This commit renames `TEXT_SECTION_OFFSET` to `ROM_START_OFFSET` because
the first ROM section is not always the `.text` section.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-07-09 14:02:38 -04:00
Kumar Gala a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Martí Bolívar 6d0896b7ec gen_isr_tables: error improvements
Random readability improvements:

- avoid a stack trace on error by using sys.exit()
- include "error:" in the error() output, for grep
- print conflicting addresses on multiple IRQ registration

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-17 18:28:47 +02:00
Stephanos Ioannidis cdbfbe396f tests: benchmarks: Fix incorrect ARM arch variant check
Currently, the Cortex-M SysTick-based timing info implementation is
incorrectly specified for all 32-bit ARM architectures.

This commit fixes that by restricting the SysTick-based implementation
to the ARM Cortex-M architectures only; in addition, it removes the
ARM64 timing info implementation as it is identical to the default
generic implementation and was previously added only as a workaround
for the aforementioned problem.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-15 15:49:27 +02:00
Stephanos Ioannidis 819fe00071 tests: benchmarks: Fix Kconfig symbol checks
This commit fixes the incorrect (or un-conventional, at least) Kconfig
boolean symbol checks.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-15 15:49:27 +02:00
Jaron Kelleher 0fb4382164 arch: isr: Update z_isr_install for multi-level interrupts
z_isr_install is not suited to handle multi-level interrupt formats.
This update allows z_isr_install to accept irq numbers in zephyr format
and place them in the isr table appropriately.

Fixes issue #22145

Signed-off-by: Jaron Kelleher <jkelleher@fb.com>
2020-04-09 13:12:24 -07:00
Daniel Leung 7bb5015ced tests: benchmarks: use high-res counter for MEC1501 SoC
The timer counter for ticks on MEC1501 SoC is based on the RTOS
timer which runs at 32kHz. This is too slow for timing benchmarks
as most cases can be finished within one or two ticks. Since
the SoC has higher frequency timers running at 48MHz, add
the necessary bits to use these for timing benchmarks.

Fix #23414

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-31 19:52:21 -04:00
Stephanos Ioannidis b58cc459de interrupts: Do not assert on IRQ enable status for ISR install on GIC
The current `z_isr_install` implementation asserts that the IRQ to
which the ISR will be installed must be disabled.

This commit disables that assertion for the ARM GIC because the SGI-
type IRQs can never be disabled as per the specifications and this
causes the assertion to fail for them.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-31 19:24:48 +02:00
Stephanos Ioannidis e816ac7124 isr_tables: Support hardware interrupt vector table-only configuration.
The existing isr_tables implementation does not allow enabling only
hardware interrupt vector table without software isr table.

This commit ensures that CONFIG_GEN_IRQ_VECTOR_TABLE can be used
without setting CONFIG_GEN_SW_ISR_TABLE.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-13 12:02:03 +01:00
Carlo Caione 868264b8b4 tests: benchmarks: Add ARM64 case
To be able to pass the unit test we need to add a set of defines for the
ARM64 architecture. Fix this.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Øyvind Rønningstad 350f184d98 arch: common: Delete isr_tables.ld which was a copy of intlist.ld
Refer directly to intlist.ld in zephyr_linker_sources()

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-30 14:19:14 -05:00
Sebastian Bøe 7d3fa1c2c8 gen_isr_tables: Improve error message
Users are reportedly not able to understand how to debug the following
error message from gen_isr_tables:

gen_isr_tables.py: multiple registrations at table_index 8 for irq 8

Debugging issues these kinds of issues is difficult so we need to give
users as much information as possible.

To make it clearer that it could be an abuse of the 'IRQ_CONNECT' API
that is causing the issue we add this to the error message.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2020-01-29 14:21:00 -08:00
Øyvind Rønningstad 05f0d85b6a extensions.cmake: Replace TEXT_START with ROM_START
In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.

All uses of TEXT_START are replaced with ROM_START.

ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.

No SORT_KEYs are changed.

This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Carlo Caione aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Øyvind Rønningstad 0b2c8e201c arm, x86, riscv: linker.ld: Move TEXT_SECTION_OFFSET
to its own linker file snippet so snippets can be placed before it.
Using zephyr_linker_sources().

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Andrew Boie 4f77c2ad53 kernel: rename z_arch_ to arch_
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.

This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Stephanos Ioannidis 7bcfdadf81 arch: Simplify private header include path configuration.
When compiling the components under the arch directory, the compiler
include paths for arch and kernel private headers need to be specified.

This was previously done by adding 'zephyr_library_include_directories'
to CMakeLists.txt file for every component under the arch directory,
and this resulted in a significant amount of duplicate code.

This commit uses the CMake 'include_directories' command in the root
CMakeLists.txt to simplify specification of the private header include
paths for all the arch components.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-06 16:07:32 -08:00
Stephanos Ioannidis 2d7460482d headers: Refactor kernel and arch headers.
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.

The refactoring strategy used in this commit is detailed in the issue

This commit introduces the following major changes:

1. Establish a clear boundary between private and public headers by
  removing "kernel/include" and "arch/*/include" from the global
  include paths. Ideally, only kernel/ and arch/*/ source files should
  reference the headers in these directories. If these headers must be
  used by a component, these include paths shall be manually added to
  the CMakeLists.txt file of the component. This is intended to
  discourage applications from including private kernel and arch
  headers either knowingly and unknowingly.

  - kernel/include/ (PRIVATE)
    This directory contains the private headers that provide private
   kernel definitions which should not be visible outside the kernel
   and arch source code. All public kernel definitions must be added
   to an appropriate header located under include/.

  - arch/*/include/ (PRIVATE)
    This directory contains the private headers that provide private
   architecture-specific definitions which should not be visible
   outside the arch and kernel source code. All public architecture-
   specific definitions must be added to an appropriate header located
   under include/arch/*/.

  - include/ AND include/sys/ (PUBLIC)
    This directory contains the public headers that provide public
   kernel definitions which can be referenced by both kernel and
   application code.

  - include/arch/*/ (PUBLIC)
    This directory contains the public headers that provide public
   architecture-specific definitions which can be referenced by both
   kernel and application code.

2. Split arch_interface.h into "kernel-to-arch interface" and "public
  arch interface" divisions.

  - kernel/include/kernel_arch_interface.h
    * provides private "kernel-to-arch interface" definition.
    * includes arch/*/include/kernel_arch_func.h to ensure that the
     interface function implementations are always available.
    * includes sys/arch_interface.h so that public arch interface
     definitions are automatically included when including this file.

  - arch/*/include/kernel_arch_func.h
    * provides architecture-specific "kernel-to-arch interface"
     implementation.
    * only the functions that will be used in kernel and arch source
     files are defined here.

  - include/sys/arch_interface.h
    * provides "public arch interface" definition.
    * includes include/arch/arch_inlines.h to ensure that the
     architecture-specific public inline interface function
     implementations are always available.

  - include/arch/arch_inlines.h
    * includes architecture-specific arch_inlines.h in
     include/arch/*/arch_inline.h.

  - include/arch/*/arch_inline.h
    * provides architecture-specific "public arch interface" inline
     function implementation.
    * supersedes include/sys/arch_inline.h.

3. Refactor kernel and the existing architecture implementations.

  - Remove circular dependency of kernel and arch headers. The
   following general rules should be observed:

    * Never include any private headers from public headers
    * Never include kernel_internal.h in kernel_arch_data.h
    * Always include kernel_arch_data.h from kernel_arch_func.h
    * Never include kernel.h from kernel_struct.h either directly or
     indirectly. Only add the kernel structures that must be referenced
     from public arch headers in this file.

  - Relocate syscall_handler.h to include/ so it can be used in the
   public code. This is necessary because many user-mode public codes
   reference the functions defined in this header.

  - Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
   necessary to provide architecture-specific thread definition for
   'struct k_thread' in kernel.h.

  - Remove any private header dependencies from public headers using
   the following methods:

    * If dependency is not required, simply omit
    * If dependency is required,
      - Relocate a portion of the required dependencies from the
       private header to an appropriate public header OR
      - Relocate the required private header to make it public.

This commit supersedes #20047, addresses #19666, and fixes #3056.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-06 16:07:32 -08:00
Andrew Boie 9e1dda8804 timing_info: rename globals
Global variables related to timing information have been
renamed to be prefixed with z_arch, with naming arranged
in increasing order of specificity.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-30 15:25:55 -04:00
Ioannis Glaropoulos 4be1f45d1e arch: arm: minor clean-up in irq_init.c and timing_info_bench.c
- Remove redundant inclusions in irq_init.c
- Remove comment about thread_abort function,
  which does not belong in this file (probably
  left-out during code refactoring)
- Include arm cmsis.h only under #ifdef CONFIG_ARM

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-24 16:59:42 +02:00
Ulf Magnusson 247d40cf55 gen_isr_tables: Fix pylint warning by using isinstance()
Fix this warning, as a preparation for a CI check:

    arch/common/gen_isr_tables.py:167:11: C0123: Using type() instead of
    isinstance() for a typecheck. (unidiomatic-typecheck)

isinstance() has the advantage that it also handles inheritance, though
it doesn't really matter here. It's more common at least.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-08 22:24:45 -04:00
Ulf Magnusson 0d39a10fbb scripts: Fix random typo'd whitespace
Reported by pylint's 'bad-whitespace' warning.

Not gonna enable this warning in the CI check, because it flags stuff
like deliberately aligning assignments and gets too cultish. Just a
cleanup pass.

For whatever reason, the common convention in Python is to skip spaces
around '=' when passing keyword arguments and giving default arguments:

    f(x=3, y=4)
    def f(x, y=8):
        ...

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-09-07 07:54:17 -04:00
Andy Ross 74d26094f8 arch/common: Provide a weak, generic z_arch_irq_connect_dynamic()
It was discovered that the xtensa version of
z_arch_irq_connect_dynamic() was being removed along with the old
xtensa architecture support, because it was never included in the asm2
builds.

But there's no xtensa-specific code in it at all.  Architectures that
use the existing sw_isr_table mechanism and don't (or can't, in the
case of xtensa which has fixed interrupt priority) interpret the other
parameters might as well have access to a working generic
implementation.

Fixes #18272

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-08-22 17:53:51 -04:00
Anas Nashif 5eb90ec169 cleanup: include/: move misc/__assert.h to sys/__assert.h
move misc/__assert.h to sys/__assert.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Ioannis Glaropoulos 6cbc0e0bd9 arch: common: nocache: fix linker section definition
No-cache SRAM section is currently used for ARM-only builds
with support for no-cacheable memory sections (i.e.
CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT) and it holds
uninitialized data. This commit properly defines the
corresponding linker section using SECTION_DATA_PROLOGUE
and GROUP_DATA_LINK_IN macros.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-19 09:08:40 -07:00
Augusto Hack 0296938c9f arch: common: gen_isr_tables table size check
Added simple and fairly conservative sanity check for interrupt table
size

Signed-off-by: Augusto Hack <me@hak.cx>
2019-06-17 17:03:02 -07:00
Nicolas Pitre 9bd9b7586d Kconfig: introduce CONFIG_64BIT
This is the generic symbol to select or otherwise test for when 64-bit
compilation is desired. Two trivial usages of this symbol are also
included.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-06-07 17:48:47 -04:00
Øyvind Rønningstad c760ca02eb arch: Put intlist.ld into Cmake
Remove from linker.ld

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-05-20 22:28:28 -04:00
Øyvind Rønningstad e4024e274b arch: port nocache linker code to use Cmake function
Remove from linker.ld

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-05-20 22:28:28 -04:00
Øyvind Rønningstad 6d0039444c arch: Port the ramfunc section to the Cmake function
Remove it from linker.ld

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-05-20 22:28:28 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Adithya Baglody b33dd7ebde tests: benchmark: timing_info: Fixed incorrect results.
The results were incorrect because the timer was firing the
interrupts before the measurement was made.

Fixes: GH-14556

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2019-04-05 16:10:27 -04:00
Patrik Flykt 24d71431e9 all: Add 'U' suffix when using unsigned variables
Add a 'U' suffix to values when computing and comparing against
unsigned variables.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-28 17:15:58 -05:00
Ulf Magnusson 12ba9dfa52 scripts: Remove unused variables in all Python scripts
Discovered with pylint3.

Use the placeholder name '_' for unproblematic unused variables. It's
what I'm used to, and pylint knows not to flag it.

Python tip:

    for i in range(n):
        some_list.append(0)

can be replaced with

    some_list += n*[0]

Similarly, 3*'\t' gives '\t\t\t'.

(Relevant here because pylint flagged the loop index as unused.)

To do integer division in Python 3, use // instead of /.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-28 11:06:20 -05:00
Ulf Magnusson ba312fe844 scripts: Remove unnecessary () around if/while conditions in Python
Not needed in Python. Detected by check C0325 in pylint3.

Also replace an

  if len(tag):

with just

  if tag:

Empty strings, byte strings, lists, etc., are falsy in Python.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:59:59 -05:00
Ulf Magnusson 5c8fd84d12 scripts: Remove extra trailing newlines from Python scripts
Fixing all instances so that it can be flagged in a pylint CI check
later.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:53:08 -05:00
Patrik Flykt 4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Rajavardhan Gundi a23161e7fe gen_isr_tables: Fix _sw_isr_table generation for multi-level IRQs
The commit 77cb942a97 broke the generation of sw_isr_table for
multi-level IRQs. This patch fixes it.

Fixes #13082.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2019-02-06 10:13:25 -05:00
Andrew Boie 77cb942a97 gen_isr_tables: error out on duplicate irqs
It's incorrect behavior to call IRQ_CONNECT() on the
same IRQ line more than once, but only x86 was catching
this.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-04 16:34:35 -05:00
Daniel Leung 259b418b98 gen_isr_tables: fix typo for 3rd level INTR config symbol
The script looks for CONFIG_3RD_LEVEL_INTR_xx_OFFSET while
the config is actually CONFIG_3RD_LVL_INTR_xx_OFFSET.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-01-25 17:36:18 -05:00
Marti Bolivar 0aa87e15bb drivers: interrupt_controller: multi-level improvements
Some extensions to the multi-level interrupt controller are required
to support SoCs with more than four level 2 interrupt "aggregators".

Extend existing support to allow at most 8 level 2 or level 3
aggregators. Use Kconfig macro templates to cut down on boilerplate.
Try to clarify some aspects of the Kconfig help while we're at it, and
change the type of options which count things or are table offsets
from "hex" to "int", so that the generated .config is easier to read.

Finally, make some improvements to gen_isr_tables.py while we are
here. In particular, move some assignments around to cut down on
duplicated work, don't check for symbols we know must exist, and
improve the debug logging output's readability.

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-25 11:59:46 -05:00
Andy Ross 1041ef0925 tests/benchmarks/timing: Unify the "standard zephyr timing" cases
It's worth using custom timing information on a few systems to save
cycles or gain precision.  But make the use of k_cycle_get_32() a
proper default instead of hardcoding all the platforms and failing to
build on new ones.  On Xtensa and RISC-V (and now x86_64) the cycle
informatoin from that call is a very fast wrapper around the native
counters anyway -- all you would save would be the function call
overhead.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-01-11 15:18:52 -05:00
Andrew Boie ce8e1ecd2d Revert "interrupts: use weak linkage instead ..."
This reverts commit 140863f6a7.

This was found to be causing problems with certain linkers which
generate different code depending on whether a symbol is weak or
not.

Fixes #11916

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-12-07 20:26:58 -05:00
Patrik Flykt 494ef1cfe2 arch: Add 'U' to unsigned variable assignments
Add 'U' to a value when assigning it to an unsigned variable.
MISRA-C rule 7.2

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2018-12-04 22:51:56 -05:00
Michael Scott 36b93e121f gen_isr_tables: remove hard-coded max IRQ value of 32
In the MULTI_LEVEL_INTERRUPTS Kconfig we have a symbol for defining
the maximum IRQ per aggregator: MAX_IRQ_PER_AGGREGATOR

Instead of using a hard-coded value of 32 max irq per level,
let's use the value of MAX_IRQ_PER_AGGREGATOR

Signed-off-by: Michael Scott <mike@foundries.io>
2018-11-14 21:14:14 -05:00
Michael Scott 28fe29dd36 gen_isr_tables: fix check for CONFIG_3RD_LEVEL_INTERRUPTS
If CONFIG_3RD_LEVEL_INTERRUPTS is not enabled then we see the following
error during sw_isr_table generation:
Traceback (most recent call last):
  File "zephyr/arch/common/gen_isr_tables.py", line 291, in <module>
    main()
  File "zephyr/arch/common/gen_isr_tables.py", line 199, in main
    if syms["CONFIG_3RD_LEVEL_INTERRUPTS"]:
KeyError: 'CONFIG_3RD_LEVEL_INTERRUPTS'
ninja: build stopped: subcommand failed.

Fix the logic to look for the symbol instead of referencing it.

Signed-off-by: Michael Scott <mike@foundries.io>
2018-11-14 21:14:14 -05:00
Andrew Boie 140863f6a7 interrupts: use weak linkage instead of linkonce
.gnu.linkonce is an internal undocumented ld feature.
Just use __weak, which does the same thing we want.

This is only done for _sw_isr_table. _irq_vector_table
is left alone due to unwanted interactions between
__weak and the ld KEEP() directive.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-11-10 11:01:22 -05:00
Andrew Boie 539d3011d3 arch: common: add function for updating IRQ table
This will be called by arch-specific implementations of
_arch_irq_connect_dynamic()

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-11-10 11:01:22 -05:00
Adithya Baglody 1d27b404a6 tests: benchmarks: timing_info: Enable benchmarks for riscv32.
This patch provides support needed to get timing related
information from riscv32 based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody 79f65d4db7 tests: benchmarks: timing_info: Enable benchmarks for nios2.
This patch provides support needed to get timing related
information from nios2 based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody bb918d85f8 tests: benchmarks: timing_info: Enable benchmarks for xtensa.
This patch provides support needed to get timing related
information from xtensa based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody 022588e88d tests: benchmarks: timing_info: Enable benchmarks for ARC.
This patch provides support needed to get timing related
information from ARC based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody a8b0b0d5e8 benchmarks: timing_info: Add hooks in the kernel for userspace.
Added sampling hooks in the kernel needed for userspace benchmarks.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Sebastian Bøe a1e806bf44 gen_isr_tables: Delete the dead code accompanying .intList.num_isrs
intList has been populated with the number of isrs, aka interrupts,
but nothing has not been using this information so we drop it and
everything used to construct it.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-25 12:54:49 -07:00
Sebastian Bøe aed0b6c4bd isr_tables: Simplify how the sw_irq_handler function is used
This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

It is equivalent to the simplification that was done with
_irq_spurious here:
https://github.com/zephyrproject-rtos/zephyr/pull/7574

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-20 15:39:29 -04:00
Sebastian Bøe 8f321b48ac isr_tables: Simplify how the spurious irq function address is found
Instead of finding the address of the spurious irq function in the
intList section we now rely on the linker to find the address in the
_irq_spurious symbol.

This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.

In this specific case it makes the generated code 'irq_tables.c'
easier to read as we replace magic numbers with the &_irq_spurious
token.

Also, the path through the build system that _irq_spurious makes is
much shorter, so it is much easier for a user to understand how it is
used.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-06-19 13:46:35 -07:00
Rajavardhan Gundi 1e6adba9ef drivers/interrupt_controller: Introduce multi-level interrupt support
In a scenario where a platform harbours multiple interrupts to the
extent the core cannot support it, an interrupt controller is added
as an additional level of interrupt. It typically combines several
sources of interrupt into one line that is then routed to the parent
controller.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-02-06 22:39:05 -05:00
Sebastian Bøe 74174809da gen_isr_tables: Minor refactoring
Minor refactor to gen_isr_tables.py; "if not" is difficult to read.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-01-04 08:55:26 -05:00
Sebastian Bøe 0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe 12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Adithya Baglody edd072e730 tests: benchmarking: cleanup of the benchmarking code.
The kernel will no longer reference the code written in the
test folder.

GH-1236

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-11-02 09:01:06 -04:00
Andrew Boie 945af95f42 kernel: introduce object validation mechanism
All system calls made from userspace which involve pointers to kernel
objects (including device drivers) will need to have those pointers
validated; userspace should never be able to crash the kernel by passing
it garbage.

The actual validation with _k_object_validate() will be in the system
call receiver code, which doesn't exist yet.

- CONFIG_USERSPACE introduced. We are somewhat far away from having an
  end-to-end implementation, but at least need a Kconfig symbol to
  guard the incoming code with. Formal documentation doesn't exist yet
  either, but will appear later down the road once the implementation is
  mostly finalized.

- In the memory region for RAM, the data section has been moved last,
  past bss and noinit. This ensures that inserting generated tables
  with addresses of kernel objects does not change the addresses of
  those objects (which would make the table invalid)

- The DWARF debug information in the generated ELF binary is parsed to
  fetch the locations of all kernel objects and pass this to gperf to
  create a perfect hash table of their memory addresses.

- The generated gperf code doesn't know that we are exclusively working
  with memory addresses and uses memory inefficently. A post-processing
  script process_gperf.py adjusts the generated code before it is
  compiled to work with pointer values directly and not strings
  containing them.

- _k_object_init() calls inserted into the init functions for the set of
  kernel object types we are going to support so far

Issue: ZEP-2187
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:33:33 -07:00
Leandro Pereira 27ea2d8eb7 arch: xtensa: Convert Xtensa port to use gen_isr_table
The Xtensa port was the only one remaining to be converted to the new
way of connecting interrupts in Zephyr.  Some things are still
unconverted, mainly the exception table, and this will be performed
another time.

Of note: _irq_priority_set() isn't called on _ARCH_IRQ_CONNECT(), since
IRQs can't change priority on Xtensa: while the architecture has the
concept of interrupt priority levels, each line has a fixed level and
can't be changed.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-09 12:26:14 -07:00
Anas Nashif 397d29db42 linker: move all linker headers to include/linker
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-18 09:24:04 -05:00
Andrew Boie 174f301147 build: simplfy how extra build steps are specified
For various reasons its often necessary to generate certain
complex data structures at build-time by separate tools outside
of the C compiler. Data is populated to these tools by way of
special binary sections not intended to be included in the final
binary. We currently do this to generate interrupt tables, forthcoming
work will also use this to generate MMU page tables.

The way we have been doing this is to generatea "kernel_prebuilt.elf",
extract the metadata sections with objcopy, run the tool, and then
re-link the kernel with the extra data *and* use objcopy to pull
out the unwanted sections.

This doesn't scale well if multiple post-build steps are needed.
Now this is much simpler; in any Makefile, a special
GENERATED_KERNEL_OBJECT_FILES variable may be appended to containing
the filenames to the generated object files, which will be generated
by Make in the usual fashion.

Instead of using objcopy to pull out, we now create a linker-pass2.cmd
which additionally defines LINKER_PASS2. The source linker script
can #ifdef around this to use the special /DISCARD/ section target
to not include metadata sections in the final binary.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 14:07:09 -04:00
Kumar Gala bf53ebf2c8 arch: convert to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  There are few places we dont convert over to the new
types because of compatiability with ext/HALs or for ease of transition
at this point.  Fixup a few of the PRI formatters so we build with newlib.

Jira: ZEP-2051

Change-Id: I7d2d3697cad04f20aaa8f6e77228f502cd9c8286
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 12:08:12 +00:00
Andrew Boie 3944d8313e gen_isr_tables: apply offset to irq parameter
The interrupts would be placed at incorrect offsets on systems where
some interrupt vectors are reserved for exceptions, such as ARC.

Change-Id: I5b1f00eb9e8aecb84ae66e3d0461a734ffb5fbe6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-15 04:49:19 +00:00
Andrew Boie bd69c3bdf0 riscv32: enable gen_isr_tables mechanism
Change-Id: Ia09d9a4d3412424dcbb25db829059a0714d81214
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-15 04:49:17 +00:00
Andrew Boie c99c686b2c nios2: use gen_isr_tables mechanism
Change-Id: If1ffcedf86a015789b42e7aec45dae3cc58f74fa
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-11 01:28:00 +00:00
Andrew Boie 1927b3d020 gen_isr_tables: New static interrupt build mechanism
This is a new mechanism for generating interrupt tables which will
be useful on many architectures. It replaces the old linker-based
mechanism for creating these tables and has a couple advantages:

 1) It is now possible to use enums as the IRQ line argument to
    IRQ_CONNECT(), which should ease CMSIS integration.
 2) The vector table itself is now generated, which lets us place
    interrupts directly into the vector table without having to
    hard-code them. This is a feature we have long enjoyed on x86
    and will enable 'direct' interrupts.
 3) More code is common, requiring less arch-specific code to
    support.

This patch introduces the common code for this mechanism. Follow-up
patches will enable it on various arches.

Issue: ZEP-1038, ZEP-1165
Change-Id: I9acd6e0de8b438fa9293f2e00563628f7510168a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-11 01:27:58 +00:00