irq: Fix IRQ vector table relocation

The generation of the software ISR table and the IRQ vector table
(respectively generated by CONFIG_GEN_SW_ISR_TABLE and
CONFIG_GEN_IRQ_VECTOR_TABLE) should (in theory) go through three stages:

1. A placeholder table is generated in arch/common/isr_tables.c and
   placed in an orphaned .gnu.linkonce.{irq_vector_table, sw_isr_table}
   section

2. The real table is generated by arch/common/gen_isr_tables.py (creating
   the build/zephyr/isr_tables.c file)

3. The real table is un-orphaned by moving it in a proper section with a
   proper alignment

While all the steps are done automatically for the software ISR table,
for the IRQ vector table each architectures must take care of modiying
its own linker script to place somewhere the generated IRQ vector table
(basically step 3 is missing).

This is currently only done for 2 architectures: Cortex-M (ARMv7) and
ARC. But when another architecture tries to use the IRQ vector table,
the linker complains about that. For example:

  Linking C executable zephyr/zephyr.elf
  riscv64-zephyr-elf/bin/ld.bfd: warning: orphan section
    `.gnu.linkonce.irq_vector_table' from
    `zephyr/CMakeFiles/zephyr_final.dir/isr_tables.c.obj' being placed in
    section `.gnu.linkonce.irq_vector_table'

In this patch we introduce a new CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN to
support the architectures requiring a special alignment for the IRQ
vector table and we also introduce a way to automatically place the IRQ
vector table in place in the same way it is done for the ISR software
table.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2022-06-21 14:26:03 +02:00 committed by Carles Cufí
commit 3a48365bab
3 changed files with 20 additions and 0 deletions

View file

@ -408,6 +408,16 @@ config GEN_IRQ_VECTOR_TABLE
indexed by IRQ line. In the latter case, the vector table must be
supplied by the application or architecture code.
config ARCH_IRQ_VECTOR_TABLE_ALIGN
int "Alignment size of the interrupt vector table"
default 0
depends on GEN_IRQ_VECTOR_TABLE
help
This option controls alignment size of generated
_irq_vector_table. Some architecture needs an IRQ vector table
to be aligned to architecture specific size. The default
size is 0 for no alignment.
config GEN_SW_ISR_TABLE
bool "Generate a software ISR table"
default y

View file

@ -24,6 +24,12 @@ zephyr_linker_sources_ifdef(CONFIG_GEN_ISR_TABLES
${ZEPHYR_BASE}/include/zephyr/linker/intlist.ld
)
zephyr_linker_sources_ifdef(CONFIG_GEN_IRQ_VECTOR_TABLE
ROM_START
SORT_KEY 0x0vectors
${ZEPHYR_BASE}/include/zephyr/linker/irq-vector-table-section.ld
)
if(CONFIG_GEN_ISR_TABLES)
zephyr_linker_section(NAME .intList VMA IDT_LIST LMA IDT_LIST NOINPUT PASS NOT LINKER_ZEPHYR_FINAL)
zephyr_linker_section_configure(SECTION .intList KEEP INPUT ".irq_info" FIRST)

View file

@ -0,0 +1,4 @@
/* SPDX-License-Identifier: Apache-2.0 */
. = ALIGN(CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN);
KEEP(*(_IRQ_VECTOR_TABLE_SECTION_SYMS))